1 files changed, 30 insertions, 42 deletions

diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 964c09644832..0b5358072172 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -69,8 +69,8 @@
 
 #define DRV_MODULE_NAME         "tg3"
 #define PFX DRV_MODULE_NAME     ": "
-#define DRV_MODULE_VERSION      "3.55"
-#define DRV_MODULE_RELDATE      "Mar 27, 2006"
+#define DRV_MODULE_VERSION      "3.56"
+#define DRV_MODULE_RELDATE      "Apr 1, 2006"
 
 #define TG3_DEF_MAC_MODE        0
 #define TG3_DEF_RX_MODE         0
@@ -497,40 +497,33 @@ static void tg3_write_mem(struct tg3 *tp, u32 off, u32 val)
         unsigned long flags;
 
         spin_lock_irqsave(&tp->indirect_lock, flags);
-        if (tp->write32 != tg3_write_indirect_reg32) {
-                tw32_f(TG3PCI_MEM_WIN_BASE_ADDR, off);
-                tw32_f(TG3PCI_MEM_WIN_DATA, val);
+        pci_write_config_dword(tp->pdev, TG3PCI_MEM_WIN_BASE_ADDR, off);
+        pci_write_config_dword(tp->pdev, TG3PCI_MEM_WIN_DATA, val);
 
-                /* Always leave this as zero. */
-                tw32_f(TG3PCI_MEM_WIN_BASE_ADDR, 0);
-        } else {
-                pci_write_config_dword(tp->pdev, TG3PCI_MEM_WIN_BASE_ADDR, off);
-                pci_write_config_dword(tp->pdev, TG3PCI_MEM_WIN_DATA, val);
-
-                /* Always leave this as zero. */
-                pci_write_config_dword(tp->pdev, TG3PCI_MEM_WIN_BASE_ADDR, 0);
-        }
+        /* Always leave this as zero. */
+        pci_write_config_dword(tp->pdev, TG3PCI_MEM_WIN_BASE_ADDR, 0);
         spin_unlock_irqrestore(&tp->indirect_lock, flags);
 }
 
+static void tg3_write_mem_fast(struct tg3 *tp, u32 off, u32 val)
+{
+        /* If no workaround is needed, write to mem space directly */
+        if (tp->write32 != tg3_write_indirect_reg32)
+                tw32(NIC_SRAM_WIN_BASE + off, val);
+        else
+                tg3_write_mem(tp, off, val);
+}
+
 static void tg3_read_mem(struct tg3 *tp, u32 off, u32 *val)
 {
         unsigned long flags;
 
         spin_lock_irqsave(&tp->indirect_lock, flags);
-        if (tp->write32 != tg3_write_indirect_reg32) {
-                tw32_f(TG3PCI_MEM_WIN_BASE_ADDR, off);
-                *val = tr32(TG3PCI_MEM_WIN_DATA);
+        pci_write_config_dword(tp->pdev, TG3PCI_MEM_WIN_BASE_ADDR, off);
+        pci_read_config_dword(tp->pdev, TG3PCI_MEM_WIN_DATA, val);
 
-                /* Always leave this as zero. */
-                tw32_f(TG3PCI_MEM_WIN_BASE_ADDR, 0);
-        } else {
-                pci_write_config_dword(tp->pdev, TG3PCI_MEM_WIN_BASE_ADDR, off);
-                pci_read_config_dword(tp->pdev, TG3PCI_MEM_WIN_DATA, val);
-
-                /* Always leave this as zero. */
-                pci_write_config_dword(tp->pdev, TG3PCI_MEM_WIN_BASE_ADDR, 0);
-        }
+        /* Always leave this as zero. */
+        pci_write_config_dword(tp->pdev, TG3PCI_MEM_WIN_BASE_ADDR, 0);
         spin_unlock_irqrestore(&tp->indirect_lock, flags);
 }
 
@@ -1374,12 +1367,12 @@ static int tg3_set_power_state(struct tg3 *tp, pci_power_t state)
                 }
         }
 
-        tg3_write_sig_post_reset(tp, RESET_KIND_SHUTDOWN);
-
         /* Finally, set the new power state. */
         pci_write_config_word(tp->pdev, pm + PCI_PM_CTRL, power_control);
         udelay(100);    /* Delay after power state change */
 
+        tg3_write_sig_post_reset(tp, RESET_KIND_SHUTDOWN);
+
         return 0;
 }
 
@@ -2966,9 +2959,7 @@ static void tg3_tx(struct tg3 *tp)
                 struct sk_buff *skb = ri->skb;
                 int i;
 
-                if (unlikely(skb == NULL))
-                        BUG();
-
+                BUG_ON(skb == NULL);
                 pci_unmap_single(tp->pdev,
                                  pci_unmap_addr(ri, mapping),
                                  skb_headlen(skb),
@@ -2979,12 +2970,10 @@ static void tg3_tx(struct tg3 *tp)
                 sw_idx = NEXT_TX(sw_idx);
 
                 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
-                        if (unlikely(sw_idx == hw_idx))
-                                BUG();
+                        BUG_ON(sw_idx == hw_idx);
 
                         ri = &tp->tx_buffers[sw_idx];
-                        if (unlikely(ri->skb != NULL))
-                                BUG();
+                        BUG_ON(ri->skb != NULL);
 
                         pci_unmap_page(tp->pdev,
                                        pci_unmap_addr(ri, mapping),
@@ -4935,9 +4924,8 @@ static int tg3_halt_cpu(struct tg3 *tp, u32 offset)
 {
         int i;
 
-        if (offset == TX_CPU_BASE &&
-            (tp->tg3_flags2 & TG3_FLG2_5705_PLUS))
-                BUG();
+        BUG_ON(offset == TX_CPU_BASE &&
+            (tp->tg3_flags2 & TG3_FLG2_5705_PLUS));
 
         if (offset == RX_CPU_BASE) {
                 for (i = 0; i < 10000; i++) {
@@ -6547,11 +6535,11 @@ static void tg3_timer(unsigned long __opaque)
                 if (tp->tg3_flags & TG3_FLAG_ENABLE_ASF) {
                         u32 val;
 
-                        tg3_write_mem(tp, NIC_SRAM_FW_CMD_MBOX,
-                                      FWCMD_NICDRV_ALIVE2);
-                        tg3_write_mem(tp, NIC_SRAM_FW_CMD_LEN_MBOX, 4);
+                        tg3_write_mem_fast(tp, NIC_SRAM_FW_CMD_MBOX,
+                                           FWCMD_NICDRV_ALIVE2);
+                        tg3_write_mem_fast(tp, NIC_SRAM_FW_CMD_LEN_MBOX, 4);
                         /* 5 seconds timeout */
-                        tg3_write_mem(tp, NIC_SRAM_FW_CMD_DATA_MBOX, 5);
+                        tg3_write_mem_fast(tp, NIC_SRAM_FW_CMD_DATA_MBOX, 5);
                         val = tr32(GRC_RX_CPU_EVENT);
                         val |= (1 << 14);
                         tw32(GRC_RX_CPU_EVENT, val);