aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/net/tg3.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/net/tg3.c')
-rw-r--r--drivers/net/tg3.c33
1 files changed, 28 insertions, 5 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 07b3f77e7626..cc4bde852542 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -64,8 +64,8 @@
64 64
65#define DRV_MODULE_NAME "tg3" 65#define DRV_MODULE_NAME "tg3"
66#define PFX DRV_MODULE_NAME ": " 66#define PFX DRV_MODULE_NAME ": "
67#define DRV_MODULE_VERSION "3.92" 67#define DRV_MODULE_VERSION "3.92.1"
68#define DRV_MODULE_RELDATE "May 2, 2008" 68#define DRV_MODULE_RELDATE "June 9, 2008"
69 69
70#define TG3_DEF_MAC_MODE 0 70#define TG3_DEF_MAC_MODE 0
71#define TG3_DEF_RX_MODE 0 71#define TG3_DEF_RX_MODE 0
@@ -1295,6 +1295,21 @@ static void tg3_frob_aux_power(struct tg3 *tp)
1295 GRC_LCLCTRL_GPIO_OUTPUT0 | 1295 GRC_LCLCTRL_GPIO_OUTPUT0 |
1296 GRC_LCLCTRL_GPIO_OUTPUT1), 1296 GRC_LCLCTRL_GPIO_OUTPUT1),
1297 100); 1297 100);
1298 } else if (tp->pdev->device == PCI_DEVICE_ID_TIGON3_5761) {
1299 /* The 5761 non-e device swaps GPIO 0 and GPIO 2. */
1300 u32 grc_local_ctrl = GRC_LCLCTRL_GPIO_OE0 |
1301 GRC_LCLCTRL_GPIO_OE1 |
1302 GRC_LCLCTRL_GPIO_OE2 |
1303 GRC_LCLCTRL_GPIO_OUTPUT0 |
1304 GRC_LCLCTRL_GPIO_OUTPUT1 |
1305 tp->grc_local_ctrl;
1306 tw32_wait_f(GRC_LOCAL_CTRL, grc_local_ctrl, 100);
1307
1308 grc_local_ctrl |= GRC_LCLCTRL_GPIO_OUTPUT2;
1309 tw32_wait_f(GRC_LOCAL_CTRL, grc_local_ctrl, 100);
1310
1311 grc_local_ctrl &= ~GRC_LCLCTRL_GPIO_OUTPUT0;
1312 tw32_wait_f(GRC_LOCAL_CTRL, grc_local_ctrl, 100);
1298 } else { 1313 } else {
1299 u32 no_gpio2; 1314 u32 no_gpio2;
1300 u32 grc_local_ctrl = 0; 1315 u32 grc_local_ctrl = 0;
@@ -3168,8 +3183,7 @@ static int tg3_setup_fiber_mii_phy(struct tg3 *tp, int force_reset)
3168 err |= tg3_readphy(tp, MII_BMCR, &bmcr); 3183 err |= tg3_readphy(tp, MII_BMCR, &bmcr);
3169 3184
3170 if ((tp->link_config.autoneg == AUTONEG_ENABLE) && !force_reset && 3185 if ((tp->link_config.autoneg == AUTONEG_ENABLE) && !force_reset &&
3171 (tp->tg3_flags2 & TG3_FLG2_PARALLEL_DETECT) && 3186 (tp->tg3_flags2 & TG3_FLG2_PARALLEL_DETECT)) {
3172 tp->link_config.flowctrl == tp->link_config.active_flowctrl) {
3173 /* do nothing, just check for link up at the end */ 3187 /* do nothing, just check for link up at the end */
3174 } else if (tp->link_config.autoneg == AUTONEG_ENABLE) { 3188 } else if (tp->link_config.autoneg == AUTONEG_ENABLE) {
3175 u32 adv, new_adv; 3189 u32 adv, new_adv;
@@ -8599,7 +8613,7 @@ static int tg3_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
8599 (cmd->speed == SPEED_1000)) 8613 (cmd->speed == SPEED_1000))
8600 return -EINVAL; 8614 return -EINVAL;
8601 else if ((cmd->speed == SPEED_1000) && 8615 else if ((cmd->speed == SPEED_1000) &&
8602 (tp->tg3_flags2 & TG3_FLAG_10_100_ONLY)) 8616 (tp->tg3_flags & TG3_FLAG_10_100_ONLY))
8603 return -EINVAL; 8617 return -EINVAL;
8604 8618
8605 tg3_full_lock(tp, 0); 8619 tg3_full_lock(tp, 0);
@@ -11768,6 +11782,15 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
11768 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755) 11782 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755)
11769 tp->grc_local_ctrl |= GRC_LCLCTRL_GPIO_UART_SEL; 11783 tp->grc_local_ctrl |= GRC_LCLCTRL_GPIO_UART_SEL;
11770 11784
11785 if (tp->pdev->device == PCI_DEVICE_ID_TIGON3_5761) {
11786 /* Turn off the debug UART. */
11787 tp->grc_local_ctrl |= GRC_LCLCTRL_GPIO_UART_SEL;
11788 if (tp->tg3_flags2 & TG3_FLG2_IS_NIC)
11789 /* Keep VMain power. */
11790 tp->grc_local_ctrl |= GRC_LCLCTRL_GPIO_OE0 |
11791 GRC_LCLCTRL_GPIO_OUTPUT0;
11792 }
11793
11771 /* Force the chip into D0. */ 11794 /* Force the chip into D0. */
11772 err = tg3_set_power_state(tp, PCI_D0); 11795 err = tg3_set_power_state(tp, PCI_D0);
11773 if (err) { 11796 if (err) {