diff options
Diffstat (limited to 'drivers/net/tg3.c')
-rw-r--r-- | drivers/net/tg3.c | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c index e03d1ae50c3e..cb687fcaae1f 100644 --- a/drivers/net/tg3.c +++ b/drivers/net/tg3.c | |||
@@ -9436,12 +9436,18 @@ static inline struct subsys_tbl_ent *lookup_by_subsys(struct tg3 *tp) | |||
9436 | return NULL; | 9436 | return NULL; |
9437 | } | 9437 | } |
9438 | 9438 | ||
9439 | /* Since this function may be called in D3-hot power state during | ||
9440 | * tg3_init_one(), only config cycles are allowed. | ||
9441 | */ | ||
9442 | static void __devinit tg3_get_eeprom_hw_cfg(struct tg3 *tp) | 9439 | static void __devinit tg3_get_eeprom_hw_cfg(struct tg3 *tp) |
9443 | { | 9440 | { |
9444 | u32 val; | 9441 | u32 val; |
9442 | u16 pmcsr; | ||
9443 | |||
9444 | /* On some early chips the SRAM cannot be accessed in D3hot state, | ||
9445 | * so need make sure we're in D0. | ||
9446 | */ | ||
9447 | pci_read_config_word(tp->pdev, tp->pm_cap + PCI_PM_CTRL, &pmcsr); | ||
9448 | pmcsr &= ~PCI_PM_CTRL_STATE_MASK; | ||
9449 | pci_write_config_word(tp->pdev, tp->pm_cap + PCI_PM_CTRL, pmcsr); | ||
9450 | msleep(1); | ||
9445 | 9451 | ||
9446 | /* Make sure register accesses (indirect or otherwise) | 9452 | /* Make sure register accesses (indirect or otherwise) |
9447 | * will function correctly. | 9453 | * will function correctly. |