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path: root/drivers/net/tg3.c
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Diffstat (limited to 'drivers/net/tg3.c')
-rw-r--r--drivers/net/tg3.c44
1 files changed, 32 insertions, 12 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 573054ae7b58..bd331174550b 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -585,18 +585,23 @@ static void tg3_read_mem(struct tg3 *tp, u32 off, u32 *val)
585static void tg3_ape_lock_init(struct tg3 *tp) 585static void tg3_ape_lock_init(struct tg3 *tp)
586{ 586{
587 int i; 587 int i;
588 u32 regbase;
589
590 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5761)
591 regbase = TG3_APE_LOCK_GRANT;
592 else
593 regbase = TG3_APE_PER_LOCK_GRANT;
588 594
589 /* Make sure the driver hasn't any stale locks. */ 595 /* Make sure the driver hasn't any stale locks. */
590 for (i = 0; i < 8; i++) 596 for (i = 0; i < 8; i++)
591 tg3_ape_write32(tp, TG3_APE_LOCK_GRANT + 4 * i, 597 tg3_ape_write32(tp, regbase + 4 * i, APE_LOCK_GRANT_DRIVER);
592 APE_LOCK_GRANT_DRIVER);
593} 598}
594 599
595static int tg3_ape_lock(struct tg3 *tp, int locknum) 600static int tg3_ape_lock(struct tg3 *tp, int locknum)
596{ 601{
597 int i, off; 602 int i, off;
598 int ret = 0; 603 int ret = 0;
599 u32 status; 604 u32 status, req, gnt;
600 605
601 if (!(tp->tg3_flags3 & TG3_FLG3_ENABLE_APE)) 606 if (!(tp->tg3_flags3 & TG3_FLG3_ENABLE_APE))
602 return 0; 607 return 0;
@@ -609,13 +614,21 @@ static int tg3_ape_lock(struct tg3 *tp, int locknum)
609 return -EINVAL; 614 return -EINVAL;
610 } 615 }
611 616
617 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5761) {
618 req = TG3_APE_LOCK_REQ;
619 gnt = TG3_APE_LOCK_GRANT;
620 } else {
621 req = TG3_APE_PER_LOCK_REQ;
622 gnt = TG3_APE_PER_LOCK_GRANT;
623 }
624
612 off = 4 * locknum; 625 off = 4 * locknum;
613 626
614 tg3_ape_write32(tp, TG3_APE_LOCK_REQ + off, APE_LOCK_REQ_DRIVER); 627 tg3_ape_write32(tp, req + off, APE_LOCK_REQ_DRIVER);
615 628
616 /* Wait for up to 1 millisecond to acquire lock. */ 629 /* Wait for up to 1 millisecond to acquire lock. */
617 for (i = 0; i < 100; i++) { 630 for (i = 0; i < 100; i++) {
618 status = tg3_ape_read32(tp, TG3_APE_LOCK_GRANT + off); 631 status = tg3_ape_read32(tp, gnt + off);
619 if (status == APE_LOCK_GRANT_DRIVER) 632 if (status == APE_LOCK_GRANT_DRIVER)
620 break; 633 break;
621 udelay(10); 634 udelay(10);
@@ -623,7 +636,7 @@ static int tg3_ape_lock(struct tg3 *tp, int locknum)
623 636
624 if (status != APE_LOCK_GRANT_DRIVER) { 637 if (status != APE_LOCK_GRANT_DRIVER) {
625 /* Revoke the lock request. */ 638 /* Revoke the lock request. */
626 tg3_ape_write32(tp, TG3_APE_LOCK_GRANT + off, 639 tg3_ape_write32(tp, gnt + off,
627 APE_LOCK_GRANT_DRIVER); 640 APE_LOCK_GRANT_DRIVER);
628 641
629 ret = -EBUSY; 642 ret = -EBUSY;
@@ -634,7 +647,7 @@ static int tg3_ape_lock(struct tg3 *tp, int locknum)
634 647
635static void tg3_ape_unlock(struct tg3 *tp, int locknum) 648static void tg3_ape_unlock(struct tg3 *tp, int locknum)
636{ 649{
637 int off; 650 u32 gnt;
638 651
639 if (!(tp->tg3_flags3 & TG3_FLG3_ENABLE_APE)) 652 if (!(tp->tg3_flags3 & TG3_FLG3_ENABLE_APE))
640 return; 653 return;
@@ -647,8 +660,12 @@ static void tg3_ape_unlock(struct tg3 *tp, int locknum)
647 return; 660 return;
648 } 661 }
649 662
650 off = 4 * locknum; 663 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5761)
651 tg3_ape_write32(tp, TG3_APE_LOCK_GRANT + off, APE_LOCK_GRANT_DRIVER); 664 gnt = TG3_APE_LOCK_GRANT;
665 else
666 gnt = TG3_APE_PER_LOCK_GRANT;
667
668 tg3_ape_write32(tp, gnt + 4 * locknum, APE_LOCK_GRANT_DRIVER);
652} 669}
653 670
654static void tg3_disable_ints(struct tg3 *tp) 671static void tg3_disable_ints(struct tg3 *tp)
@@ -6782,7 +6799,8 @@ static void tg3_restore_pci_state(struct tg3 *tp)
6782 /* Allow reads and writes to the APE register and memory space. */ 6799 /* Allow reads and writes to the APE register and memory space. */
6783 if (tp->tg3_flags3 & TG3_FLG3_ENABLE_APE) 6800 if (tp->tg3_flags3 & TG3_FLG3_ENABLE_APE)
6784 val |= PCISTATE_ALLOW_APE_CTLSPC_WR | 6801 val |= PCISTATE_ALLOW_APE_CTLSPC_WR |
6785 PCISTATE_ALLOW_APE_SHMEM_WR; 6802 PCISTATE_ALLOW_APE_SHMEM_WR |
6803 PCISTATE_ALLOW_APE_PSPACE_WR;
6786 pci_write_config_dword(tp->pdev, TG3PCI_PCISTATE, val); 6804 pci_write_config_dword(tp->pdev, TG3PCI_PCISTATE, val);
6787 6805
6788 pci_write_config_word(tp->pdev, PCI_COMMAND, tp->pci_cmd); 6806 pci_write_config_word(tp->pdev, PCI_COMMAND, tp->pci_cmd);
@@ -7720,7 +7738,8 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
7720 */ 7738 */
7721 val = tr32(TG3PCI_PCISTATE); 7739 val = tr32(TG3PCI_PCISTATE);
7722 val |= PCISTATE_ALLOW_APE_CTLSPC_WR | 7740 val |= PCISTATE_ALLOW_APE_CTLSPC_WR |
7723 PCISTATE_ALLOW_APE_SHMEM_WR; 7741 PCISTATE_ALLOW_APE_SHMEM_WR |
7742 PCISTATE_ALLOW_APE_PSPACE_WR;
7724 tw32(TG3PCI_PCISTATE, val); 7743 tw32(TG3PCI_PCISTATE, val);
7725 } 7744 }
7726 7745
@@ -13242,7 +13261,8 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
13242 * APE register and memory space. 13261 * APE register and memory space.
13243 */ 13262 */
13244 pci_state_reg |= PCISTATE_ALLOW_APE_CTLSPC_WR | 13263 pci_state_reg |= PCISTATE_ALLOW_APE_CTLSPC_WR |
13245 PCISTATE_ALLOW_APE_SHMEM_WR; 13264 PCISTATE_ALLOW_APE_SHMEM_WR |
13265 PCISTATE_ALLOW_APE_PSPACE_WR;
13246 pci_write_config_dword(tp->pdev, TG3PCI_PCISTATE, 13266 pci_write_config_dword(tp->pdev, TG3PCI_PCISTATE,
13247 pci_state_reg); 13267 pci_state_reg);
13248 } 13268 }