1 files changed, 19 insertions, 8 deletions

diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index eaed2aa09e1f..7195bdec17f3 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -4,7 +4,7 @@
  * Copyright (C) 2001, 2002, 2003, 2004 David S. Miller (davem@redhat.com)
  * Copyright (C) 2001, 2002, 2003 Jeff Garzik (jgarzik@pobox.com)
  * Copyright (C) 2004 Sun Microsystems Inc.
- * Copyright (C) 2005-2009 Broadcom Corporation.
+ * Copyright (C) 2005-2010 Broadcom Corporation.
  *
  * Firmware is:
  *      Derived from proprietary unpublished source code,
@@ -68,8 +68,8 @@
 
 #define DRV_MODULE_NAME         "tg3"
 #define PFX DRV_MODULE_NAME     ": "
-#define DRV_MODULE_VERSION      "3.105"
-#define DRV_MODULE_RELDATE      "December 2, 2009"
+#define DRV_MODULE_VERSION      "3.106"
+#define DRV_MODULE_RELDATE      "January 12, 2010"
 
 #define TG3_DEF_MAC_MODE        0
 #define TG3_DEF_RX_MODE         0
@@ -1043,7 +1043,11 @@ static void tg3_mdio_start(struct tg3 *tp)
                 else
                         tp->phy_addr = 1;
 
-                is_serdes = tr32(SG_DIG_STATUS) & SG_DIG_IS_SERDES;
+                if (tp->pci_chip_rev_id != CHIPREV_ID_5717_A0)
+                        is_serdes = tr32(SG_DIG_STATUS) & SG_DIG_IS_SERDES;
+                else
+                        is_serdes = tr32(TG3_CPMU_PHY_STRAP) &
+                                    TG3_CPMU_PHY_STRAP_IS_SERDES;
                 if (is_serdes)
                         tp->phy_addr += 7;
         } else
@@ -4707,8 +4711,9 @@ next_pkt:
                 (*post_ptr)++;
 
                 if (unlikely(rx_std_posted >= tp->rx_std_max_post)) {
-                        u32 idx = *post_ptr % TG3_RX_RING_SIZE;
-                        tw32_rx_mbox(TG3_RX_STD_PROD_IDX_REG, idx);
+                        tpr->rx_std_prod_idx = std_prod_idx % TG3_RX_RING_SIZE;
+                        tw32_rx_mbox(TG3_RX_STD_PROD_IDX_REG,
+                                     tpr->rx_std_prod_idx);
                         work_mask &= ~RXD_OPAQUE_RING_STD;
                         rx_std_posted = 0;
                 }
@@ -7773,7 +7778,7 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
              ((u64) tpr->rx_std_mapping >> 32));
         tw32(RCVDBDI_STD_BD + TG3_BDINFO_HOST_ADDR + TG3_64BIT_REG_LOW,
              ((u64) tpr->rx_std_mapping & 0xffffffff));
-        if (!(tp->tg3_flags3 & TG3_FLG3_5755_PLUS))
+        if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5717)
                 tw32(RCVDBDI_STD_BD + TG3_BDINFO_NIC_ADDR,
                      NIC_SRAM_RX_BUFFER_DESC);
 
@@ -12172,7 +12177,8 @@ static void __devinit tg3_get_eeprom_hw_cfg(struct tg3 *tp)
 
                 tp->phy_id = eeprom_phy_id;
                 if (eeprom_phy_serdes) {
-                        if (tp->tg3_flags2 & TG3_FLG2_5780_CLASS)
+                        if ((tp->tg3_flags2 & TG3_FLG2_5780_CLASS) ||
+                            GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717)
                                 tp->tg3_flags2 |= TG3_FLG2_MII_SERDES;
                         else
                                 tp->tg3_flags2 |= TG3_FLG2_PHY_SERDES;
@@ -13437,6 +13443,11 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
         if (err)
                 return err;
 
+        if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 &&
+            (tp->pci_chip_rev_id != CHIPREV_ID_5717_A0 ||
+                 (tp->tg3_flags2 & TG3_FLG2_MII_SERDES)))
+                return -ENOTSUPP;
+
         /* Initialize data/descriptor byte/word swapping. */
         val = tr32(GRC_MODE);
         val &= GRC_MODE_HOST_STACKUP;