diff options
Diffstat (limited to 'drivers/net/tg3.c')
-rw-r--r-- | drivers/net/tg3.c | 32 |
1 files changed, 0 insertions, 32 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c index f4bf62c2a7a5..135c0987deae 100644 --- a/drivers/net/tg3.c +++ b/drivers/net/tg3.c | |||
@@ -58,11 +58,7 @@ | |||
58 | #define TG3_VLAN_TAG_USED 0 | 58 | #define TG3_VLAN_TAG_USED 0 |
59 | #endif | 59 | #endif |
60 | 60 | ||
61 | #ifdef NETIF_F_TSO | ||
62 | #define TG3_TSO_SUPPORT 1 | 61 | #define TG3_TSO_SUPPORT 1 |
63 | #else | ||
64 | #define TG3_TSO_SUPPORT 0 | ||
65 | #endif | ||
66 | 62 | ||
67 | #include "tg3.h" | 63 | #include "tg3.h" |
68 | 64 | ||
@@ -3873,7 +3869,6 @@ static int tg3_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
3873 | 3869 | ||
3874 | entry = tp->tx_prod; | 3870 | entry = tp->tx_prod; |
3875 | base_flags = 0; | 3871 | base_flags = 0; |
3876 | #if TG3_TSO_SUPPORT != 0 | ||
3877 | mss = 0; | 3872 | mss = 0; |
3878 | if (skb->len > (tp->dev->mtu + ETH_HLEN) && | 3873 | if (skb->len > (tp->dev->mtu + ETH_HLEN) && |
3879 | (mss = skb_shinfo(skb)->gso_size) != 0) { | 3874 | (mss = skb_shinfo(skb)->gso_size) != 0) { |
@@ -3906,11 +3901,6 @@ static int tg3_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
3906 | } | 3901 | } |
3907 | else if (skb->ip_summed == CHECKSUM_PARTIAL) | 3902 | else if (skb->ip_summed == CHECKSUM_PARTIAL) |
3908 | base_flags |= TXD_FLAG_TCPUDP_CSUM; | 3903 | base_flags |= TXD_FLAG_TCPUDP_CSUM; |
3909 | #else | ||
3910 | mss = 0; | ||
3911 | if (skb->ip_summed == CHECKSUM_PARTIAL) | ||
3912 | base_flags |= TXD_FLAG_TCPUDP_CSUM; | ||
3913 | #endif | ||
3914 | #if TG3_VLAN_TAG_USED | 3904 | #if TG3_VLAN_TAG_USED |
3915 | if (tp->vlgrp != NULL && vlan_tx_tag_present(skb)) | 3905 | if (tp->vlgrp != NULL && vlan_tx_tag_present(skb)) |
3916 | base_flags |= (TXD_FLAG_VLAN | | 3906 | base_flags |= (TXD_FLAG_VLAN | |
@@ -3970,7 +3960,6 @@ out_unlock: | |||
3970 | return NETDEV_TX_OK; | 3960 | return NETDEV_TX_OK; |
3971 | } | 3961 | } |
3972 | 3962 | ||
3973 | #if TG3_TSO_SUPPORT != 0 | ||
3974 | static int tg3_start_xmit_dma_bug(struct sk_buff *, struct net_device *); | 3963 | static int tg3_start_xmit_dma_bug(struct sk_buff *, struct net_device *); |
3975 | 3964 | ||
3976 | /* Use GSO to workaround a rare TSO bug that may be triggered when the | 3965 | /* Use GSO to workaround a rare TSO bug that may be triggered when the |
@@ -4002,7 +3991,6 @@ tg3_tso_bug_end: | |||
4002 | 3991 | ||
4003 | return NETDEV_TX_OK; | 3992 | return NETDEV_TX_OK; |
4004 | } | 3993 | } |
4005 | #endif | ||
4006 | 3994 | ||
4007 | /* hard_start_xmit for devices that have the 4G bug and/or 40-bit bug and | 3995 | /* hard_start_xmit for devices that have the 4G bug and/or 40-bit bug and |
4008 | * support TG3_FLG2_HW_TSO_1 or firmware TSO only. | 3996 | * support TG3_FLG2_HW_TSO_1 or firmware TSO only. |
@@ -4036,7 +4024,6 @@ static int tg3_start_xmit_dma_bug(struct sk_buff *skb, struct net_device *dev) | |||
4036 | base_flags = 0; | 4024 | base_flags = 0; |
4037 | if (skb->ip_summed == CHECKSUM_PARTIAL) | 4025 | if (skb->ip_summed == CHECKSUM_PARTIAL) |
4038 | base_flags |= TXD_FLAG_TCPUDP_CSUM; | 4026 | base_flags |= TXD_FLAG_TCPUDP_CSUM; |
4039 | #if TG3_TSO_SUPPORT != 0 | ||
4040 | mss = 0; | 4027 | mss = 0; |
4041 | if (skb->len > (tp->dev->mtu + ETH_HLEN) && | 4028 | if (skb->len > (tp->dev->mtu + ETH_HLEN) && |
4042 | (mss = skb_shinfo(skb)->gso_size) != 0) { | 4029 | (mss = skb_shinfo(skb)->gso_size) != 0) { |
@@ -4091,9 +4078,6 @@ static int tg3_start_xmit_dma_bug(struct sk_buff *skb, struct net_device *dev) | |||
4091 | } | 4078 | } |
4092 | } | 4079 | } |
4093 | } | 4080 | } |
4094 | #else | ||
4095 | mss = 0; | ||
4096 | #endif | ||
4097 | #if TG3_VLAN_TAG_USED | 4081 | #if TG3_VLAN_TAG_USED |
4098 | if (tp->vlgrp != NULL && vlan_tx_tag_present(skb)) | 4082 | if (tp->vlgrp != NULL && vlan_tx_tag_present(skb)) |
4099 | base_flags |= (TXD_FLAG_VLAN | | 4083 | base_flags |= (TXD_FLAG_VLAN | |
@@ -5329,7 +5313,6 @@ static int tg3_load_5701_a0_firmware_fix(struct tg3 *tp) | |||
5329 | return 0; | 5313 | return 0; |
5330 | } | 5314 | } |
5331 | 5315 | ||
5332 | #if TG3_TSO_SUPPORT != 0 | ||
5333 | 5316 | ||
5334 | #define TG3_TSO_FW_RELEASE_MAJOR 0x1 | 5317 | #define TG3_TSO_FW_RELEASE_MAJOR 0x1 |
5335 | #define TG3_TSO_FW_RELASE_MINOR 0x6 | 5318 | #define TG3_TSO_FW_RELASE_MINOR 0x6 |
@@ -5906,7 +5889,6 @@ static int tg3_load_tso_firmware(struct tg3 *tp) | |||
5906 | return 0; | 5889 | return 0; |
5907 | } | 5890 | } |
5908 | 5891 | ||
5909 | #endif /* TG3_TSO_SUPPORT != 0 */ | ||
5910 | 5892 | ||
5911 | /* tp->lock is held. */ | 5893 | /* tp->lock is held. */ |
5912 | static void __tg3_set_mac_addr(struct tg3 *tp) | 5894 | static void __tg3_set_mac_addr(struct tg3 *tp) |
@@ -6120,7 +6102,6 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy) | |||
6120 | tw32(BUFMGR_DMA_DESC_POOL_ADDR, NIC_SRAM_DMA_DESC_POOL_BASE); | 6102 | tw32(BUFMGR_DMA_DESC_POOL_ADDR, NIC_SRAM_DMA_DESC_POOL_BASE); |
6121 | tw32(BUFMGR_DMA_DESC_POOL_SIZE, NIC_SRAM_DMA_DESC_POOL_SIZE); | 6103 | tw32(BUFMGR_DMA_DESC_POOL_SIZE, NIC_SRAM_DMA_DESC_POOL_SIZE); |
6122 | } | 6104 | } |
6123 | #if TG3_TSO_SUPPORT != 0 | ||
6124 | else if (tp->tg3_flags2 & TG3_FLG2_TSO_CAPABLE) { | 6105 | else if (tp->tg3_flags2 & TG3_FLG2_TSO_CAPABLE) { |
6125 | int fw_len; | 6106 | int fw_len; |
6126 | 6107 | ||
@@ -6135,7 +6116,6 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy) | |||
6135 | tw32(BUFMGR_MB_POOL_SIZE, | 6116 | tw32(BUFMGR_MB_POOL_SIZE, |
6136 | NIC_SRAM_MBUF_POOL_SIZE5705 - fw_len - 0xa00); | 6117 | NIC_SRAM_MBUF_POOL_SIZE5705 - fw_len - 0xa00); |
6137 | } | 6118 | } |
6138 | #endif | ||
6139 | 6119 | ||
6140 | if (tp->dev->mtu <= ETH_DATA_LEN) { | 6120 | if (tp->dev->mtu <= ETH_DATA_LEN) { |
6141 | tw32(BUFMGR_MB_RDMA_LOW_WATER, | 6121 | tw32(BUFMGR_MB_RDMA_LOW_WATER, |
@@ -6337,10 +6317,8 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy) | |||
6337 | if (tp->tg3_flags2 & TG3_FLG2_PCI_EXPRESS) | 6317 | if (tp->tg3_flags2 & TG3_FLG2_PCI_EXPRESS) |
6338 | rdmac_mode |= RDMAC_MODE_FIFO_LONG_BURST; | 6318 | rdmac_mode |= RDMAC_MODE_FIFO_LONG_BURST; |
6339 | 6319 | ||
6340 | #if TG3_TSO_SUPPORT != 0 | ||
6341 | if (tp->tg3_flags2 & TG3_FLG2_HW_TSO) | 6320 | if (tp->tg3_flags2 & TG3_FLG2_HW_TSO) |
6342 | rdmac_mode |= (1 << 27); | 6321 | rdmac_mode |= (1 << 27); |
6343 | #endif | ||
6344 | 6322 | ||
6345 | /* Receive/send statistics. */ | 6323 | /* Receive/send statistics. */ |
6346 | if (tp->tg3_flags2 & TG3_FLG2_5750_PLUS) { | 6324 | if (tp->tg3_flags2 & TG3_FLG2_5750_PLUS) { |
@@ -6511,10 +6489,8 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy) | |||
6511 | tw32(RCVBDI_MODE, RCVBDI_MODE_ENABLE | RCVBDI_MODE_RCB_ATTN_ENAB); | 6489 | tw32(RCVBDI_MODE, RCVBDI_MODE_ENABLE | RCVBDI_MODE_RCB_ATTN_ENAB); |
6512 | tw32(RCVDBDI_MODE, RCVDBDI_MODE_ENABLE | RCVDBDI_MODE_INV_RING_SZ); | 6490 | tw32(RCVDBDI_MODE, RCVDBDI_MODE_ENABLE | RCVDBDI_MODE_INV_RING_SZ); |
6513 | tw32(SNDDATAI_MODE, SNDDATAI_MODE_ENABLE); | 6491 | tw32(SNDDATAI_MODE, SNDDATAI_MODE_ENABLE); |
6514 | #if TG3_TSO_SUPPORT != 0 | ||
6515 | if (tp->tg3_flags2 & TG3_FLG2_HW_TSO) | 6492 | if (tp->tg3_flags2 & TG3_FLG2_HW_TSO) |
6516 | tw32(SNDDATAI_MODE, SNDDATAI_MODE_ENABLE | 0x8); | 6493 | tw32(SNDDATAI_MODE, SNDDATAI_MODE_ENABLE | 0x8); |
6517 | #endif | ||
6518 | tw32(SNDBDI_MODE, SNDBDI_MODE_ENABLE | SNDBDI_MODE_ATTN_ENABLE); | 6494 | tw32(SNDBDI_MODE, SNDBDI_MODE_ENABLE | SNDBDI_MODE_ATTN_ENABLE); |
6519 | tw32(SNDBDS_MODE, SNDBDS_MODE_ENABLE | SNDBDS_MODE_ATTN_ENABLE); | 6495 | tw32(SNDBDS_MODE, SNDBDS_MODE_ENABLE | SNDBDS_MODE_ATTN_ENABLE); |
6520 | 6496 | ||
@@ -6524,13 +6500,11 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy) | |||
6524 | return err; | 6500 | return err; |
6525 | } | 6501 | } |
6526 | 6502 | ||
6527 | #if TG3_TSO_SUPPORT != 0 | ||
6528 | if (tp->tg3_flags2 & TG3_FLG2_TSO_CAPABLE) { | 6503 | if (tp->tg3_flags2 & TG3_FLG2_TSO_CAPABLE) { |
6529 | err = tg3_load_tso_firmware(tp); | 6504 | err = tg3_load_tso_firmware(tp); |
6530 | if (err) | 6505 | if (err) |
6531 | return err; | 6506 | return err; |
6532 | } | 6507 | } |
6533 | #endif | ||
6534 | 6508 | ||
6535 | tp->tx_mode = TX_MODE_ENABLE; | 6509 | tp->tx_mode = TX_MODE_ENABLE; |
6536 | tw32_f(MAC_TX_MODE, tp->tx_mode); | 6510 | tw32_f(MAC_TX_MODE, tp->tx_mode); |
@@ -8062,7 +8036,6 @@ static void tg3_set_msglevel(struct net_device *dev, u32 value) | |||
8062 | tp->msg_enable = value; | 8036 | tp->msg_enable = value; |
8063 | } | 8037 | } |
8064 | 8038 | ||
8065 | #if TG3_TSO_SUPPORT != 0 | ||
8066 | static int tg3_set_tso(struct net_device *dev, u32 value) | 8039 | static int tg3_set_tso(struct net_device *dev, u32 value) |
8067 | { | 8040 | { |
8068 | struct tg3 *tp = netdev_priv(dev); | 8041 | struct tg3 *tp = netdev_priv(dev); |
@@ -8081,7 +8054,6 @@ static int tg3_set_tso(struct net_device *dev, u32 value) | |||
8081 | } | 8054 | } |
8082 | return ethtool_op_set_tso(dev, value); | 8055 | return ethtool_op_set_tso(dev, value); |
8083 | } | 8056 | } |
8084 | #endif | ||
8085 | 8057 | ||
8086 | static int tg3_nway_reset(struct net_device *dev) | 8058 | static int tg3_nway_reset(struct net_device *dev) |
8087 | { | 8059 | { |
@@ -9212,10 +9184,8 @@ static const struct ethtool_ops tg3_ethtool_ops = { | |||
9212 | .set_tx_csum = tg3_set_tx_csum, | 9184 | .set_tx_csum = tg3_set_tx_csum, |
9213 | .get_sg = ethtool_op_get_sg, | 9185 | .get_sg = ethtool_op_get_sg, |
9214 | .set_sg = ethtool_op_set_sg, | 9186 | .set_sg = ethtool_op_set_sg, |
9215 | #if TG3_TSO_SUPPORT != 0 | ||
9216 | .get_tso = ethtool_op_get_tso, | 9187 | .get_tso = ethtool_op_get_tso, |
9217 | .set_tso = tg3_set_tso, | 9188 | .set_tso = tg3_set_tso, |
9218 | #endif | ||
9219 | .self_test_count = tg3_get_test_count, | 9189 | .self_test_count = tg3_get_test_count, |
9220 | .self_test = tg3_self_test, | 9190 | .self_test = tg3_self_test, |
9221 | .get_strings = tg3_get_strings, | 9191 | .get_strings = tg3_get_strings, |
@@ -11856,7 +11826,6 @@ static int __devinit tg3_init_one(struct pci_dev *pdev, | |||
11856 | 11826 | ||
11857 | tg3_init_bufmgr_config(tp); | 11827 | tg3_init_bufmgr_config(tp); |
11858 | 11828 | ||
11859 | #if TG3_TSO_SUPPORT != 0 | ||
11860 | if (tp->tg3_flags2 & TG3_FLG2_HW_TSO) { | 11829 | if (tp->tg3_flags2 & TG3_FLG2_HW_TSO) { |
11861 | tp->tg3_flags2 |= TG3_FLG2_TSO_CAPABLE; | 11830 | tp->tg3_flags2 |= TG3_FLG2_TSO_CAPABLE; |
11862 | } | 11831 | } |
@@ -11881,7 +11850,6 @@ static int __devinit tg3_init_one(struct pci_dev *pdev, | |||
11881 | dev->features |= NETIF_F_TSO6; | 11850 | dev->features |= NETIF_F_TSO6; |
11882 | } | 11851 | } |
11883 | 11852 | ||
11884 | #endif | ||
11885 | 11853 | ||
11886 | if (tp->pci_chip_rev_id == CHIPREV_ID_5705_A1 && | 11854 | if (tp->pci_chip_rev_id == CHIPREV_ID_5705_A1 && |
11887 | !(tp->tg3_flags2 & TG3_FLG2_TSO_CAPABLE) && | 11855 | !(tp->tg3_flags2 & TG3_FLG2_TSO_CAPABLE) && |