diff options
Diffstat (limited to 'drivers/net/tg3.c')
-rw-r--r-- | drivers/net/tg3.c | 20 |
1 files changed, 15 insertions, 5 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c index 2d58406deb00..1c1cf68baa94 100644 --- a/drivers/net/tg3.c +++ b/drivers/net/tg3.c | |||
@@ -7294,9 +7294,12 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy) | |||
7294 | if (err) | 7294 | if (err) |
7295 | return err; | 7295 | return err; |
7296 | 7296 | ||
7297 | if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5784 && | 7297 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717) { |
7298 | GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5761 && | 7298 | val = tr32(TG3PCI_DMA_RW_CTRL) & |
7299 | GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5717) { | 7299 | ~DMA_RWCTRL_DIS_CACHE_ALIGNMENT; |
7300 | tw32(TG3PCI_DMA_RW_CTRL, val | tp->dma_rwctrl); | ||
7301 | } else if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5784 && | ||
7302 | GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5761) { | ||
7300 | /* This value is determined during the probe time DMA | 7303 | /* This value is determined during the probe time DMA |
7301 | * engine test, tg3_test_dma. | 7304 | * engine test, tg3_test_dma. |
7302 | */ | 7305 | */ |
@@ -13329,6 +13332,11 @@ static u32 __devinit tg3_calc_dma_bndry(struct tg3 *tp, u32 val) | |||
13329 | #endif | 13332 | #endif |
13330 | #endif | 13333 | #endif |
13331 | 13334 | ||
13335 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717) { | ||
13336 | val = goal ? 0 : DMA_RWCTRL_DIS_CACHE_ALIGNMENT; | ||
13337 | goto out; | ||
13338 | } | ||
13339 | |||
13332 | if (!goal) | 13340 | if (!goal) |
13333 | goto out; | 13341 | goto out; |
13334 | 13342 | ||
@@ -13523,7 +13531,7 @@ static int __devinit tg3_test_dma(struct tg3 *tp) | |||
13523 | { | 13531 | { |
13524 | dma_addr_t buf_dma; | 13532 | dma_addr_t buf_dma; |
13525 | u32 *buf, saved_dma_rwctrl; | 13533 | u32 *buf, saved_dma_rwctrl; |
13526 | int ret; | 13534 | int ret = 0; |
13527 | 13535 | ||
13528 | buf = pci_alloc_consistent(tp->pdev, TEST_BUFFER_SIZE, &buf_dma); | 13536 | buf = pci_alloc_consistent(tp->pdev, TEST_BUFFER_SIZE, &buf_dma); |
13529 | if (!buf) { | 13537 | if (!buf) { |
@@ -13536,6 +13544,9 @@ static int __devinit tg3_test_dma(struct tg3 *tp) | |||
13536 | 13544 | ||
13537 | tp->dma_rwctrl = tg3_calc_dma_bndry(tp, tp->dma_rwctrl); | 13545 | tp->dma_rwctrl = tg3_calc_dma_bndry(tp, tp->dma_rwctrl); |
13538 | 13546 | ||
13547 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717) | ||
13548 | goto out; | ||
13549 | |||
13539 | if (tp->tg3_flags2 & TG3_FLG2_PCI_EXPRESS) { | 13550 | if (tp->tg3_flags2 & TG3_FLG2_PCI_EXPRESS) { |
13540 | /* DMA read watermark not used on PCIE */ | 13551 | /* DMA read watermark not used on PCIE */ |
13541 | tp->dma_rwctrl |= 0x00180000; | 13552 | tp->dma_rwctrl |= 0x00180000; |
@@ -13608,7 +13619,6 @@ static int __devinit tg3_test_dma(struct tg3 *tp) | |||
13608 | tg3_switch_clocks(tp); | 13619 | tg3_switch_clocks(tp); |
13609 | #endif | 13620 | #endif |
13610 | 13621 | ||
13611 | ret = 0; | ||
13612 | if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5700 && | 13622 | if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5700 && |
13613 | GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5701) | 13623 | GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5701) |
13614 | goto out; | 13624 | goto out; |