diff options
Diffstat (limited to 'drivers/net/tg3.c')
-rw-r--r-- | drivers/net/tg3.c | 95 |
1 files changed, 75 insertions, 20 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c index 014dc2cfe4d6..09440d783e65 100644 --- a/drivers/net/tg3.c +++ b/drivers/net/tg3.c | |||
@@ -64,8 +64,8 @@ | |||
64 | 64 | ||
65 | #define DRV_MODULE_NAME "tg3" | 65 | #define DRV_MODULE_NAME "tg3" |
66 | #define PFX DRV_MODULE_NAME ": " | 66 | #define PFX DRV_MODULE_NAME ": " |
67 | #define DRV_MODULE_VERSION "3.84" | 67 | #define DRV_MODULE_VERSION "3.85" |
68 | #define DRV_MODULE_RELDATE "October 12, 2007" | 68 | #define DRV_MODULE_RELDATE "October 18, 2007" |
69 | 69 | ||
70 | #define TG3_DEF_MAC_MODE 0 | 70 | #define TG3_DEF_MAC_MODE 0 |
71 | #define TG3_DEF_RX_MODE 0 | 71 | #define TG3_DEF_RX_MODE 0 |
@@ -200,6 +200,7 @@ static struct pci_device_id tg3_pci_tbl[] = { | |||
200 | {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5906M)}, | 200 | {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5906M)}, |
201 | {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5784)}, | 201 | {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5784)}, |
202 | {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5764)}, | 202 | {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5764)}, |
203 | {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5723)}, | ||
203 | {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5761)}, | 204 | {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5761)}, |
204 | {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5761E)}, | 205 | {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5761E)}, |
205 | {PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, PCI_DEVICE_ID_SYSKONNECT_9DXX)}, | 206 | {PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, PCI_DEVICE_ID_SYSKONNECT_9DXX)}, |
@@ -5028,10 +5029,7 @@ static int tg3_poll_fw(struct tg3 *tp) | |||
5028 | /* Save PCI command register before chip reset */ | 5029 | /* Save PCI command register before chip reset */ |
5029 | static void tg3_save_pci_state(struct tg3 *tp) | 5030 | static void tg3_save_pci_state(struct tg3 *tp) |
5030 | { | 5031 | { |
5031 | u32 val; | 5032 | pci_read_config_word(tp->pdev, PCI_COMMAND, &tp->pci_cmd); |
5032 | |||
5033 | pci_read_config_dword(tp->pdev, TG3PCI_COMMAND, &val); | ||
5034 | tp->pci_cmd = val; | ||
5035 | } | 5033 | } |
5036 | 5034 | ||
5037 | /* Restore PCI state after chip reset */ | 5035 | /* Restore PCI state after chip reset */ |
@@ -5054,7 +5052,7 @@ static void tg3_restore_pci_state(struct tg3 *tp) | |||
5054 | PCISTATE_ALLOW_APE_SHMEM_WR; | 5052 | PCISTATE_ALLOW_APE_SHMEM_WR; |
5055 | pci_write_config_dword(tp->pdev, TG3PCI_PCISTATE, val); | 5053 | pci_write_config_dword(tp->pdev, TG3PCI_PCISTATE, val); |
5056 | 5054 | ||
5057 | pci_write_config_dword(tp->pdev, TG3PCI_COMMAND, tp->pci_cmd); | 5055 | pci_write_config_word(tp->pdev, PCI_COMMAND, tp->pci_cmd); |
5058 | 5056 | ||
5059 | if (!(tp->tg3_flags2 & TG3_FLG2_PCI_EXPRESS)) { | 5057 | if (!(tp->tg3_flags2 & TG3_FLG2_PCI_EXPRESS)) { |
5060 | pci_write_config_byte(tp->pdev, PCI_CACHE_LINE_SIZE, | 5058 | pci_write_config_byte(tp->pdev, PCI_CACHE_LINE_SIZE, |
@@ -10820,9 +10818,24 @@ out_not_found: | |||
10820 | strcpy(tp->board_part_number, "none"); | 10818 | strcpy(tp->board_part_number, "none"); |
10821 | } | 10819 | } |
10822 | 10820 | ||
10821 | static int __devinit tg3_fw_img_is_valid(struct tg3 *tp, u32 offset) | ||
10822 | { | ||
10823 | u32 val; | ||
10824 | |||
10825 | if (tg3_nvram_read_swab(tp, offset, &val) || | ||
10826 | (val & 0xfc000000) != 0x0c000000 || | ||
10827 | tg3_nvram_read_swab(tp, offset + 4, &val) || | ||
10828 | val != 0) | ||
10829 | return 0; | ||
10830 | |||
10831 | return 1; | ||
10832 | } | ||
10833 | |||
10823 | static void __devinit tg3_read_fw_ver(struct tg3 *tp) | 10834 | static void __devinit tg3_read_fw_ver(struct tg3 *tp) |
10824 | { | 10835 | { |
10825 | u32 val, offset, start; | 10836 | u32 val, offset, start; |
10837 | u32 ver_offset; | ||
10838 | int i, bcnt; | ||
10826 | 10839 | ||
10827 | if (tg3_nvram_read_swab(tp, 0, &val)) | 10840 | if (tg3_nvram_read_swab(tp, 0, &val)) |
10828 | return; | 10841 | return; |
@@ -10835,29 +10848,71 @@ static void __devinit tg3_read_fw_ver(struct tg3 *tp) | |||
10835 | return; | 10848 | return; |
10836 | 10849 | ||
10837 | offset = tg3_nvram_logical_addr(tp, offset); | 10850 | offset = tg3_nvram_logical_addr(tp, offset); |
10838 | if (tg3_nvram_read_swab(tp, offset, &val)) | 10851 | |
10852 | if (!tg3_fw_img_is_valid(tp, offset) || | ||
10853 | tg3_nvram_read_swab(tp, offset + 8, &ver_offset)) | ||
10839 | return; | 10854 | return; |
10840 | 10855 | ||
10841 | if ((val & 0xfc000000) == 0x0c000000) { | 10856 | offset = offset + ver_offset - start; |
10842 | u32 ver_offset, addr; | 10857 | for (i = 0; i < 16; i += 4) { |
10843 | int i; | 10858 | if (tg3_nvram_read(tp, offset + i, &val)) |
10859 | return; | ||
10844 | 10860 | ||
10845 | if (tg3_nvram_read_swab(tp, offset + 4, &val) || | 10861 | val = le32_to_cpu(val); |
10846 | tg3_nvram_read_swab(tp, offset + 8, &ver_offset)) | 10862 | memcpy(tp->fw_ver + i, &val, 4); |
10863 | } | ||
10864 | |||
10865 | if (!(tp->tg3_flags & TG3_FLAG_ENABLE_ASF) || | ||
10866 | (tp->tg3_flags & TG3_FLG3_ENABLE_APE)) | ||
10867 | return; | ||
10868 | |||
10869 | for (offset = TG3_NVM_DIR_START; | ||
10870 | offset < TG3_NVM_DIR_END; | ||
10871 | offset += TG3_NVM_DIRENT_SIZE) { | ||
10872 | if (tg3_nvram_read_swab(tp, offset, &val)) | ||
10847 | return; | 10873 | return; |
10848 | 10874 | ||
10849 | if (val != 0) | 10875 | if ((val >> TG3_NVM_DIRTYPE_SHIFT) == TG3_NVM_DIRTYPE_ASFINI) |
10876 | break; | ||
10877 | } | ||
10878 | |||
10879 | if (offset == TG3_NVM_DIR_END) | ||
10880 | return; | ||
10881 | |||
10882 | if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS)) | ||
10883 | start = 0x08000000; | ||
10884 | else if (tg3_nvram_read_swab(tp, offset - 4, &start)) | ||
10885 | return; | ||
10886 | |||
10887 | if (tg3_nvram_read_swab(tp, offset + 4, &offset) || | ||
10888 | !tg3_fw_img_is_valid(tp, offset) || | ||
10889 | tg3_nvram_read_swab(tp, offset + 8, &val)) | ||
10890 | return; | ||
10891 | |||
10892 | offset += val - start; | ||
10893 | |||
10894 | bcnt = strlen(tp->fw_ver); | ||
10895 | |||
10896 | tp->fw_ver[bcnt++] = ','; | ||
10897 | tp->fw_ver[bcnt++] = ' '; | ||
10898 | |||
10899 | for (i = 0; i < 4; i++) { | ||
10900 | if (tg3_nvram_read(tp, offset, &val)) | ||
10850 | return; | 10901 | return; |
10851 | 10902 | ||
10852 | addr = offset + ver_offset - start; | 10903 | val = le32_to_cpu(val); |
10853 | for (i = 0; i < 16; i += 4) { | 10904 | offset += sizeof(val); |
10854 | if (tg3_nvram_read(tp, addr + i, &val)) | ||
10855 | return; | ||
10856 | 10905 | ||
10857 | val = cpu_to_le32(val); | 10906 | if (bcnt > TG3_VER_SIZE - sizeof(val)) { |
10858 | memcpy(tp->fw_ver + i, &val, 4); | 10907 | memcpy(&tp->fw_ver[bcnt], &val, TG3_VER_SIZE - bcnt); |
10908 | break; | ||
10859 | } | 10909 | } |
10910 | |||
10911 | memcpy(&tp->fw_ver[bcnt], &val, sizeof(val)); | ||
10912 | bcnt += sizeof(val); | ||
10860 | } | 10913 | } |
10914 | |||
10915 | tp->fw_ver[TG3_VER_SIZE - 1] = 0; | ||
10861 | } | 10916 | } |
10862 | 10917 | ||
10863 | static struct pci_dev * __devinit tg3_find_peer(struct tg3 *); | 10918 | static struct pci_dev * __devinit tg3_find_peer(struct tg3 *); |