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path: root/drivers/net/tg3.c
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Diffstat (limited to 'drivers/net/tg3.c')
-rw-r--r--drivers/net/tg3.c15
1 files changed, 15 insertions, 0 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 833cb9b7f343..b865c5d44837 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -6369,6 +6369,21 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
6369 val = tr32(TG3_CPMU_CTRL); 6369 val = tr32(TG3_CPMU_CTRL);
6370 val &= ~(CPMU_CTRL_LINK_AWARE_MODE | CPMU_CTRL_LINK_IDLE_MODE); 6370 val &= ~(CPMU_CTRL_LINK_AWARE_MODE | CPMU_CTRL_LINK_IDLE_MODE);
6371 tw32(TG3_CPMU_CTRL, val); 6371 tw32(TG3_CPMU_CTRL, val);
6372
6373 val = tr32(TG3_CPMU_LSPD_10MB_CLK);
6374 val &= ~CPMU_LSPD_10MB_MACCLK_MASK;
6375 val |= CPMU_LSPD_10MB_MACCLK_6_25;
6376 tw32(TG3_CPMU_LSPD_10MB_CLK, val);
6377
6378 val = tr32(TG3_CPMU_LNK_AWARE_PWRMD);
6379 val &= ~CPMU_LNK_AWARE_MACCLK_MASK;
6380 val |= CPMU_LNK_AWARE_MACCLK_6_25;
6381 tw32(TG3_CPMU_LNK_AWARE_PWRMD, val);
6382
6383 val = tr32(TG3_CPMU_HST_ACC);
6384 val &= ~CPMU_HST_ACC_MACCLK_MASK;
6385 val |= CPMU_HST_ACC_MACCLK_6_25;
6386 tw32(TG3_CPMU_HST_ACC, val);
6372 } 6387 }
6373 6388
6374 /* This works around an issue with Athlon chipsets on 6389 /* This works around an issue with Athlon chipsets on