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path: root/drivers/net/tg3.c
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Diffstat (limited to 'drivers/net/tg3.c')
-rw-r--r--drivers/net/tg3.c45
1 files changed, 31 insertions, 14 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 4b97cb601361..9ba18e1bc341 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -12614,19 +12614,6 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
12614 else 12614 else
12615 tp->tg3_flags &= ~TG3_FLAG_POLL_SERDES; 12615 tp->tg3_flags &= ~TG3_FLAG_POLL_SERDES;
12616 12616
12617 /* All chips before 5787 can get confused if TX buffers
12618 * straddle the 4GB address boundary in some cases.
12619 */
12620 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 ||
12621 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787 ||
12622 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784 ||
12623 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5761 ||
12624 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5785 ||
12625 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906)
12626 tp->dev->hard_start_xmit = tg3_start_xmit;
12627 else
12628 tp->dev->hard_start_xmit = tg3_start_xmit_dma_bug;
12629
12630 tp->rx_offset = 2; 12617 tp->rx_offset = 2;
12631 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5701 && 12618 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5701 &&
12632 (tp->tg3_flags & TG3_FLAG_PCIX_MODE) != 0) 12619 (tp->tg3_flags & TG3_FLAG_PCIX_MODE) != 0)
@@ -13346,6 +13333,26 @@ static void __devinit tg3_init_coal(struct tg3 *tp)
13346static const struct net_device_ops tg3_netdev_ops = { 13333static const struct net_device_ops tg3_netdev_ops = {
13347 .ndo_open = tg3_open, 13334 .ndo_open = tg3_open,
13348 .ndo_stop = tg3_close, 13335 .ndo_stop = tg3_close,
13336 .ndo_start_xmit = tg3_start_xmit,
13337 .ndo_get_stats = tg3_get_stats,
13338 .ndo_validate_addr = eth_validate_addr,
13339 .ndo_set_multicast_list = tg3_set_rx_mode,
13340 .ndo_set_mac_address = tg3_set_mac_addr,
13341 .ndo_do_ioctl = tg3_ioctl,
13342 .ndo_tx_timeout = tg3_tx_timeout,
13343 .ndo_change_mtu = tg3_change_mtu,
13344#if TG3_VLAN_TAG_USED
13345 .ndo_vlan_rx_register = tg3_vlan_rx_register,
13346#endif
13347#ifdef CONFIG_NET_POLL_CONTROLLER
13348 .ndo_poll_controller = tg3_poll_controller,
13349#endif
13350};
13351
13352static const struct net_device_ops tg3_netdev_ops_dma_bug = {
13353 .ndo_open = tg3_open,
13354 .ndo_stop = tg3_close,
13355 .ndo_start_xmit = tg3_start_xmit_dma_bug,
13349 .ndo_get_stats = tg3_get_stats, 13356 .ndo_get_stats = tg3_get_stats,
13350 .ndo_validate_addr = eth_validate_addr, 13357 .ndo_validate_addr = eth_validate_addr,
13351 .ndo_set_multicast_list = tg3_set_rx_mode, 13358 .ndo_set_multicast_list = tg3_set_rx_mode,
@@ -13475,7 +13482,6 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,
13475 tp->rx_jumbo_pending = TG3_DEF_RX_JUMBO_RING_PENDING; 13482 tp->rx_jumbo_pending = TG3_DEF_RX_JUMBO_RING_PENDING;
13476 tp->tx_pending = TG3_DEF_TX_RING_PENDING; 13483 tp->tx_pending = TG3_DEF_TX_RING_PENDING;
13477 13484
13478 dev->netdev_ops = &tg3_netdev_ops;
13479 netif_napi_add(dev, &tp->napi, tg3_poll, 64); 13485 netif_napi_add(dev, &tp->napi, tg3_poll, 64);
13480 dev->ethtool_ops = &tg3_ethtool_ops; 13486 dev->ethtool_ops = &tg3_ethtool_ops;
13481 dev->watchdog_timeo = TG3_TX_TIMEOUT; 13487 dev->watchdog_timeo = TG3_TX_TIMEOUT;
@@ -13488,6 +13494,17 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,
13488 goto err_out_iounmap; 13494 goto err_out_iounmap;
13489 } 13495 }
13490 13496
13497 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 ||
13498 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787 ||
13499 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784 ||
13500 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5761 ||
13501 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5785 ||
13502 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906)
13503 dev->netdev_ops = &tg3_netdev_ops;
13504 else
13505 dev->netdev_ops = &tg3_netdev_ops_dma_bug;
13506
13507
13491 /* The EPB bridge inside 5714, 5715, and 5780 and any 13508 /* The EPB bridge inside 5714, 5715, and 5780 and any
13492 * device behind the EPB cannot support DMA addresses > 40-bit. 13509 * device behind the EPB cannot support DMA addresses > 40-bit.
13493 * On 64-bit systems with IOMMU, use 40-bit dma_mask. 13510 * On 64-bit systems with IOMMU, use 40-bit dma_mask.