aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/net/tg3.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/net/tg3.c')
-rw-r--r--drivers/net/tg3.c52
1 files changed, 36 insertions, 16 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 8e398499c045..c20bb998e0e5 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -68,8 +68,8 @@
68 68
69#define DRV_MODULE_NAME "tg3" 69#define DRV_MODULE_NAME "tg3"
70#define PFX DRV_MODULE_NAME ": " 70#define PFX DRV_MODULE_NAME ": "
71#define DRV_MODULE_VERSION "3.67" 71#define DRV_MODULE_VERSION "3.69"
72#define DRV_MODULE_RELDATE "October 18, 2006" 72#define DRV_MODULE_RELDATE "November 15, 2006"
73 73
74#define TG3_DEF_MAC_MODE 0 74#define TG3_DEF_MAC_MODE 0
75#define TG3_DEF_RX_MODE 0 75#define TG3_DEF_RX_MODE 0
@@ -4728,10 +4728,11 @@ static int tg3_poll_fw(struct tg3 *tp)
4728 u32 val; 4728 u32 val;
4729 4729
4730 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) { 4730 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) {
4731 for (i = 0; i < 400; i++) { 4731 /* Wait up to 20ms for init done. */
4732 for (i = 0; i < 200; i++) {
4732 if (tr32(VCPU_STATUS) & VCPU_STATUS_INIT_DONE) 4733 if (tr32(VCPU_STATUS) & VCPU_STATUS_INIT_DONE)
4733 return 0; 4734 return 0;
4734 udelay(10); 4735 udelay(100);
4735 } 4736 }
4736 return -ENODEV; 4737 return -ENODEV;
4737 } 4738 }
@@ -6014,7 +6015,7 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
6014 tg3_abort_hw(tp, 1); 6015 tg3_abort_hw(tp, 1);
6015 } 6016 }
6016 6017
6017 if ((tp->tg3_flags2 & TG3_FLG2_MII_SERDES) && reset_phy) 6018 if (reset_phy)
6018 tg3_phy_reset(tp); 6019 tg3_phy_reset(tp);
6019 6020
6020 err = tg3_chip_reset(tp); 6021 err = tg3_chip_reset(tp);
@@ -6574,7 +6575,7 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
6574 tw32(GRC_LOCAL_CTRL, tp->grc_local_ctrl); 6575 tw32(GRC_LOCAL_CTRL, tp->grc_local_ctrl);
6575 } 6576 }
6576 6577
6577 err = tg3_setup_phy(tp, reset_phy); 6578 err = tg3_setup_phy(tp, 0);
6578 if (err) 6579 if (err)
6579 return err; 6580 return err;
6580 6581
@@ -6978,8 +6979,10 @@ static int tg3_open(struct net_device *dev)
6978 tg3_full_lock(tp, 0); 6979 tg3_full_lock(tp, 0);
6979 6980
6980 err = tg3_set_power_state(tp, PCI_D0); 6981 err = tg3_set_power_state(tp, PCI_D0);
6981 if (err) 6982 if (err) {
6983 tg3_full_unlock(tp);
6982 return err; 6984 return err;
6985 }
6983 6986
6984 tg3_disable_ints(tp); 6987 tg3_disable_ints(tp);
6985 tp->tg3_flags &= ~TG3_FLAG_INIT_COMPLETE; 6988 tp->tg3_flags &= ~TG3_FLAG_INIT_COMPLETE;
@@ -10212,7 +10215,7 @@ skip_phy_reset:
10212static void __devinit tg3_read_partno(struct tg3 *tp) 10215static void __devinit tg3_read_partno(struct tg3 *tp)
10213{ 10216{
10214 unsigned char vpd_data[256]; 10217 unsigned char vpd_data[256];
10215 int i; 10218 unsigned int i;
10216 u32 magic; 10219 u32 magic;
10217 10220
10218 if (tg3_nvram_read_swab(tp, 0x0, &magic)) 10221 if (tg3_nvram_read_swab(tp, 0x0, &magic))
@@ -10258,9 +10261,9 @@ static void __devinit tg3_read_partno(struct tg3 *tp)
10258 } 10261 }
10259 10262
10260 /* Now parse and find the part number. */ 10263 /* Now parse and find the part number. */
10261 for (i = 0; i < 256; ) { 10264 for (i = 0; i < 254; ) {
10262 unsigned char val = vpd_data[i]; 10265 unsigned char val = vpd_data[i];
10263 int block_end; 10266 unsigned int block_end;
10264 10267
10265 if (val == 0x82 || val == 0x91) { 10268 if (val == 0x82 || val == 0x91) {
10266 i = (i + 3 + 10269 i = (i + 3 +
@@ -10276,21 +10279,26 @@ static void __devinit tg3_read_partno(struct tg3 *tp)
10276 (vpd_data[i + 1] + 10279 (vpd_data[i + 1] +
10277 (vpd_data[i + 2] << 8))); 10280 (vpd_data[i + 2] << 8)));
10278 i += 3; 10281 i += 3;
10279 while (i < block_end) { 10282
10283 if (block_end > 256)
10284 goto out_not_found;
10285
10286 while (i < (block_end - 2)) {
10280 if (vpd_data[i + 0] == 'P' && 10287 if (vpd_data[i + 0] == 'P' &&
10281 vpd_data[i + 1] == 'N') { 10288 vpd_data[i + 1] == 'N') {
10282 int partno_len = vpd_data[i + 2]; 10289 int partno_len = vpd_data[i + 2];
10283 10290
10284 if (partno_len > 24) 10291 i += 3;
10292 if (partno_len > 24 || (partno_len + i) > 256)
10285 goto out_not_found; 10293 goto out_not_found;
10286 10294
10287 memcpy(tp->board_part_number, 10295 memcpy(tp->board_part_number,
10288 &vpd_data[i + 3], 10296 &vpd_data[i], partno_len);
10289 partno_len);
10290 10297
10291 /* Success. */ 10298 /* Success. */
10292 return; 10299 return;
10293 } 10300 }
10301 i += 3 + vpd_data[i + 2];
10294 } 10302 }
10295 10303
10296 /* Part number not found. */ 10304 /* Part number not found. */
@@ -10360,7 +10368,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
10360 u32 pci_state_reg, grc_misc_cfg; 10368 u32 pci_state_reg, grc_misc_cfg;
10361 u32 val; 10369 u32 val;
10362 u16 pci_cmd; 10370 u16 pci_cmd;
10363 int err; 10371 int err, pcie_cap;
10364 10372
10365 /* Force memory write invalidate off. If we leave it on, 10373 /* Force memory write invalidate off. If we leave it on,
10366 * then on 5700_BX chips we have to enable a workaround. 10374 * then on 5700_BX chips we have to enable a workaround.
@@ -10535,8 +10543,19 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
10535 GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5906) 10543 GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5906)
10536 tp->tg3_flags2 |= TG3_FLG2_JUMBO_CAPABLE; 10544 tp->tg3_flags2 |= TG3_FLG2_JUMBO_CAPABLE;
10537 10545
10538 if (pci_find_capability(tp->pdev, PCI_CAP_ID_EXP) != 0) 10546 pcie_cap = pci_find_capability(tp->pdev, PCI_CAP_ID_EXP);
10547 if (pcie_cap != 0) {
10539 tp->tg3_flags2 |= TG3_FLG2_PCI_EXPRESS; 10548 tp->tg3_flags2 |= TG3_FLG2_PCI_EXPRESS;
10549 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) {
10550 u16 lnkctl;
10551
10552 pci_read_config_word(tp->pdev,
10553 pcie_cap + PCI_EXP_LNKCTL,
10554 &lnkctl);
10555 if (lnkctl & PCI_EXP_LNKCTL_CLKREQ_EN)
10556 tp->tg3_flags2 &= ~TG3_FLG2_HW_TSO_2;
10557 }
10558 }
10540 10559
10541 /* If we have an AMD 762 or VIA K8T800 chipset, write 10560 /* If we have an AMD 762 or VIA K8T800 chipset, write
10542 * reordering to the mailbox registers done by the host 10561 * reordering to the mailbox registers done by the host
@@ -11803,6 +11822,7 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,
11803 else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5700 || 11822 else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5700 ||
11804 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5701 || 11823 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5701 ||
11805 tp->pci_chip_rev_id == CHIPREV_ID_5705_A0 || 11824 tp->pci_chip_rev_id == CHIPREV_ID_5705_A0 ||
11825 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906 ||
11806 (tp->tg3_flags & TG3_FLAG_ENABLE_ASF) != 0) { 11826 (tp->tg3_flags & TG3_FLAG_ENABLE_ASF) != 0) {
11807 tp->tg3_flags2 &= ~TG3_FLG2_TSO_CAPABLE; 11827 tp->tg3_flags2 &= ~TG3_FLG2_TSO_CAPABLE;
11808 } else { 11828 } else {