1 files changed, 76 insertions, 8 deletions

diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 88829eb9568e..b5473325bff4 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -69,8 +69,8 @@
 
 #define DRV_MODULE_NAME         "tg3"
 #define PFX DRV_MODULE_NAME     ": "
-#define DRV_MODULE_VERSION      "3.53"
-#define DRV_MODULE_RELDATE      "Mar 22, 2006"
+#define DRV_MODULE_VERSION      "3.54"
+#define DRV_MODULE_RELDATE      "Mar 23, 2006"
 
 #define TG3_DEF_MAC_MODE        0
 #define TG3_DEF_RX_MODE         0
@@ -225,6 +225,10 @@ static struct pci_device_id tg3_pci_tbl[] = {
           PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
         { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5754M,
           PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
+        { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5755,
+          PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
+        { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5755M,
+          PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
         { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5787,
           PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
         { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5787M,
@@ -4557,6 +4561,7 @@ static int tg3_chip_reset(struct tg3 *tp)
         }
 
         if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752 ||
+            GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 ||
             GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787)
                 tw32(GRC_FASTBOOT_PC, 0);
 
@@ -6152,6 +6157,9 @@ static int tg3_reset_hw(struct tg3 *tp)
                         gpio_mask |= GRC_LCLCTRL_GPIO_OE3 |
                                      GRC_LCLCTRL_GPIO_OUTPUT3;
 
+                if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755)
+                        gpio_mask |= GRC_LCLCTRL_GPIO_UART_SEL;
+
                 tp->grc_local_ctrl |= tr32(GRC_LOCAL_CTRL) & gpio_mask;
 
                 /* GPIO1 must be driven high for eeprom write protect */
@@ -6191,7 +6199,8 @@ static int tg3_reset_hw(struct tg3 *tp)
         }
 
         /* Enable host coalescing bug fix */
-        if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787)
+        if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755) ||
+            (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787))
                 val |= (1 << 29);
 
         tw32_f(WDMAC_MODE, val);
@@ -6249,6 +6258,9 @@ static int tg3_reset_hw(struct tg3 *tp)
         udelay(100);
 
         tp->rx_mode = RX_MODE_ENABLE;
+        if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755)
+                tp->rx_mode |= RX_MODE_IPV6_CSUM_ENABLE;
+
         tw32_f(MAC_RX_MODE, tp->rx_mode);
         udelay(10);
 
@@ -7907,7 +7919,8 @@ static int tg3_set_tx_csum(struct net_device *dev, u32 data)
                 return 0;
         }
   
-        if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787)
+        if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 ||
+            GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787)
                 ethtool_op_set_tx_hw_csum(dev, data);
         else
                 ethtool_op_set_tx_csum(dev, data);
@@ -8332,7 +8345,8 @@ static int tg3_test_memory(struct tg3 *tp)
         int i;
 
         if (tp->tg3_flags2 & TG3_FLG2_5705_PLUS) {
-                if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787)
+                if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 ||
+                    GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787)
                         mem_tbl = mem_tbl_5755;
                 else
                         mem_tbl = mem_tbl_5705;
@@ -8924,6 +8938,47 @@ static void __devinit tg3_get_5752_nvram_info(struct tg3 *tp)
         }
 }
 
+static void __devinit tg3_get_5755_nvram_info(struct tg3 *tp)
+{
+        u32 nvcfg1;
+
+        nvcfg1 = tr32(NVRAM_CFG1);
+
+        /* NVRAM protection for TPM */
+        if (nvcfg1 & (1 << 27))
+                tp->tg3_flags2 |= TG3_FLG2_PROTECTED_NVRAM;
+
+        switch (nvcfg1 & NVRAM_CFG1_5752VENDOR_MASK) {
+                case FLASH_5755VENDOR_ATMEL_EEPROM_64KHZ:
+                case FLASH_5755VENDOR_ATMEL_EEPROM_376KHZ:
+                        tp->nvram_jedecnum = JEDEC_ATMEL;
+                        tp->tg3_flags |= TG3_FLAG_NVRAM_BUFFERED;
+                        tp->nvram_pagesize = ATMEL_AT24C512_CHIP_SIZE;
+
+                        nvcfg1 &= ~NVRAM_CFG1_COMPAT_BYPASS;
+                        tw32(NVRAM_CFG1, nvcfg1);
+                        break;
+                case FLASH_5752VENDOR_ATMEL_FLASH_BUFFERED:
+                case FLASH_5755VENDOR_ATMEL_FLASH_1:
+                case FLASH_5755VENDOR_ATMEL_FLASH_2:
+                case FLASH_5755VENDOR_ATMEL_FLASH_3:
+                case FLASH_5755VENDOR_ATMEL_FLASH_4:
+                        tp->nvram_jedecnum = JEDEC_ATMEL;
+                        tp->tg3_flags |= TG3_FLAG_NVRAM_BUFFERED;
+                        tp->tg3_flags2 |= TG3_FLG2_FLASH;
+                        tp->nvram_pagesize = 264;
+                        break;
+                case FLASH_5752VENDOR_ST_M45PE10:
+                case FLASH_5752VENDOR_ST_M45PE20:
+                case FLASH_5752VENDOR_ST_M45PE40:
+                        tp->nvram_jedecnum = JEDEC_ST;
+                        tp->tg3_flags |= TG3_FLAG_NVRAM_BUFFERED;
+                        tp->tg3_flags2 |= TG3_FLG2_FLASH;
+                        tp->nvram_pagesize = 256;
+                        break;
+        }
+}
+
 static void __devinit tg3_get_5787_nvram_info(struct tg3 *tp)
 {
         u32 nvcfg1;
@@ -8997,6 +9052,8 @@ static void __devinit tg3_nvram_init(struct tg3 *tp)
 
                 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752)
                         tg3_get_5752_nvram_info(tp);
+                else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755)
+                        tg3_get_5755_nvram_info(tp);
                 else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787)
                         tg3_get_5787_nvram_info(tp);
                 else
@@ -9310,6 +9367,7 @@ static int tg3_nvram_write_block_buffered(struct tg3 *tp, u32 offset, u32 len,
                         nvram_cmd |= NVRAM_CMD_LAST;
 
                 if ((GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5752) &&
+                    (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5755) &&
                     (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5787) &&
                     (tp->nvram_jedecnum == JEDEC_ST) &&
                     (nvram_cmd & NVRAM_CMD_FIRST)) {
@@ -10044,6 +10102,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
 
         if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750 ||
             GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752 ||
+            GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 ||
             GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787 ||
             (tp->tg3_flags2 & TG3_FLG2_5780_CLASS))
                 tp->tg3_flags2 |= TG3_FLG2_5750_PLUS;
@@ -10053,7 +10112,8 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
                 tp->tg3_flags2 |= TG3_FLG2_5705_PLUS;
 
         if (tp->tg3_flags2 & TG3_FLG2_5750_PLUS) {
-                if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787) {
+                if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 ||
+                    GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787) {
                         tp->tg3_flags2 |= TG3_FLG2_HW_TSO_2;
                         tp->tg3_flags2 |= TG3_FLG2_1SHOT_MSI;
                 } else
@@ -10063,6 +10123,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
         if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5705 &&
             GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5750 &&
             GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5752 &&
+            GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5755 &&
             GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5787)
                 tp->tg3_flags2 |= TG3_FLG2_JUMBO_CAPABLE;
 
@@ -10219,6 +10280,9 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
         else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752)
                 tp->grc_local_ctrl |= GRC_LCLCTRL_GPIO_OE3;
 
+        if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755)
+                tp->grc_local_ctrl |= GRC_LCLCTRL_GPIO_UART_SEL;
+
         /* Force the chip into D0. */
         err = tg3_set_power_state(tp, PCI_D0);
         if (err) {
@@ -10274,6 +10338,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
                 tp->tg3_flags2 |= TG3_FLG2_PHY_5704_A0_BUG;
 
         if ((tp->tg3_flags2 & TG3_FLG2_5705_PLUS) &&
+            (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5755) &&
             (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5787))
                 tp->tg3_flags2 |= TG3_FLG2_PHY_BER_BUG;
 
@@ -10413,7 +10478,8 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
         /* All chips before 5787 can get confused if TX buffers
          * straddle the 4GB address boundary in some cases.
          */
-        if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787)
+        if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 ||
+            GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787)
                 tp->dev->hard_start_xmit = tg3_start_xmit;
         else
                 tp->dev->hard_start_xmit = tg3_start_xmit_dma_bug;
@@ -11002,6 +11068,7 @@ static char * __devinit tg3_phy_string(struct tg3 *tp)
         case PHY_ID_BCM5752:    return "5752";
         case PHY_ID_BCM5714:    return "5714";
         case PHY_ID_BCM5780:    return "5780";
+        case PHY_ID_BCM5755:    return "5755";
         case PHY_ID_BCM5787:    return "5787";
         case PHY_ID_BCM8002:    return "8002/serdes";
         case 0:                 return "serdes";
@@ -11350,7 +11417,8 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,
          * checksumming.
          */
         if ((tp->tg3_flags & TG3_FLAG_BROKEN_CHECKSUMS) == 0) {
-                if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787)
+                if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 ||
+                    GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787)
                         dev->features |= NETIF_F_HW_CSUM;
                 else
                         dev->features |= NETIF_F_IP_CSUM;