1 files changed, 110 insertions, 154 deletions

diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 7841a8f69998..6be418591df9 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -4,7 +4,7 @@
  * Copyright (C) 2001, 2002, 2003, 2004 David S. Miller (davem@redhat.com)
  * Copyright (C) 2001, 2002, 2003 Jeff Garzik (jgarzik@pobox.com)
  * Copyright (C) 2004 Sun Microsystems Inc.
- * Copyright (C) 2005-2010 Broadcom Corporation.
+ * Copyright (C) 2005-2011 Broadcom Corporation.
  *
  * Firmware is:
  *      Derived from proprietary unpublished source code,
@@ -60,20 +60,14 @@
 #define BAR_0   0
 #define BAR_2   2
 
-#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
-#define TG3_VLAN_TAG_USED 1
-#else
-#define TG3_VLAN_TAG_USED 0
-#endif
-
 #include "tg3.h"
 
 #define DRV_MODULE_NAME         "tg3"
 #define TG3_MAJ_NUM                     3
-#define TG3_MIN_NUM                     116
+#define TG3_MIN_NUM                     117
 #define DRV_MODULE_VERSION      \
         __stringify(TG3_MAJ_NUM) "." __stringify(TG3_MIN_NUM)
-#define DRV_MODULE_RELDATE      "December 3, 2010"
+#define DRV_MODULE_RELDATE      "January 25, 2011"
 
 #define TG3_DEF_MAC_MODE        0
 #define TG3_DEF_RX_MODE         0
@@ -134,9 +128,6 @@
                                  TG3_TX_RING_SIZE)
 #define NEXT_TX(N)              (((N) + 1) & (TG3_TX_RING_SIZE - 1))
 
-#define TG3_RX_DMA_ALIGN                16
-#define TG3_RX_HEADROOM                 ALIGN(VLAN_HLEN, TG3_RX_DMA_ALIGN)
-
 #define TG3_DMA_BYTE_ENAB               64
 
 #define TG3_RX_STD_DMA_SZ               1536
@@ -1785,9 +1776,29 @@ static void tg3_phy_eee_adjust(struct tg3 *tp, u32 current_link_up)
                 tg3_phy_cl45_read(tp, MDIO_MMD_AN,
                                   TG3_CL45_D7_EEERES_STAT, &val);
 
-                if (val == TG3_CL45_D7_EEERES_STAT_LP_1000T ||
-                    val == TG3_CL45_D7_EEERES_STAT_LP_100TX)
+                switch (val) {
+                case TG3_CL45_D7_EEERES_STAT_LP_1000T:
+                        switch (GET_ASIC_REV(tp->pci_chip_rev_id)) {
+                        case ASIC_REV_5717:
+                        case ASIC_REV_5719:
+                        case ASIC_REV_57765:
+                                /* Enable SM_DSP clock and tx 6dB coding. */
+                                val = MII_TG3_AUXCTL_SHDWSEL_AUXCTL |
+                                      MII_TG3_AUXCTL_ACTL_SMDSP_ENA |
+                                      MII_TG3_AUXCTL_ACTL_TX_6DB;
+                                tg3_writephy(tp, MII_TG3_AUX_CTRL, val);
+
+                                tg3_phydsp_write(tp, MII_TG3_DSP_TAP26, 0x0000);
+
+                                /* Turn off SM_DSP clock. */
+                                val = MII_TG3_AUXCTL_SHDWSEL_AUXCTL |
+                                      MII_TG3_AUXCTL_ACTL_TX_6DB;
+                                tg3_writephy(tp, MII_TG3_AUX_CTRL, val);
+                        }
+                        /* Fallthrough */
+                case TG3_CL45_D7_EEERES_STAT_LP_100TX:
                         tp->setlpicnt = 2;
+                }
         }
 
         if (!tp->setlpicnt) {
@@ -2977,11 +2988,19 @@ static void tg3_phy_copper_begin(struct tg3 *tp)
                       MII_TG3_AUXCTL_ACTL_TX_6DB;
                 tg3_writephy(tp, MII_TG3_AUX_CTRL, val);
 
-                if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
-                     GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) &&
-                    !tg3_phydsp_read(tp, MII_TG3_DSP_CH34TP2, &val))
-                        tg3_phydsp_write(tp, MII_TG3_DSP_CH34TP2,
-                                         val | MII_TG3_DSP_CH34TP2_HIBW01);
+                switch (GET_ASIC_REV(tp->pci_chip_rev_id)) {
+                case ASIC_REV_5717:
+                case ASIC_REV_57765:
+                        if (!tg3_phydsp_read(tp, MII_TG3_DSP_CH34TP2, &val))
+                                tg3_phydsp_write(tp, MII_TG3_DSP_CH34TP2, val |
+                                                 MII_TG3_DSP_CH34TP2_HIBW01);
+                        /* Fall through */
+                case ASIC_REV_5719:
+                        val = MII_TG3_DSP_TAP26_ALNOKO |
+                              MII_TG3_DSP_TAP26_RMRXSTO |
+                              MII_TG3_DSP_TAP26_OPCSINPT;
+                        tg3_phydsp_write(tp, MII_TG3_DSP_TAP26, val);
+                }
 
                 val = 0;
                 if (tp->link_config.autoneg == AUTONEG_ENABLE) {
@@ -4722,8 +4741,6 @@ static int tg3_rx(struct tg3_napi *tnapi, int budget)
                 struct sk_buff *skb;
                 dma_addr_t dma_addr;
                 u32 opaque_key, desc_idx, *post_ptr;
-                bool hw_vlan __maybe_unused = false;
-                u16 vtag __maybe_unused = 0;
 
                 desc_idx = desc->opaque & RXD_OPAQUE_INDEX_MASK;
                 opaque_key = desc->opaque & RXD_OPAQUE_RING_MASK;
@@ -4782,12 +4799,12 @@ static int tg3_rx(struct tg3_napi *tnapi, int budget)
                         tg3_recycle_rx(tnapi, tpr, opaque_key,
                                        desc_idx, *post_ptr);
 
-                        copy_skb = netdev_alloc_skb(tp->dev, len + VLAN_HLEN +
+                        copy_skb = netdev_alloc_skb(tp->dev, len +
                                                     TG3_RAW_IP_ALIGN);
                         if (copy_skb == NULL)
                                 goto drop_it_no_recycle;
 
-                        skb_reserve(copy_skb, TG3_RAW_IP_ALIGN + VLAN_HLEN);
+                        skb_reserve(copy_skb, TG3_RAW_IP_ALIGN);
                         skb_put(copy_skb, len);
                         pci_dma_sync_single_for_cpu(tp->pdev, dma_addr, len, PCI_DMA_FROMDEVICE);
                         skb_copy_from_linear_data(skb, copy_skb->data, len);
@@ -4814,30 +4831,11 @@ static int tg3_rx(struct tg3_napi *tnapi, int budget)
                 }
 
                 if (desc->type_flags & RXD_FLAG_VLAN &&
-                    !(tp->rx_mode & RX_MODE_KEEP_VLAN_TAG)) {
-                        vtag = desc->err_vlan & RXD_VLAN_MASK;
-#if TG3_VLAN_TAG_USED
-                        if (tp->vlgrp)
-                                hw_vlan = true;
-                        else
-#endif
-                        {
-                                struct vlan_ethhdr *ve = (struct vlan_ethhdr *)
-                                                    __skb_push(skb, VLAN_HLEN);
-
-                                memmove(ve, skb->data + VLAN_HLEN,
-                                        ETH_ALEN * 2);
-                                ve->h_vlan_proto = htons(ETH_P_8021Q);
-                                ve->h_vlan_TCI = htons(vtag);
-                        }
-                }
+                    !(tp->rx_mode & RX_MODE_KEEP_VLAN_TAG))
+                        __vlan_hwaccel_put_tag(skb,
+                                               desc->err_vlan & RXD_VLAN_MASK);
 
-#if TG3_VLAN_TAG_USED
-                if (hw_vlan)
-                        vlan_gro_receive(&tnapi->napi, tp->vlgrp, vtag, skb);
-                else
-#endif
-                        napi_gro_receive(&tnapi->napi, skb);
+                napi_gro_receive(&tnapi->napi, skb);
 
                 received++;
                 budget--;
@@ -5740,11 +5738,9 @@ static netdev_tx_t tg3_start_xmit(struct sk_buff *skb,
                 base_flags |= TXD_FLAG_TCPUDP_CSUM;
         }
 
-#if TG3_VLAN_TAG_USED
         if (vlan_tx_tag_present(skb))
                 base_flags |= (TXD_FLAG_VLAN |
                                (vlan_tx_tag_get(skb) << 16));
-#endif
 
         len = skb_headlen(skb);
 
@@ -5986,11 +5982,10 @@ static netdev_tx_t tg3_start_xmit_dma_bug(struct sk_buff *skb,
                         }
                 }
         }
-#if TG3_VLAN_TAG_USED
+
         if (vlan_tx_tag_present(skb))
                 base_flags |= (TXD_FLAG_VLAN |
                                (vlan_tx_tag_get(skb) << 16));
-#endif
 
         if ((tp->tg3_flags3 & TG3_FLG3_USE_JUMBO_BDFLAG) &&
             !mss && skb->len > VLAN_ETH_FRAME_LEN)
@@ -7834,7 +7829,7 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
                        TG3_CPMU_DBTMR1_LNKIDLE_2047US);
 
                 tw32_f(TG3_CPMU_EEE_DBTMR2,
-                       TG3_CPMU_DBTMR1_APE_TX_2047US |
+                       TG3_CPMU_DBTMR2_APE_TX_2047US |
                        TG3_CPMU_DBTMR2_TXIDXEQ_2047US);
         }
 
@@ -8108,8 +8103,9 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
         /* Program the jumbo buffer descriptor ring control
          * blocks on those devices that have them.
          */
-        if ((tp->tg3_flags & TG3_FLAG_JUMBO_CAPABLE) &&
-            !(tp->tg3_flags2 & TG3_FLG2_5780_CLASS)) {
+        if (tp->pci_chip_rev_id == CHIPREV_ID_5719_A0 ||
+            ((tp->tg3_flags & TG3_FLAG_JUMBO_CAPABLE) &&
+            !(tp->tg3_flags2 & TG3_FLG2_5780_CLASS))) {
                 /* Setup replenish threshold. */
                 tw32(RCVBDI_JUMBO_THRESH, tp->rx_jumbo_pending / 8);
 
@@ -8227,8 +8223,12 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
             (tp->tg3_flags3 & TG3_FLG3_5717_PLUS)) {
                 val = tr32(TG3_RDMA_RSRVCTRL_REG);
                 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719) {
-                        val &= ~TG3_RDMA_RSRVCTRL_TXMRGN_MASK;
-                        val |= TG3_RDMA_RSRVCTRL_TXMRGN_320B;
+                        val &= ~(TG3_RDMA_RSRVCTRL_TXMRGN_MASK |
+                                 TG3_RDMA_RSRVCTRL_FIFO_LWM_MASK |
+                                 TG3_RDMA_RSRVCTRL_FIFO_HWM_MASK);
+                        val |= TG3_RDMA_RSRVCTRL_TXMRGN_320B |
+                               TG3_RDMA_RSRVCTRL_FIFO_LWM_1_5K |
+                               TG3_RDMA_RSRVCTRL_FIFO_HWM_1_5K;
                 }
                 tw32(TG3_RDMA_RSRVCTRL_REG,
                      val | TG3_RDMA_RSRVCTRL_FIFO_OFLW_FIX);
@@ -8350,7 +8350,8 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
         tw32_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl);
         udelay(100);
 
-        if (tp->tg3_flags2 & TG3_FLG2_USING_MSIX) {
+        if ((tp->tg3_flags2 & TG3_FLG2_USING_MSIX) &&
+                tp->irq_cnt > 1) {
                 val = tr32(MSGINT_MODE);
                 val |= MSGINT_MODE_MULTIVEC_EN | MSGINT_MODE_ENABLE;
                 tw32(MSGINT_MODE, val);
@@ -9090,7 +9091,8 @@ static void tg3_ints_init(struct tg3 *tp)
 
         if (tp->tg3_flags2 & TG3_FLG2_USING_MSI_OR_MSIX) {
                 u32 msi_mode = tr32(MSGINT_MODE);
-                if (tp->tg3_flags2 & TG3_FLG2_USING_MSIX)
+                if ((tp->tg3_flags2 & TG3_FLG2_USING_MSIX) &&
+                    tp->irq_cnt > 1)
                         msi_mode |= MSGINT_MODE_MULTIVEC_EN;
                 tw32(MSGINT_MODE, msi_mode | MSGINT_MODE_ENABLE);
         }
@@ -9532,17 +9534,10 @@ static void __tg3_set_rx_mode(struct net_device *dev)
         rx_mode = tp->rx_mode & ~(RX_MODE_PROMISC |
                                   RX_MODE_KEEP_VLAN_TAG);
 
+#if !defined(CONFIG_VLAN_8021Q) && !defined(CONFIG_VLAN_8021Q_MODULE)
         /* When ASF is in use, we always keep the RX_MODE_KEEP_VLAN_TAG
          * flag clear.
          */
-#if TG3_VLAN_TAG_USED
-        if (!tp->vlgrp &&
-            !(tp->tg3_flags & TG3_FLAG_ENABLE_ASF))
-                rx_mode |= RX_MODE_KEEP_VLAN_TAG;
-#else
-        /* By definition, VLAN is disabled always in this
-         * case.
-         */
         if (!(tp->tg3_flags & TG3_FLAG_ENABLE_ASF))
                 rx_mode |= RX_MODE_KEEP_VLAN_TAG;
 #endif
@@ -10873,13 +10868,16 @@ static int tg3_run_loopback(struct tg3 *tp, int loopback_mode)
         if (loopback_mode == TG3_MAC_LOOPBACK) {
                 /* HW errata - mac loopback fails in some cases on 5780.
                  * Normal traffic and PHY loopback are not affected by
-                 * errata.
+                 * errata.  Also, the MAC loopback test is deprecated for
+                 * all newer ASIC revisions.
                  */
-                if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780)
+                if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780 ||
+                    (tp->tg3_flags & TG3_FLAG_CPMU_PRESENT))
                         return 0;
 
-                mac_mode = (tp->mac_mode & ~MAC_MODE_PORT_MODE_MASK) |
-                           MAC_MODE_PORT_INT_LPBACK;
+                mac_mode = tp->mac_mode &
+                           ~(MAC_MODE_PORT_MODE_MASK | MAC_MODE_HALF_DUPLEX);
+                mac_mode |= MAC_MODE_PORT_INT_LPBACK;
                 if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS))
                         mac_mode |= MAC_MODE_LINK_POLARITY;
                 if (tp->phy_flags & TG3_PHYFLG_10_100_ONLY)
@@ -10901,7 +10899,8 @@ static int tg3_run_loopback(struct tg3 *tp, int loopback_mode)
                 tg3_writephy(tp, MII_BMCR, val);
                 udelay(40);
 
-                mac_mode = tp->mac_mode & ~MAC_MODE_PORT_MODE_MASK;
+                mac_mode = tp->mac_mode &
+                           ~(MAC_MODE_PORT_MODE_MASK | MAC_MODE_HALF_DUPLEX);
                 if (tp->phy_flags & TG3_PHYFLG_IS_FET) {
                         tg3_writephy(tp, MII_TG3_FET_PTEST,
                                      MII_TG3_FET_PTEST_FRC_TX_LINK |
@@ -10929,6 +10928,13 @@ static int tg3_run_loopback(struct tg3 *tp, int loopback_mode)
                                      MII_TG3_EXT_CTRL_LNK3_LED_MODE);
                 }
                 tw32(MAC_MODE, mac_mode);
+
+                /* Wait for link */
+                for (i = 0; i < 100; i++) {
+                        if (tr32(MAC_TX_STATUS) & TX_STATUS_LINK_UP)
+                                break;
+                        mdelay(1);
+                }
         } else {
                 return -EINVAL;
         }
@@ -11035,14 +11041,19 @@ out:
 static int tg3_test_loopback(struct tg3 *tp)
 {
         int err = 0;
-        u32 cpmuctrl = 0;
+        u32 eee_cap, cpmuctrl = 0;
 
         if (!netif_running(tp->dev))
                 return TG3_LOOPBACK_FAILED;
 
+        eee_cap = tp->phy_flags & TG3_PHYFLG_EEE_CAP;
+        tp->phy_flags &= ~TG3_PHYFLG_EEE_CAP;
+
         err = tg3_reset_hw(tp, 1);
-        if (err)
-                return TG3_LOOPBACK_FAILED;
+        if (err) {
+                err = TG3_LOOPBACK_FAILED;
+                goto done;
+        }
 
         /* Turn off gphy autopowerdown. */
         if (tp->phy_flags & TG3_PHYFLG_ENABLE_APD)
@@ -11062,8 +11073,10 @@ static int tg3_test_loopback(struct tg3 *tp)
                         udelay(10);
                 }
 
-                if (status != CPMU_MUTEX_GNT_DRIVER)
-                        return TG3_LOOPBACK_FAILED;
+                if (status != CPMU_MUTEX_GNT_DRIVER) {
+                        err = TG3_LOOPBACK_FAILED;
+                        goto done;
+                }
 
                 /* Turn off link-based power management. */
                 cpmuctrl = tr32(TG3_CPMU_CTRL);
@@ -11092,6 +11105,9 @@ static int tg3_test_loopback(struct tg3 *tp)
         if (tp->phy_flags & TG3_PHYFLG_ENABLE_APD)
                 tg3_phy_toggle_apd(tp, true);
 
+done:
+        tp->phy_flags |= eee_cap;
+
         return err;
 }
 
@@ -11198,7 +11214,9 @@ static int tg3_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
                 if (tp->phy_flags & TG3_PHYFLG_PHY_SERDES)
                         break;                  /* We have no PHY */
 
-                if (tp->phy_flags & TG3_PHYFLG_IS_LOW_POWER)
+                if ((tp->phy_flags & TG3_PHYFLG_IS_LOW_POWER) ||
+                    ((tp->tg3_flags & TG3_FLAG_ENABLE_ASF) &&
+                     !netif_running(dev)))
                         return -EAGAIN;
 
                 spin_lock_bh(&tp->lock);
@@ -11214,7 +11232,9 @@ static int tg3_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
                 if (tp->phy_flags & TG3_PHYFLG_PHY_SERDES)
                         break;                  /* We have no PHY */
 
-                if (tp->phy_flags & TG3_PHYFLG_IS_LOW_POWER)
+                if ((tp->phy_flags & TG3_PHYFLG_IS_LOW_POWER) ||
+                    ((tp->tg3_flags & TG3_FLAG_ENABLE_ASF) &&
+                     !netif_running(dev)))
                         return -EAGAIN;
 
                 spin_lock_bh(&tp->lock);
@@ -11230,31 +11250,6 @@ static int tg3_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
         return -EOPNOTSUPP;
 }
 
-#if TG3_VLAN_TAG_USED
-static void tg3_vlan_rx_register(struct net_device *dev, struct vlan_group *grp)
-{
-        struct tg3 *tp = netdev_priv(dev);
-
-        if (!netif_running(dev)) {
-                tp->vlgrp = grp;
-                return;
-        }
-
-        tg3_netif_stop(tp);
-
-        tg3_full_lock(tp, 0);
-
-        tp->vlgrp = grp;
-
-        /* Update RX_MODE_KEEP_VLAN_TAG bit in RX_MODE register. */
-        __tg3_set_rx_mode(dev);
-
-        tg3_netif_start(tp);
-
-        tg3_full_unlock(tp);
-}
-#endif
-
 static int tg3_get_coalesce(struct net_device *dev, struct ethtool_coalesce *ec)
 {
         struct tg3 *tp = netdev_priv(dev);
@@ -12468,9 +12463,11 @@ static void __devinit tg3_get_eeprom_hw_cfg(struct tg3 *tp)
                         tp->tg3_flags3 |= TG3_FLG3_RGMII_EXT_IBND_TX_EN;
         }
 done:
-        device_init_wakeup(&tp->pdev->dev, tp->tg3_flags & TG3_FLAG_WOL_CAP);
-        device_set_wakeup_enable(&tp->pdev->dev,
+        if (tp->tg3_flags & TG3_FLAG_WOL_CAP)
+                device_set_wakeup_enable(&tp->pdev->dev,
                                  tp->tg3_flags & TG3_FLAG_WOL_ENABLE);
+        else
+                device_set_wakeup_capable(&tp->pdev->dev, false);
 }
 
 static int __devinit tg3_issue_otp_command(struct tg3 *tp, u32 cmd)
@@ -13066,9 +13063,7 @@ static struct pci_dev * __devinit tg3_find_peer(struct tg3 *);
 
 static void inline vlan_features_add(struct net_device *dev, unsigned long flags)
 {
-#if TG3_VLAN_TAG_USED
         dev->vlan_features |= flags;
-#endif
 }
 
 static inline u32 tg3_rx_ret_ring_size(struct tg3 *tp)
@@ -13325,7 +13320,9 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
         }
 
         /* Determine TSO capabilities */
-        if (tp->tg3_flags3 & TG3_FLG3_5717_PLUS)
+        if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719)
+                ; /* Do nothing. HW bug. */
+        else if (tp->tg3_flags3 & TG3_FLG3_5717_PLUS)
                 tp->tg3_flags2 |= TG3_FLG2_HW_TSO_3;
         else if ((tp->tg3_flags3 & TG3_FLG3_5755_PLUS) ||
                  GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906)
@@ -13376,7 +13373,8 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
                 tp->tg3_flags3 |= TG3_FLG3_40BIT_DMA_LIMIT_BUG;
         }
 
-        if (tp->tg3_flags3 & TG3_FLG3_5717_PLUS)
+        if ((tp->tg3_flags3 & TG3_FLG3_5717_PLUS) &&
+            GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5719)
                 tp->tg3_flags3 |= TG3_FLG3_USE_JUMBO_BDFLAG;
 
         if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS) ||
@@ -13394,42 +13392,8 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
                 tp->tg3_flags2 |= TG3_FLG2_PCI_EXPRESS;
 
                 tp->pcie_readrq = 4096;
-                if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719) {
-                        u16 word;
-
-                        pci_read_config_word(tp->pdev,
-                                             tp->pcie_cap + PCI_EXP_LNKSTA,
-                                             &word);
-                        switch (word & PCI_EXP_LNKSTA_CLS) {
-                        case PCI_EXP_LNKSTA_CLS_2_5GB:
-                                word &= PCI_EXP_LNKSTA_NLW;
-                                word >>= PCI_EXP_LNKSTA_NLW_SHIFT;
-                                switch (word) {
-                                case 2:
-                                        tp->pcie_readrq = 2048;
-                                        break;
-                                case 4:
-                                        tp->pcie_readrq = 1024;
-                                        break;
-                                }
-                                break;
-
-                        case PCI_EXP_LNKSTA_CLS_5_0GB:
-                                word &= PCI_EXP_LNKSTA_NLW;
-                                word >>= PCI_EXP_LNKSTA_NLW_SHIFT;
-                                switch (word) {
-                                case 1:
-                                        tp->pcie_readrq = 2048;
-                                        break;
-                                case 2:
-                                        tp->pcie_readrq = 1024;
-                                        break;
-                                case 4:
-                                        tp->pcie_readrq = 512;
-                                        break;
-                                }
-                        }
-                }
+                if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719)
+                        tp->pcie_readrq = 2048;
 
                 pcie_set_readrq(tp->pdev, tp->pcie_readrq);
 
@@ -13861,11 +13825,11 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
         else
                 tp->tg3_flags &= ~TG3_FLAG_POLL_SERDES;
 
-        tp->rx_offset = NET_IP_ALIGN + TG3_RX_HEADROOM;
+        tp->rx_offset = NET_IP_ALIGN;
         tp->rx_copy_thresh = TG3_RX_COPY_THRESHOLD;
         if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5701 &&
             (tp->tg3_flags & TG3_FLAG_PCIX_MODE) != 0) {
-                tp->rx_offset -= NET_IP_ALIGN;
+                tp->rx_offset = 0;
 #ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS
                 tp->rx_copy_thresh = ~(u16)0;
 #endif
@@ -14629,9 +14593,6 @@ static const struct net_device_ops tg3_netdev_ops = {
         .ndo_do_ioctl           = tg3_ioctl,
         .ndo_tx_timeout         = tg3_tx_timeout,
         .ndo_change_mtu         = tg3_change_mtu,
-#if TG3_VLAN_TAG_USED
-        .ndo_vlan_rx_register   = tg3_vlan_rx_register,
-#endif
 #ifdef CONFIG_NET_POLL_CONTROLLER
         .ndo_poll_controller    = tg3_poll_controller,
 #endif
@@ -14648,9 +14609,6 @@ static const struct net_device_ops tg3_netdev_ops_dma_bug = {
         .ndo_do_ioctl           = tg3_ioctl,
         .ndo_tx_timeout         = tg3_tx_timeout,
         .ndo_change_mtu         = tg3_change_mtu,
-#if TG3_VLAN_TAG_USED
-        .ndo_vlan_rx_register   = tg3_vlan_rx_register,
-#endif
 #ifdef CONFIG_NET_POLL_CONTROLLER
         .ndo_poll_controller    = tg3_poll_controller,
 #endif
@@ -14700,9 +14658,7 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,
 
         SET_NETDEV_DEV(dev, &pdev->dev);
 
-#if TG3_VLAN_TAG_USED
         dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
-#endif
 
         tp = netdev_priv(dev);
         tp->pdev = pdev;