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path: root/drivers/net/tg3.c
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Diffstat (limited to 'drivers/net/tg3.c')
-rw-r--r--drivers/net/tg3.c98
1 files changed, 68 insertions, 30 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index e7dc653d5bd6..b8f1524da557 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -3532,9 +3532,23 @@ static inline int tg3_4g_overflow_test(dma_addr_t mapping, int len)
3532 (base + len + 8 < base)); 3532 (base + len + 8 < base));
3533} 3533}
3534 3534
3535/* Test for DMA addresses > 40-bit */
3536static inline int tg3_40bit_overflow_test(struct tg3 *tp, dma_addr_t mapping,
3537 int len)
3538{
3539#if defined(CONFIG_HIGHMEM) && (BITS_PER_LONG == 64)
3540 if (tp->tg3_flags2 & TG3_FLG2_5780_CLASS)
3541 return (((u64) mapping + len) > DMA_40BIT_MASK);
3542 return 0;
3543#else
3544 return 0;
3545#endif
3546}
3547
3535static void tg3_set_txd(struct tg3 *, int, dma_addr_t, int, u32, u32); 3548static void tg3_set_txd(struct tg3 *, int, dma_addr_t, int, u32, u32);
3536 3549
3537static int tigon3_4gb_hwbug_workaround(struct tg3 *tp, struct sk_buff *skb, 3550/* Workaround 4GB and 40-bit hardware DMA bugs. */
3551static int tigon3_dma_hwbug_workaround(struct tg3 *tp, struct sk_buff *skb,
3538 u32 last_plus_one, u32 *start, 3552 u32 last_plus_one, u32 *start,
3539 u32 base_flags, u32 mss) 3553 u32 base_flags, u32 mss)
3540{ 3554{
@@ -3742,6 +3756,9 @@ static int tg3_start_xmit(struct sk_buff *skb, struct net_device *dev)
3742 if (tg3_4g_overflow_test(mapping, len)) 3756 if (tg3_4g_overflow_test(mapping, len))
3743 would_hit_hwbug = 1; 3757 would_hit_hwbug = 1;
3744 3758
3759 if (tg3_40bit_overflow_test(tp, mapping, len))
3760 would_hit_hwbug = 1;
3761
3745 if (tp->tg3_flags2 & TG3_FLG2_HW_TSO) 3762 if (tp->tg3_flags2 & TG3_FLG2_HW_TSO)
3746 tg3_set_txd(tp, entry, mapping, len, 3763 tg3_set_txd(tp, entry, mapping, len,
3747 base_flags, (i == last)|(mss << 1)); 3764 base_flags, (i == last)|(mss << 1));
@@ -3763,7 +3780,7 @@ static int tg3_start_xmit(struct sk_buff *skb, struct net_device *dev)
3763 /* If the workaround fails due to memory/mapping 3780 /* If the workaround fails due to memory/mapping
3764 * failure, silently drop this packet. 3781 * failure, silently drop this packet.
3765 */ 3782 */
3766 if (tigon3_4gb_hwbug_workaround(tp, skb, last_plus_one, 3783 if (tigon3_dma_hwbug_workaround(tp, skb, last_plus_one,
3767 &start, base_flags, mss)) 3784 &start, base_flags, mss))
3768 goto out_unlock; 3785 goto out_unlock;
3769 3786
@@ -9408,6 +9425,15 @@ static int __devinit tg3_is_sun_570X(struct tg3 *tp)
9408 return 0; 9425 return 0;
9409 if (venid == PCI_VENDOR_ID_SUN) 9426 if (venid == PCI_VENDOR_ID_SUN)
9410 return 1; 9427 return 1;
9428
9429 /* TG3 chips onboard the SunBlade-2500 don't have the
9430 * subsystem-vendor-id set to PCI_VENDOR_ID_SUN but they
9431 * are distinguishable from non-Sun variants by being
9432 * named "network" by the firmware. Non-Sun cards will
9433 * show up as being named "ethernet".
9434 */
9435 if (!strcmp(pcp->prom_name, "network"))
9436 return 1;
9411 } 9437 }
9412 return 0; 9438 return 0;
9413} 9439}
@@ -10517,8 +10543,6 @@ static char * __devinit tg3_bus_string(struct tg3 *tp, char *str)
10517 strcat(str, "66MHz"); 10543 strcat(str, "66MHz");
10518 else if (clock_ctrl == 6) 10544 else if (clock_ctrl == 6)
10519 strcat(str, "100MHz"); 10545 strcat(str, "100MHz");
10520 else if (clock_ctrl == 7)
10521 strcat(str, "133MHz");
10522 } else { 10546 } else {
10523 strcpy(str, "PCI:"); 10547 strcpy(str, "PCI:");
10524 if (tp->tg3_flags & TG3_FLAG_PCI_HIGH_SPEED) 10548 if (tp->tg3_flags & TG3_FLAG_PCI_HIGH_SPEED)
@@ -10599,8 +10623,9 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,
10599 unsigned long tg3reg_base, tg3reg_len; 10623 unsigned long tg3reg_base, tg3reg_len;
10600 struct net_device *dev; 10624 struct net_device *dev;
10601 struct tg3 *tp; 10625 struct tg3 *tp;
10602 int i, err, pci_using_dac, pm_cap; 10626 int i, err, pm_cap;
10603 char str[40]; 10627 char str[40];
10628 u64 dma_mask, persist_dma_mask;
10604 10629
10605 if (tg3_version_printed++ == 0) 10630 if (tg3_version_printed++ == 0)
10606 printk(KERN_INFO "%s", version); 10631 printk(KERN_INFO "%s", version);
@@ -10637,26 +10662,6 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,
10637 goto err_out_free_res; 10662 goto err_out_free_res;
10638 } 10663 }
10639 10664
10640 /* Configure DMA attributes. */
10641 err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
10642 if (!err) {
10643 pci_using_dac = 1;
10644 err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
10645 if (err < 0) {
10646 printk(KERN_ERR PFX "Unable to obtain 64 bit DMA "
10647 "for consistent allocations\n");
10648 goto err_out_free_res;
10649 }
10650 } else {
10651 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
10652 if (err) {
10653 printk(KERN_ERR PFX "No usable DMA configuration, "
10654 "aborting.\n");
10655 goto err_out_free_res;
10656 }
10657 pci_using_dac = 0;
10658 }
10659
10660 tg3reg_base = pci_resource_start(pdev, 0); 10665 tg3reg_base = pci_resource_start(pdev, 0);
10661 tg3reg_len = pci_resource_len(pdev, 0); 10666 tg3reg_len = pci_resource_len(pdev, 0);
10662 10667
@@ -10670,8 +10675,6 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,
10670 SET_MODULE_OWNER(dev); 10675 SET_MODULE_OWNER(dev);
10671 SET_NETDEV_DEV(dev, &pdev->dev); 10676 SET_NETDEV_DEV(dev, &pdev->dev);
10672 10677
10673 if (pci_using_dac)
10674 dev->features |= NETIF_F_HIGHDMA;
10675 dev->features |= NETIF_F_LLTX; 10678 dev->features |= NETIF_F_LLTX;
10676#if TG3_VLAN_TAG_USED 10679#if TG3_VLAN_TAG_USED
10677 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX; 10680 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
@@ -10756,6 +10759,44 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,
10756 goto err_out_iounmap; 10759 goto err_out_iounmap;
10757 } 10760 }
10758 10761
10762 /* 5714, 5715 and 5780 cannot support DMA addresses > 40-bit.
10763 * On 64-bit systems with IOMMU, use 40-bit dma_mask.
10764 * On 64-bit systems without IOMMU, use 64-bit dma_mask and
10765 * do DMA address check in tg3_start_xmit().
10766 */
10767 if (tp->tg3_flags2 & TG3_FLG2_5780_CLASS) {
10768 persist_dma_mask = dma_mask = DMA_40BIT_MASK;
10769#ifdef CONFIG_HIGHMEM
10770 dma_mask = DMA_64BIT_MASK;
10771#endif
10772 } else if (tp->tg3_flags2 & TG3_FLG2_IS_5788)
10773 persist_dma_mask = dma_mask = DMA_32BIT_MASK;
10774 else
10775 persist_dma_mask = dma_mask = DMA_64BIT_MASK;
10776
10777 /* Configure DMA attributes. */
10778 if (dma_mask > DMA_32BIT_MASK) {
10779 err = pci_set_dma_mask(pdev, dma_mask);
10780 if (!err) {
10781 dev->features |= NETIF_F_HIGHDMA;
10782 err = pci_set_consistent_dma_mask(pdev,
10783 persist_dma_mask);
10784 if (err < 0) {
10785 printk(KERN_ERR PFX "Unable to obtain 64 bit "
10786 "DMA for consistent allocations\n");
10787 goto err_out_iounmap;
10788 }
10789 }
10790 }
10791 if (err || dma_mask == DMA_32BIT_MASK) {
10792 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
10793 if (err) {
10794 printk(KERN_ERR PFX "No usable DMA configuration, "
10795 "aborting.\n");
10796 goto err_out_iounmap;
10797 }
10798 }
10799
10759 tg3_init_bufmgr_config(tp); 10800 tg3_init_bufmgr_config(tp);
10760 10801
10761#if TG3_TSO_SUPPORT != 0 10802#if TG3_TSO_SUPPORT != 0
@@ -10824,9 +10865,6 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,
10824 } else 10865 } else
10825 tp->tg3_flags &= ~TG3_FLAG_RX_CHECKSUMS; 10866 tp->tg3_flags &= ~TG3_FLAG_RX_CHECKSUMS;
10826 10867
10827 if (tp->tg3_flags2 & TG3_FLG2_IS_5788)
10828 dev->features &= ~NETIF_F_HIGHDMA;
10829
10830 /* flow control autonegotiation is default behavior */ 10868 /* flow control autonegotiation is default behavior */
10831 tp->tg3_flags |= TG3_FLAG_PAUSE_AUTONEG; 10869 tp->tg3_flags |= TG3_FLAG_PAUSE_AUTONEG;
10832 10870