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path: root/drivers/net/tg3.c
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Diffstat (limited to 'drivers/net/tg3.c')
-rw-r--r--drivers/net/tg3.c85
1 files changed, 39 insertions, 46 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 058c70c6f1ac..f79b02e80e75 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -61,8 +61,8 @@
61 61
62#define DRV_MODULE_NAME "tg3" 62#define DRV_MODULE_NAME "tg3"
63#define PFX DRV_MODULE_NAME ": " 63#define PFX DRV_MODULE_NAME ": "
64#define DRV_MODULE_VERSION "3.26" 64#define DRV_MODULE_VERSION "3.27"
65#define DRV_MODULE_RELDATE "April 24, 2005" 65#define DRV_MODULE_RELDATE "May 5, 2005"
66 66
67#define TG3_DEF_MAC_MODE 0 67#define TG3_DEF_MAC_MODE 0
68#define TG3_DEF_RX_MODE 0 68#define TG3_DEF_RX_MODE 0
@@ -3020,7 +3020,7 @@ static irqreturn_t tg3_test_isr(int irq, void *dev_id,
3020} 3020}
3021 3021
3022static int tg3_init_hw(struct tg3 *); 3022static int tg3_init_hw(struct tg3 *);
3023static int tg3_halt(struct tg3 *); 3023static int tg3_halt(struct tg3 *, int);
3024 3024
3025#ifdef CONFIG_NET_POLL_CONTROLLER 3025#ifdef CONFIG_NET_POLL_CONTROLLER
3026static void tg3_poll_controller(struct net_device *dev) 3026static void tg3_poll_controller(struct net_device *dev)
@@ -3044,7 +3044,7 @@ static void tg3_reset_task(void *_data)
3044 restart_timer = tp->tg3_flags2 & TG3_FLG2_RESTART_TIMER; 3044 restart_timer = tp->tg3_flags2 & TG3_FLG2_RESTART_TIMER;
3045 tp->tg3_flags2 &= ~TG3_FLG2_RESTART_TIMER; 3045 tp->tg3_flags2 &= ~TG3_FLG2_RESTART_TIMER;
3046 3046
3047 tg3_halt(tp); 3047 tg3_halt(tp, 0);
3048 tg3_init_hw(tp); 3048 tg3_init_hw(tp);
3049 3049
3050 tg3_netif_start(tp); 3050 tg3_netif_start(tp);
@@ -3390,7 +3390,7 @@ static int tg3_change_mtu(struct net_device *dev, int new_mtu)
3390 spin_lock_irq(&tp->lock); 3390 spin_lock_irq(&tp->lock);
3391 spin_lock(&tp->tx_lock); 3391 spin_lock(&tp->tx_lock);
3392 3392
3393 tg3_halt(tp); 3393 tg3_halt(tp, 1);
3394 3394
3395 tg3_set_mtu(dev, tp, new_mtu); 3395 tg3_set_mtu(dev, tp, new_mtu);
3396 3396
@@ -3657,7 +3657,7 @@ err_out:
3657/* To stop a block, clear the enable bit and poll till it 3657/* To stop a block, clear the enable bit and poll till it
3658 * clears. tp->lock is held. 3658 * clears. tp->lock is held.
3659 */ 3659 */
3660static int tg3_stop_block(struct tg3 *tp, unsigned long ofs, u32 enable_bit) 3660static int tg3_stop_block(struct tg3 *tp, unsigned long ofs, u32 enable_bit, int silent)
3661{ 3661{
3662 unsigned int i; 3662 unsigned int i;
3663 u32 val; 3663 u32 val;
@@ -3690,7 +3690,7 @@ static int tg3_stop_block(struct tg3 *tp, unsigned long ofs, u32 enable_bit)
3690 break; 3690 break;
3691 } 3691 }
3692 3692
3693 if (i == MAX_WAIT_CNT) { 3693 if (i == MAX_WAIT_CNT && !silent) {
3694 printk(KERN_ERR PFX "tg3_stop_block timed out, " 3694 printk(KERN_ERR PFX "tg3_stop_block timed out, "
3695 "ofs=%lx enable_bit=%x\n", 3695 "ofs=%lx enable_bit=%x\n",
3696 ofs, enable_bit); 3696 ofs, enable_bit);
@@ -3701,7 +3701,7 @@ static int tg3_stop_block(struct tg3 *tp, unsigned long ofs, u32 enable_bit)
3701} 3701}
3702 3702
3703/* tp->lock is held. */ 3703/* tp->lock is held. */
3704static int tg3_abort_hw(struct tg3 *tp) 3704static int tg3_abort_hw(struct tg3 *tp, int silent)
3705{ 3705{
3706 int i, err; 3706 int i, err;
3707 3707
@@ -3711,22 +3711,20 @@ static int tg3_abort_hw(struct tg3 *tp)
3711 tw32_f(MAC_RX_MODE, tp->rx_mode); 3711 tw32_f(MAC_RX_MODE, tp->rx_mode);
3712 udelay(10); 3712 udelay(10);
3713 3713
3714 err = tg3_stop_block(tp, RCVBDI_MODE, RCVBDI_MODE_ENABLE); 3714 err = tg3_stop_block(tp, RCVBDI_MODE, RCVBDI_MODE_ENABLE, silent);
3715 err |= tg3_stop_block(tp, RCVLPC_MODE, RCVLPC_MODE_ENABLE); 3715 err |= tg3_stop_block(tp, RCVLPC_MODE, RCVLPC_MODE_ENABLE, silent);
3716 err |= tg3_stop_block(tp, RCVLSC_MODE, RCVLSC_MODE_ENABLE); 3716 err |= tg3_stop_block(tp, RCVLSC_MODE, RCVLSC_MODE_ENABLE, silent);
3717 err |= tg3_stop_block(tp, RCVDBDI_MODE, RCVDBDI_MODE_ENABLE); 3717 err |= tg3_stop_block(tp, RCVDBDI_MODE, RCVDBDI_MODE_ENABLE, silent);
3718 err |= tg3_stop_block(tp, RCVDCC_MODE, RCVDCC_MODE_ENABLE); 3718 err |= tg3_stop_block(tp, RCVDCC_MODE, RCVDCC_MODE_ENABLE, silent);
3719 err |= tg3_stop_block(tp, RCVCC_MODE, RCVCC_MODE_ENABLE); 3719 err |= tg3_stop_block(tp, RCVCC_MODE, RCVCC_MODE_ENABLE, silent);
3720 3720
3721 err |= tg3_stop_block(tp, SNDBDS_MODE, SNDBDS_MODE_ENABLE); 3721 err |= tg3_stop_block(tp, SNDBDS_MODE, SNDBDS_MODE_ENABLE, silent);
3722 err |= tg3_stop_block(tp, SNDBDI_MODE, SNDBDI_MODE_ENABLE); 3722 err |= tg3_stop_block(tp, SNDBDI_MODE, SNDBDI_MODE_ENABLE, silent);
3723 err |= tg3_stop_block(tp, SNDDATAI_MODE, SNDDATAI_MODE_ENABLE); 3723 err |= tg3_stop_block(tp, SNDDATAI_MODE, SNDDATAI_MODE_ENABLE, silent);
3724 err |= tg3_stop_block(tp, RDMAC_MODE, RDMAC_MODE_ENABLE); 3724 err |= tg3_stop_block(tp, RDMAC_MODE, RDMAC_MODE_ENABLE, silent);
3725 err |= tg3_stop_block(tp, SNDDATAC_MODE, SNDDATAC_MODE_ENABLE); 3725 err |= tg3_stop_block(tp, SNDDATAC_MODE, SNDDATAC_MODE_ENABLE, silent);
3726 err |= tg3_stop_block(tp, DMAC_MODE, DMAC_MODE_ENABLE); 3726 err |= tg3_stop_block(tp, DMAC_MODE, DMAC_MODE_ENABLE, silent);
3727 err |= tg3_stop_block(tp, SNDBDC_MODE, SNDBDC_MODE_ENABLE); 3727 err |= tg3_stop_block(tp, SNDBDC_MODE, SNDBDC_MODE_ENABLE, silent);
3728 if (err)
3729 goto out;
3730 3728
3731 tp->mac_mode &= ~MAC_MODE_TDE_ENABLE; 3729 tp->mac_mode &= ~MAC_MODE_TDE_ENABLE;
3732 tw32_f(MAC_MODE, tp->mac_mode); 3730 tw32_f(MAC_MODE, tp->mac_mode);
@@ -3744,27 +3742,24 @@ static int tg3_abort_hw(struct tg3 *tp)
3744 printk(KERN_ERR PFX "tg3_abort_hw timed out for %s, " 3742 printk(KERN_ERR PFX "tg3_abort_hw timed out for %s, "
3745 "TX_MODE_ENABLE will not clear MAC_TX_MODE=%08x\n", 3743 "TX_MODE_ENABLE will not clear MAC_TX_MODE=%08x\n",
3746 tp->dev->name, tr32(MAC_TX_MODE)); 3744 tp->dev->name, tr32(MAC_TX_MODE));
3747 return -ENODEV; 3745 err |= -ENODEV;
3748 } 3746 }
3749 3747
3750 err = tg3_stop_block(tp, HOSTCC_MODE, HOSTCC_MODE_ENABLE); 3748 err |= tg3_stop_block(tp, HOSTCC_MODE, HOSTCC_MODE_ENABLE, silent);
3751 err |= tg3_stop_block(tp, WDMAC_MODE, WDMAC_MODE_ENABLE); 3749 err |= tg3_stop_block(tp, WDMAC_MODE, WDMAC_MODE_ENABLE, silent);
3752 err |= tg3_stop_block(tp, MBFREE_MODE, MBFREE_MODE_ENABLE); 3750 err |= tg3_stop_block(tp, MBFREE_MODE, MBFREE_MODE_ENABLE, silent);
3753 3751
3754 tw32(FTQ_RESET, 0xffffffff); 3752 tw32(FTQ_RESET, 0xffffffff);
3755 tw32(FTQ_RESET, 0x00000000); 3753 tw32(FTQ_RESET, 0x00000000);
3756 3754
3757 err |= tg3_stop_block(tp, BUFMGR_MODE, BUFMGR_MODE_ENABLE); 3755 err |= tg3_stop_block(tp, BUFMGR_MODE, BUFMGR_MODE_ENABLE, silent);
3758 err |= tg3_stop_block(tp, MEMARB_MODE, MEMARB_MODE_ENABLE); 3756 err |= tg3_stop_block(tp, MEMARB_MODE, MEMARB_MODE_ENABLE, silent);
3759 if (err)
3760 goto out;
3761 3757
3762 if (tp->hw_status) 3758 if (tp->hw_status)
3763 memset(tp->hw_status, 0, TG3_HW_STATUS_SIZE); 3759 memset(tp->hw_status, 0, TG3_HW_STATUS_SIZE);
3764 if (tp->hw_stats) 3760 if (tp->hw_stats)
3765 memset(tp->hw_stats, 0, sizeof(struct tg3_hw_stats)); 3761 memset(tp->hw_stats, 0, sizeof(struct tg3_hw_stats));
3766 3762
3767out:
3768 return err; 3763 return err;
3769} 3764}
3770 3765
@@ -4086,7 +4081,7 @@ static void tg3_stop_fw(struct tg3 *tp)
4086} 4081}
4087 4082
4088/* tp->lock is held. */ 4083/* tp->lock is held. */
4089static int tg3_halt(struct tg3 *tp) 4084static int tg3_halt(struct tg3 *tp, int silent)
4090{ 4085{
4091 int err; 4086 int err;
4092 4087
@@ -4094,7 +4089,7 @@ static int tg3_halt(struct tg3 *tp)
4094 4089
4095 tg3_write_sig_pre_reset(tp, RESET_KIND_SHUTDOWN); 4090 tg3_write_sig_pre_reset(tp, RESET_KIND_SHUTDOWN);
4096 4091
4097 tg3_abort_hw(tp); 4092 tg3_abort_hw(tp, silent);
4098 err = tg3_chip_reset(tp); 4093 err = tg3_chip_reset(tp);
4099 4094
4100 tg3_write_sig_legacy(tp, RESET_KIND_SHUTDOWN); 4095 tg3_write_sig_legacy(tp, RESET_KIND_SHUTDOWN);
@@ -5063,9 +5058,7 @@ static int tg3_reset_hw(struct tg3 *tp)
5063 tg3_write_sig_pre_reset(tp, RESET_KIND_INIT); 5058 tg3_write_sig_pre_reset(tp, RESET_KIND_INIT);
5064 5059
5065 if (tp->tg3_flags & TG3_FLAG_INIT_COMPLETE) { 5060 if (tp->tg3_flags & TG3_FLAG_INIT_COMPLETE) {
5066 err = tg3_abort_hw(tp); 5061 tg3_abort_hw(tp, 1);
5067 if (err)
5068 return err;
5069 } 5062 }
5070 5063
5071 err = tg3_chip_reset(tp); 5064 err = tg3_chip_reset(tp);
@@ -5919,7 +5912,7 @@ static int tg3_test_msi(struct tg3 *tp)
5919 spin_lock_irq(&tp->lock); 5912 spin_lock_irq(&tp->lock);
5920 spin_lock(&tp->tx_lock); 5913 spin_lock(&tp->tx_lock);
5921 5914
5922 tg3_halt(tp); 5915 tg3_halt(tp, 1);
5923 err = tg3_init_hw(tp); 5916 err = tg3_init_hw(tp);
5924 5917
5925 spin_unlock(&tp->tx_lock); 5918 spin_unlock(&tp->tx_lock);
@@ -5984,7 +5977,7 @@ static int tg3_open(struct net_device *dev)
5984 5977
5985 err = tg3_init_hw(tp); 5978 err = tg3_init_hw(tp);
5986 if (err) { 5979 if (err) {
5987 tg3_halt(tp); 5980 tg3_halt(tp, 1);
5988 tg3_free_rings(tp); 5981 tg3_free_rings(tp);
5989 } else { 5982 } else {
5990 tp->timer_offset = HZ / 10; 5983 tp->timer_offset = HZ / 10;
@@ -6020,7 +6013,7 @@ static int tg3_open(struct net_device *dev)
6020 pci_disable_msi(tp->pdev); 6013 pci_disable_msi(tp->pdev);
6021 tp->tg3_flags2 &= ~TG3_FLG2_USING_MSI; 6014 tp->tg3_flags2 &= ~TG3_FLG2_USING_MSI;
6022 } 6015 }
6023 tg3_halt(tp); 6016 tg3_halt(tp, 1);
6024 tg3_free_rings(tp); 6017 tg3_free_rings(tp);
6025 tg3_free_consistent(tp); 6018 tg3_free_consistent(tp);
6026 6019
@@ -6293,7 +6286,7 @@ static int tg3_close(struct net_device *dev)
6293 6286
6294 tg3_disable_ints(tp); 6287 tg3_disable_ints(tp);
6295 6288
6296 tg3_halt(tp); 6289 tg3_halt(tp, 1);
6297 tg3_free_rings(tp); 6290 tg3_free_rings(tp);
6298 tp->tg3_flags &= 6291 tp->tg3_flags &=
6299 ~(TG3_FLAG_INIT_COMPLETE | 6292 ~(TG3_FLAG_INIT_COMPLETE |
@@ -7013,7 +7006,7 @@ static int tg3_set_ringparam(struct net_device *dev, struct ethtool_ringparam *e
7013 tp->tx_pending = ering->tx_pending; 7006 tp->tx_pending = ering->tx_pending;
7014 7007
7015 if (netif_running(dev)) { 7008 if (netif_running(dev)) {
7016 tg3_halt(tp); 7009 tg3_halt(tp, 1);
7017 tg3_init_hw(tp); 7010 tg3_init_hw(tp);
7018 tg3_netif_start(tp); 7011 tg3_netif_start(tp);
7019 } 7012 }
@@ -7056,7 +7049,7 @@ static int tg3_set_pauseparam(struct net_device *dev, struct ethtool_pauseparam
7056 tp->tg3_flags &= ~TG3_FLAG_TX_PAUSE; 7049 tp->tg3_flags &= ~TG3_FLAG_TX_PAUSE;
7057 7050
7058 if (netif_running(dev)) { 7051 if (netif_running(dev)) {
7059 tg3_halt(tp); 7052 tg3_halt(tp, 1);
7060 tg3_init_hw(tp); 7053 tg3_init_hw(tp);
7061 tg3_netif_start(tp); 7054 tg3_netif_start(tp);
7062 } 7055 }
@@ -9239,7 +9232,7 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,
9239 (tr32(WDMAC_MODE) & WDMAC_MODE_ENABLE)) { 9232 (tr32(WDMAC_MODE) & WDMAC_MODE_ENABLE)) {
9240 pci_save_state(tp->pdev); 9233 pci_save_state(tp->pdev);
9241 tw32(MEMARB_MODE, MEMARB_MODE_ENABLE); 9234 tw32(MEMARB_MODE, MEMARB_MODE_ENABLE);
9242 tg3_halt(tp); 9235 tg3_halt(tp, 1);
9243 } 9236 }
9244 9237
9245 err = tg3_test_dma(tp); 9238 err = tg3_test_dma(tp);
@@ -9362,7 +9355,7 @@ static int tg3_suspend(struct pci_dev *pdev, pm_message_t state)
9362 9355
9363 spin_lock_irq(&tp->lock); 9356 spin_lock_irq(&tp->lock);
9364 spin_lock(&tp->tx_lock); 9357 spin_lock(&tp->tx_lock);
9365 tg3_halt(tp); 9358 tg3_halt(tp, 1);
9366 spin_unlock(&tp->tx_lock); 9359 spin_unlock(&tp->tx_lock);
9367 spin_unlock_irq(&tp->lock); 9360 spin_unlock_irq(&tp->lock);
9368 9361