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path: root/drivers/net/tc35815.c
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Diffstat (limited to 'drivers/net/tc35815.c')
-rw-r--r--drivers/net/tc35815.c1701
1 files changed, 601 insertions, 1100 deletions
diff --git a/drivers/net/tc35815.c b/drivers/net/tc35815.c
index 370d329d15d9..10e4e85da3fc 100644
--- a/drivers/net/tc35815.c
+++ b/drivers/net/tc35815.c
@@ -23,9 +23,9 @@
23 */ 23 */
24 24
25#ifdef TC35815_NAPI 25#ifdef TC35815_NAPI
26#define DRV_VERSION "1.36-NAPI" 26#define DRV_VERSION "1.37-NAPI"
27#else 27#else
28#define DRV_VERSION "1.36" 28#define DRV_VERSION "1.37"
29#endif 29#endif
30static const char *version = "tc35815.c:v" DRV_VERSION "\n"; 30static const char *version = "tc35815.c:v" DRV_VERSION "\n";
31#define MODNAME "tc35815" 31#define MODNAME "tc35815"
@@ -47,8 +47,8 @@ static const char *version = "tc35815.c:v" DRV_VERSION "\n";
47#include <linux/skbuff.h> 47#include <linux/skbuff.h>
48#include <linux/delay.h> 48#include <linux/delay.h>
49#include <linux/pci.h> 49#include <linux/pci.h>
50#include <linux/mii.h> 50#include <linux/phy.h>
51#include <linux/ethtool.h> 51#include <linux/workqueue.h>
52#include <linux/platform_device.h> 52#include <linux/platform_device.h>
53#include <asm/io.h> 53#include <asm/io.h>
54#include <asm/byteorder.h> 54#include <asm/byteorder.h>
@@ -60,16 +60,16 @@ static const char *version = "tc35815.c:v" DRV_VERSION "\n";
60#define WORKAROUND_100HALF_PROMISC 60#define WORKAROUND_100HALF_PROMISC
61/* #define TC35815_USE_PACKEDBUFFER */ 61/* #define TC35815_USE_PACKEDBUFFER */
62 62
63typedef enum { 63enum tc35815_chiptype {
64 TC35815CF = 0, 64 TC35815CF = 0,
65 TC35815_NWU, 65 TC35815_NWU,
66 TC35815_TX4939, 66 TC35815_TX4939,
67} board_t; 67};
68 68
69/* indexed by board_t, above */ 69/* indexed by tc35815_chiptype, above */
70static const struct { 70static const struct {
71 const char *name; 71 const char *name;
72} board_info[] __devinitdata = { 72} chip_info[] __devinitdata = {
73 { "TOSHIBA TC35815CF 10/100BaseTX" }, 73 { "TOSHIBA TC35815CF 10/100BaseTX" },
74 { "TOSHIBA TC35815 with Wake on LAN" }, 74 { "TOSHIBA TC35815 with Wake on LAN" },
75 { "TOSHIBA TC35815/TX4939" }, 75 { "TOSHIBA TC35815/TX4939" },
@@ -81,209 +81,208 @@ static const struct pci_device_id tc35815_pci_tbl[] = {
81 {PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC35815_TX4939), .driver_data = TC35815_TX4939 }, 81 {PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC35815_TX4939), .driver_data = TC35815_TX4939 },
82 {0,} 82 {0,}
83}; 83};
84MODULE_DEVICE_TABLE (pci, tc35815_pci_tbl); 84MODULE_DEVICE_TABLE(pci, tc35815_pci_tbl);
85 85
86/* see MODULE_PARM_DESC */ 86/* see MODULE_PARM_DESC */
87static struct tc35815_options { 87static struct tc35815_options {
88 int speed; 88 int speed;
89 int duplex; 89 int duplex;
90 int doforce;
91} options; 90} options;
92 91
93/* 92/*
94 * Registers 93 * Registers
95 */ 94 */
96struct tc35815_regs { 95struct tc35815_regs {
97 volatile __u32 DMA_Ctl; /* 0x00 */ 96 __u32 DMA_Ctl; /* 0x00 */
98 volatile __u32 TxFrmPtr; 97 __u32 TxFrmPtr;
99 volatile __u32 TxThrsh; 98 __u32 TxThrsh;
100 volatile __u32 TxPollCtr; 99 __u32 TxPollCtr;
101 volatile __u32 BLFrmPtr; 100 __u32 BLFrmPtr;
102 volatile __u32 RxFragSize; 101 __u32 RxFragSize;
103 volatile __u32 Int_En; 102 __u32 Int_En;
104 volatile __u32 FDA_Bas; 103 __u32 FDA_Bas;
105 volatile __u32 FDA_Lim; /* 0x20 */ 104 __u32 FDA_Lim; /* 0x20 */
106 volatile __u32 Int_Src; 105 __u32 Int_Src;
107 volatile __u32 unused0[2]; 106 __u32 unused0[2];
108 volatile __u32 PauseCnt; 107 __u32 PauseCnt;
109 volatile __u32 RemPauCnt; 108 __u32 RemPauCnt;
110 volatile __u32 TxCtlFrmStat; 109 __u32 TxCtlFrmStat;
111 volatile __u32 unused1; 110 __u32 unused1;
112 volatile __u32 MAC_Ctl; /* 0x40 */ 111 __u32 MAC_Ctl; /* 0x40 */
113 volatile __u32 CAM_Ctl; 112 __u32 CAM_Ctl;
114 volatile __u32 Tx_Ctl; 113 __u32 Tx_Ctl;
115 volatile __u32 Tx_Stat; 114 __u32 Tx_Stat;
116 volatile __u32 Rx_Ctl; 115 __u32 Rx_Ctl;
117 volatile __u32 Rx_Stat; 116 __u32 Rx_Stat;
118 volatile __u32 MD_Data; 117 __u32 MD_Data;
119 volatile __u32 MD_CA; 118 __u32 MD_CA;
120 volatile __u32 CAM_Adr; /* 0x60 */ 119 __u32 CAM_Adr; /* 0x60 */
121 volatile __u32 CAM_Data; 120 __u32 CAM_Data;
122 volatile __u32 CAM_Ena; 121 __u32 CAM_Ena;
123 volatile __u32 PROM_Ctl; 122 __u32 PROM_Ctl;
124 volatile __u32 PROM_Data; 123 __u32 PROM_Data;
125 volatile __u32 Algn_Cnt; 124 __u32 Algn_Cnt;
126 volatile __u32 CRC_Cnt; 125 __u32 CRC_Cnt;
127 volatile __u32 Miss_Cnt; 126 __u32 Miss_Cnt;
128}; 127};
129 128
130/* 129/*
131 * Bit assignments 130 * Bit assignments
132 */ 131 */
133/* DMA_Ctl bit asign ------------------------------------------------------- */ 132/* DMA_Ctl bit asign ------------------------------------------------------- */
134#define DMA_RxAlign 0x00c00000 /* 1:Reception Alignment */ 133#define DMA_RxAlign 0x00c00000 /* 1:Reception Alignment */
135#define DMA_RxAlign_1 0x00400000 134#define DMA_RxAlign_1 0x00400000
136#define DMA_RxAlign_2 0x00800000 135#define DMA_RxAlign_2 0x00800000
137#define DMA_RxAlign_3 0x00c00000 136#define DMA_RxAlign_3 0x00c00000
138#define DMA_M66EnStat 0x00080000 /* 1:66MHz Enable State */ 137#define DMA_M66EnStat 0x00080000 /* 1:66MHz Enable State */
139#define DMA_IntMask 0x00040000 /* 1:Interupt mask */ 138#define DMA_IntMask 0x00040000 /* 1:Interupt mask */
140#define DMA_SWIntReq 0x00020000 /* 1:Software Interrupt request */ 139#define DMA_SWIntReq 0x00020000 /* 1:Software Interrupt request */
141#define DMA_TxWakeUp 0x00010000 /* 1:Transmit Wake Up */ 140#define DMA_TxWakeUp 0x00010000 /* 1:Transmit Wake Up */
142#define DMA_RxBigE 0x00008000 /* 1:Receive Big Endian */ 141#define DMA_RxBigE 0x00008000 /* 1:Receive Big Endian */
143#define DMA_TxBigE 0x00004000 /* 1:Transmit Big Endian */ 142#define DMA_TxBigE 0x00004000 /* 1:Transmit Big Endian */
144#define DMA_TestMode 0x00002000 /* 1:Test Mode */ 143#define DMA_TestMode 0x00002000 /* 1:Test Mode */
145#define DMA_PowrMgmnt 0x00001000 /* 1:Power Management */ 144#define DMA_PowrMgmnt 0x00001000 /* 1:Power Management */
146#define DMA_DmBurst_Mask 0x000001fc /* DMA Burst size */ 145#define DMA_DmBurst_Mask 0x000001fc /* DMA Burst size */
147 146
148/* RxFragSize bit asign ---------------------------------------------------- */ 147/* RxFragSize bit asign ---------------------------------------------------- */
149#define RxFrag_EnPack 0x00008000 /* 1:Enable Packing */ 148#define RxFrag_EnPack 0x00008000 /* 1:Enable Packing */
150#define RxFrag_MinFragMask 0x00000ffc /* Minimum Fragment */ 149#define RxFrag_MinFragMask 0x00000ffc /* Minimum Fragment */
151 150
152/* MAC_Ctl bit asign ------------------------------------------------------- */ 151/* MAC_Ctl bit asign ------------------------------------------------------- */
153#define MAC_Link10 0x00008000 /* 1:Link Status 10Mbits */ 152#define MAC_Link10 0x00008000 /* 1:Link Status 10Mbits */
154#define MAC_EnMissRoll 0x00002000 /* 1:Enable Missed Roll */ 153#define MAC_EnMissRoll 0x00002000 /* 1:Enable Missed Roll */
155#define MAC_MissRoll 0x00000400 /* 1:Missed Roll */ 154#define MAC_MissRoll 0x00000400 /* 1:Missed Roll */
156#define MAC_Loop10 0x00000080 /* 1:Loop 10 Mbps */ 155#define MAC_Loop10 0x00000080 /* 1:Loop 10 Mbps */
157#define MAC_Conn_Auto 0x00000000 /*00:Connection mode (Automatic) */ 156#define MAC_Conn_Auto 0x00000000 /*00:Connection mode (Automatic) */
158#define MAC_Conn_10M 0x00000020 /*01: (10Mbps endec)*/ 157#define MAC_Conn_10M 0x00000020 /*01: (10Mbps endec)*/
159#define MAC_Conn_Mll 0x00000040 /*10: (Mll clock) */ 158#define MAC_Conn_Mll 0x00000040 /*10: (Mll clock) */
160#define MAC_MacLoop 0x00000010 /* 1:MAC Loopback */ 159#define MAC_MacLoop 0x00000010 /* 1:MAC Loopback */
161#define MAC_FullDup 0x00000008 /* 1:Full Duplex 0:Half Duplex */ 160#define MAC_FullDup 0x00000008 /* 1:Full Duplex 0:Half Duplex */
162#define MAC_Reset 0x00000004 /* 1:Software Reset */ 161#define MAC_Reset 0x00000004 /* 1:Software Reset */
163#define MAC_HaltImm 0x00000002 /* 1:Halt Immediate */ 162#define MAC_HaltImm 0x00000002 /* 1:Halt Immediate */
164#define MAC_HaltReq 0x00000001 /* 1:Halt request */ 163#define MAC_HaltReq 0x00000001 /* 1:Halt request */
165 164
166/* PROM_Ctl bit asign ------------------------------------------------------ */ 165/* PROM_Ctl bit asign ------------------------------------------------------ */
167#define PROM_Busy 0x00008000 /* 1:Busy (Start Operation) */ 166#define PROM_Busy 0x00008000 /* 1:Busy (Start Operation) */
168#define PROM_Read 0x00004000 /*10:Read operation */ 167#define PROM_Read 0x00004000 /*10:Read operation */
169#define PROM_Write 0x00002000 /*01:Write operation */ 168#define PROM_Write 0x00002000 /*01:Write operation */
170#define PROM_Erase 0x00006000 /*11:Erase operation */ 169#define PROM_Erase 0x00006000 /*11:Erase operation */
171 /*00:Enable or Disable Writting, */ 170 /*00:Enable or Disable Writting, */
172 /* as specified in PROM_Addr. */ 171 /* as specified in PROM_Addr. */
173#define PROM_Addr_Ena 0x00000030 /*11xxxx:PROM Write enable */ 172#define PROM_Addr_Ena 0x00000030 /*11xxxx:PROM Write enable */
174 /*00xxxx: disable */ 173 /*00xxxx: disable */
175 174
176/* CAM_Ctl bit asign ------------------------------------------------------- */ 175/* CAM_Ctl bit asign ------------------------------------------------------- */
177#define CAM_CompEn 0x00000010 /* 1:CAM Compare Enable */ 176#define CAM_CompEn 0x00000010 /* 1:CAM Compare Enable */
178#define CAM_NegCAM 0x00000008 /* 1:Reject packets CAM recognizes,*/ 177#define CAM_NegCAM 0x00000008 /* 1:Reject packets CAM recognizes,*/
179 /* accept other */ 178 /* accept other */
180#define CAM_BroadAcc 0x00000004 /* 1:Broadcast assept */ 179#define CAM_BroadAcc 0x00000004 /* 1:Broadcast assept */
181#define CAM_GroupAcc 0x00000002 /* 1:Multicast assept */ 180#define CAM_GroupAcc 0x00000002 /* 1:Multicast assept */
182#define CAM_StationAcc 0x00000001 /* 1:unicast accept */ 181#define CAM_StationAcc 0x00000001 /* 1:unicast accept */
183 182
184/* CAM_Ena bit asign ------------------------------------------------------- */ 183/* CAM_Ena bit asign ------------------------------------------------------- */
185#define CAM_ENTRY_MAX 21 /* CAM Data entry max count */ 184#define CAM_ENTRY_MAX 21 /* CAM Data entry max count */
186#define CAM_Ena_Mask ((1<<CAM_ENTRY_MAX)-1) /* CAM Enable bits (Max 21bits) */ 185#define CAM_Ena_Mask ((1<<CAM_ENTRY_MAX)-1) /* CAM Enable bits (Max 21bits) */
187#define CAM_Ena_Bit(index) (1<<(index)) 186#define CAM_Ena_Bit(index) (1 << (index))
188#define CAM_ENTRY_DESTINATION 0 187#define CAM_ENTRY_DESTINATION 0
189#define CAM_ENTRY_SOURCE 1 188#define CAM_ENTRY_SOURCE 1
190#define CAM_ENTRY_MACCTL 20 189#define CAM_ENTRY_MACCTL 20
191 190
192/* Tx_Ctl bit asign -------------------------------------------------------- */ 191/* Tx_Ctl bit asign -------------------------------------------------------- */
193#define Tx_En 0x00000001 /* 1:Transmit enable */ 192#define Tx_En 0x00000001 /* 1:Transmit enable */
194#define Tx_TxHalt 0x00000002 /* 1:Transmit Halt Request */ 193#define Tx_TxHalt 0x00000002 /* 1:Transmit Halt Request */
195#define Tx_NoPad 0x00000004 /* 1:Suppress Padding */ 194#define Tx_NoPad 0x00000004 /* 1:Suppress Padding */
196#define Tx_NoCRC 0x00000008 /* 1:Suppress Padding */ 195#define Tx_NoCRC 0x00000008 /* 1:Suppress Padding */
197#define Tx_FBack 0x00000010 /* 1:Fast Back-off */ 196#define Tx_FBack 0x00000010 /* 1:Fast Back-off */
198#define Tx_EnUnder 0x00000100 /* 1:Enable Underrun */ 197#define Tx_EnUnder 0x00000100 /* 1:Enable Underrun */
199#define Tx_EnExDefer 0x00000200 /* 1:Enable Excessive Deferral */ 198#define Tx_EnExDefer 0x00000200 /* 1:Enable Excessive Deferral */
200#define Tx_EnLCarr 0x00000400 /* 1:Enable Lost Carrier */ 199#define Tx_EnLCarr 0x00000400 /* 1:Enable Lost Carrier */
201#define Tx_EnExColl 0x00000800 /* 1:Enable Excessive Collision */ 200#define Tx_EnExColl 0x00000800 /* 1:Enable Excessive Collision */
202#define Tx_EnLateColl 0x00001000 /* 1:Enable Late Collision */ 201#define Tx_EnLateColl 0x00001000 /* 1:Enable Late Collision */
203#define Tx_EnTxPar 0x00002000 /* 1:Enable Transmit Parity */ 202#define Tx_EnTxPar 0x00002000 /* 1:Enable Transmit Parity */
204#define Tx_EnComp 0x00004000 /* 1:Enable Completion */ 203#define Tx_EnComp 0x00004000 /* 1:Enable Completion */
205 204
206/* Tx_Stat bit asign ------------------------------------------------------- */ 205/* Tx_Stat bit asign ------------------------------------------------------- */
207#define Tx_TxColl_MASK 0x0000000F /* Tx Collision Count */ 206#define Tx_TxColl_MASK 0x0000000F /* Tx Collision Count */
208#define Tx_ExColl 0x00000010 /* Excessive Collision */ 207#define Tx_ExColl 0x00000010 /* Excessive Collision */
209#define Tx_TXDefer 0x00000020 /* Transmit Defered */ 208#define Tx_TXDefer 0x00000020 /* Transmit Defered */
210#define Tx_Paused 0x00000040 /* Transmit Paused */ 209#define Tx_Paused 0x00000040 /* Transmit Paused */
211#define Tx_IntTx 0x00000080 /* Interrupt on Tx */ 210#define Tx_IntTx 0x00000080 /* Interrupt on Tx */
212#define Tx_Under 0x00000100 /* Underrun */ 211#define Tx_Under 0x00000100 /* Underrun */
213#define Tx_Defer 0x00000200 /* Deferral */ 212#define Tx_Defer 0x00000200 /* Deferral */
214#define Tx_NCarr 0x00000400 /* No Carrier */ 213#define Tx_NCarr 0x00000400 /* No Carrier */
215#define Tx_10Stat 0x00000800 /* 10Mbps Status */ 214#define Tx_10Stat 0x00000800 /* 10Mbps Status */
216#define Tx_LateColl 0x00001000 /* Late Collision */ 215#define Tx_LateColl 0x00001000 /* Late Collision */
217#define Tx_TxPar 0x00002000 /* Tx Parity Error */ 216#define Tx_TxPar 0x00002000 /* Tx Parity Error */
218#define Tx_Comp 0x00004000 /* Completion */ 217#define Tx_Comp 0x00004000 /* Completion */
219#define Tx_Halted 0x00008000 /* Tx Halted */ 218#define Tx_Halted 0x00008000 /* Tx Halted */
220#define Tx_SQErr 0x00010000 /* Signal Quality Error(SQE) */ 219#define Tx_SQErr 0x00010000 /* Signal Quality Error(SQE) */
221 220
222/* Rx_Ctl bit asign -------------------------------------------------------- */ 221/* Rx_Ctl bit asign -------------------------------------------------------- */
223#define Rx_EnGood 0x00004000 /* 1:Enable Good */ 222#define Rx_EnGood 0x00004000 /* 1:Enable Good */
224#define Rx_EnRxPar 0x00002000 /* 1:Enable Receive Parity */ 223#define Rx_EnRxPar 0x00002000 /* 1:Enable Receive Parity */
225#define Rx_EnLongErr 0x00000800 /* 1:Enable Long Error */ 224#define Rx_EnLongErr 0x00000800 /* 1:Enable Long Error */
226#define Rx_EnOver 0x00000400 /* 1:Enable OverFlow */ 225#define Rx_EnOver 0x00000400 /* 1:Enable OverFlow */
227#define Rx_EnCRCErr 0x00000200 /* 1:Enable CRC Error */ 226#define Rx_EnCRCErr 0x00000200 /* 1:Enable CRC Error */
228#define Rx_EnAlign 0x00000100 /* 1:Enable Alignment */ 227#define Rx_EnAlign 0x00000100 /* 1:Enable Alignment */
229#define Rx_IgnoreCRC 0x00000040 /* 1:Ignore CRC Value */ 228#define Rx_IgnoreCRC 0x00000040 /* 1:Ignore CRC Value */
230#define Rx_StripCRC 0x00000010 /* 1:Strip CRC Value */ 229#define Rx_StripCRC 0x00000010 /* 1:Strip CRC Value */
231#define Rx_ShortEn 0x00000008 /* 1:Short Enable */ 230#define Rx_ShortEn 0x00000008 /* 1:Short Enable */
232#define Rx_LongEn 0x00000004 /* 1:Long Enable */ 231#define Rx_LongEn 0x00000004 /* 1:Long Enable */
233#define Rx_RxHalt 0x00000002 /* 1:Receive Halt Request */ 232#define Rx_RxHalt 0x00000002 /* 1:Receive Halt Request */
234#define Rx_RxEn 0x00000001 /* 1:Receive Intrrupt Enable */ 233#define Rx_RxEn 0x00000001 /* 1:Receive Intrrupt Enable */
235 234
236/* Rx_Stat bit asign ------------------------------------------------------- */ 235/* Rx_Stat bit asign ------------------------------------------------------- */
237#define Rx_Halted 0x00008000 /* Rx Halted */ 236#define Rx_Halted 0x00008000 /* Rx Halted */
238#define Rx_Good 0x00004000 /* Rx Good */ 237#define Rx_Good 0x00004000 /* Rx Good */
239#define Rx_RxPar 0x00002000 /* Rx Parity Error */ 238#define Rx_RxPar 0x00002000 /* Rx Parity Error */
240 /* 0x00001000 not use */ 239 /* 0x00001000 not use */
241#define Rx_LongErr 0x00000800 /* Rx Long Error */ 240#define Rx_LongErr 0x00000800 /* Rx Long Error */
242#define Rx_Over 0x00000400 /* Rx Overflow */ 241#define Rx_Over 0x00000400 /* Rx Overflow */
243#define Rx_CRCErr 0x00000200 /* Rx CRC Error */ 242#define Rx_CRCErr 0x00000200 /* Rx CRC Error */
244#define Rx_Align 0x00000100 /* Rx Alignment Error */ 243#define Rx_Align 0x00000100 /* Rx Alignment Error */
245#define Rx_10Stat 0x00000080 /* Rx 10Mbps Status */ 244#define Rx_10Stat 0x00000080 /* Rx 10Mbps Status */
246#define Rx_IntRx 0x00000040 /* Rx Interrupt */ 245#define Rx_IntRx 0x00000040 /* Rx Interrupt */
247#define Rx_CtlRecd 0x00000020 /* Rx Control Receive */ 246#define Rx_CtlRecd 0x00000020 /* Rx Control Receive */
248 247
249#define Rx_Stat_Mask 0x0000EFC0 /* Rx All Status Mask */ 248#define Rx_Stat_Mask 0x0000EFC0 /* Rx All Status Mask */
250 249
251/* Int_En bit asign -------------------------------------------------------- */ 250/* Int_En bit asign -------------------------------------------------------- */
252#define Int_NRAbtEn 0x00000800 /* 1:Non-recoverable Abort Enable */ 251#define Int_NRAbtEn 0x00000800 /* 1:Non-recoverable Abort Enable */
253#define Int_TxCtlCmpEn 0x00000400 /* 1:Transmit Control Complete Enable */ 252#define Int_TxCtlCmpEn 0x00000400 /* 1:Transmit Ctl Complete Enable */
254#define Int_DmParErrEn 0x00000200 /* 1:DMA Parity Error Enable */ 253#define Int_DmParErrEn 0x00000200 /* 1:DMA Parity Error Enable */
255#define Int_DParDEn 0x00000100 /* 1:Data Parity Error Enable */ 254#define Int_DParDEn 0x00000100 /* 1:Data Parity Error Enable */
256#define Int_EarNotEn 0x00000080 /* 1:Early Notify Enable */ 255#define Int_EarNotEn 0x00000080 /* 1:Early Notify Enable */
257#define Int_DParErrEn 0x00000040 /* 1:Detected Parity Error Enable */ 256#define Int_DParErrEn 0x00000040 /* 1:Detected Parity Error Enable */
258#define Int_SSysErrEn 0x00000020 /* 1:Signalled System Error Enable */ 257#define Int_SSysErrEn 0x00000020 /* 1:Signalled System Error Enable */
259#define Int_RMasAbtEn 0x00000010 /* 1:Received Master Abort Enable */ 258#define Int_RMasAbtEn 0x00000010 /* 1:Received Master Abort Enable */
260#define Int_RTargAbtEn 0x00000008 /* 1:Received Target Abort Enable */ 259#define Int_RTargAbtEn 0x00000008 /* 1:Received Target Abort Enable */
261#define Int_STargAbtEn 0x00000004 /* 1:Signalled Target Abort Enable */ 260#define Int_STargAbtEn 0x00000004 /* 1:Signalled Target Abort Enable */
262#define Int_BLExEn 0x00000002 /* 1:Buffer List Exhausted Enable */ 261#define Int_BLExEn 0x00000002 /* 1:Buffer List Exhausted Enable */
263#define Int_FDAExEn 0x00000001 /* 1:Free Descriptor Area */ 262#define Int_FDAExEn 0x00000001 /* 1:Free Descriptor Area */
264 /* Exhausted Enable */ 263 /* Exhausted Enable */
265 264
266/* Int_Src bit asign ------------------------------------------------------- */ 265/* Int_Src bit asign ------------------------------------------------------- */
267#define Int_NRabt 0x00004000 /* 1:Non Recoverable error */ 266#define Int_NRabt 0x00004000 /* 1:Non Recoverable error */
268#define Int_DmParErrStat 0x00002000 /* 1:DMA Parity Error & Clear */ 267#define Int_DmParErrStat 0x00002000 /* 1:DMA Parity Error & Clear */
269#define Int_BLEx 0x00001000 /* 1:Buffer List Empty & Clear */ 268#define Int_BLEx 0x00001000 /* 1:Buffer List Empty & Clear */
270#define Int_FDAEx 0x00000800 /* 1:FDA Empty & Clear */ 269#define Int_FDAEx 0x00000800 /* 1:FDA Empty & Clear */
271#define Int_IntNRAbt 0x00000400 /* 1:Non Recoverable Abort */ 270#define Int_IntNRAbt 0x00000400 /* 1:Non Recoverable Abort */
272#define Int_IntCmp 0x00000200 /* 1:MAC control packet complete */ 271#define Int_IntCmp 0x00000200 /* 1:MAC control packet complete */
273#define Int_IntExBD 0x00000100 /* 1:Interrupt Extra BD & Clear */ 272#define Int_IntExBD 0x00000100 /* 1:Interrupt Extra BD & Clear */
274#define Int_DmParErr 0x00000080 /* 1:DMA Parity Error & Clear */ 273#define Int_DmParErr 0x00000080 /* 1:DMA Parity Error & Clear */
275#define Int_IntEarNot 0x00000040 /* 1:Receive Data write & Clear */ 274#define Int_IntEarNot 0x00000040 /* 1:Receive Data write & Clear */
276#define Int_SWInt 0x00000020 /* 1:Software request & Clear */ 275#define Int_SWInt 0x00000020 /* 1:Software request & Clear */
277#define Int_IntBLEx 0x00000010 /* 1:Buffer List Empty & Clear */ 276#define Int_IntBLEx 0x00000010 /* 1:Buffer List Empty & Clear */
278#define Int_IntFDAEx 0x00000008 /* 1:FDA Empty & Clear */ 277#define Int_IntFDAEx 0x00000008 /* 1:FDA Empty & Clear */
279#define Int_IntPCI 0x00000004 /* 1:PCI controller & Clear */ 278#define Int_IntPCI 0x00000004 /* 1:PCI controller & Clear */
280#define Int_IntMacRx 0x00000002 /* 1:Rx controller & Clear */ 279#define Int_IntMacRx 0x00000002 /* 1:Rx controller & Clear */
281#define Int_IntMacTx 0x00000001 /* 1:Tx controller & Clear */ 280#define Int_IntMacTx 0x00000001 /* 1:Tx controller & Clear */
282 281
283/* MD_CA bit asign --------------------------------------------------------- */ 282/* MD_CA bit asign --------------------------------------------------------- */
284#define MD_CA_PreSup 0x00001000 /* 1:Preamble Supress */ 283#define MD_CA_PreSup 0x00001000 /* 1:Preamble Supress */
285#define MD_CA_Busy 0x00000800 /* 1:Busy (Start Operation) */ 284#define MD_CA_Busy 0x00000800 /* 1:Busy (Start Operation) */
286#define MD_CA_Wr 0x00000400 /* 1:Write 0:Read */ 285#define MD_CA_Wr 0x00000400 /* 1:Write 0:Read */
287 286
288 287
289/* 288/*
@@ -307,24 +306,24 @@ struct BDesc {
307#define FD_ALIGN 16 306#define FD_ALIGN 16
308 307
309/* Frame Descripter bit asign ---------------------------------------------- */ 308/* Frame Descripter bit asign ---------------------------------------------- */
310#define FD_FDLength_MASK 0x0000FFFF /* Length MASK */ 309#define FD_FDLength_MASK 0x0000FFFF /* Length MASK */
311#define FD_BDCnt_MASK 0x001F0000 /* BD count MASK in FD */ 310#define FD_BDCnt_MASK 0x001F0000 /* BD count MASK in FD */
312#define FD_FrmOpt_MASK 0x7C000000 /* Frame option MASK */ 311#define FD_FrmOpt_MASK 0x7C000000 /* Frame option MASK */
313#define FD_FrmOpt_BigEndian 0x40000000 /* Tx/Rx */ 312#define FD_FrmOpt_BigEndian 0x40000000 /* Tx/Rx */
314#define FD_FrmOpt_IntTx 0x20000000 /* Tx only */ 313#define FD_FrmOpt_IntTx 0x20000000 /* Tx only */
315#define FD_FrmOpt_NoCRC 0x10000000 /* Tx only */ 314#define FD_FrmOpt_NoCRC 0x10000000 /* Tx only */
316#define FD_FrmOpt_NoPadding 0x08000000 /* Tx only */ 315#define FD_FrmOpt_NoPadding 0x08000000 /* Tx only */
317#define FD_FrmOpt_Packing 0x04000000 /* Rx only */ 316#define FD_FrmOpt_Packing 0x04000000 /* Rx only */
318#define FD_CownsFD 0x80000000 /* FD Controller owner bit */ 317#define FD_CownsFD 0x80000000 /* FD Controller owner bit */
319#define FD_Next_EOL 0x00000001 /* FD EOL indicator */ 318#define FD_Next_EOL 0x00000001 /* FD EOL indicator */
320#define FD_BDCnt_SHIFT 16 319#define FD_BDCnt_SHIFT 16
321 320
322/* Buffer Descripter bit asign --------------------------------------------- */ 321/* Buffer Descripter bit asign --------------------------------------------- */
323#define BD_BuffLength_MASK 0x0000FFFF /* Recieve Data Size */ 322#define BD_BuffLength_MASK 0x0000FFFF /* Recieve Data Size */
324#define BD_RxBDID_MASK 0x00FF0000 /* BD ID Number MASK */ 323#define BD_RxBDID_MASK 0x00FF0000 /* BD ID Number MASK */
325#define BD_RxBDSeqN_MASK 0x7F000000 /* Rx BD Sequence Number */ 324#define BD_RxBDSeqN_MASK 0x7F000000 /* Rx BD Sequence Number */
326#define BD_CownsBD 0x80000000 /* BD Controller owner bit */ 325#define BD_CownsBD 0x80000000 /* BD Controller owner bit */
327#define BD_RxBDID_SHIFT 16 326#define BD_RxBDID_SHIFT 16
328#define BD_RxBDSeqN_SHIFT 24 327#define BD_RxBDSeqN_SHIFT 24
329 328
330 329
@@ -348,13 +347,15 @@ struct BDesc {
348 Int_STargAbtEn | \ 347 Int_STargAbtEn | \
349 Int_BLExEn | Int_FDAExEn) /* maybe 0xb7f*/ 348 Int_BLExEn | Int_FDAExEn) /* maybe 0xb7f*/
350#define DMA_CTL_CMD DMA_BURST_SIZE 349#define DMA_CTL_CMD DMA_BURST_SIZE
351#define HAVE_DMA_RXALIGN(lp) likely((lp)->boardtype != TC35815CF) 350#define HAVE_DMA_RXALIGN(lp) likely((lp)->chiptype != TC35815CF)
352 351
353/* Tuning parameters */ 352/* Tuning parameters */
354#define DMA_BURST_SIZE 32 353#define DMA_BURST_SIZE 32
355#define TX_THRESHOLD 1024 354#define TX_THRESHOLD 1024
356#define TX_THRESHOLD_MAX 1536 /* used threshold with packet max byte for low pci transfer ability.*/ 355/* used threshold with packet max byte for low pci transfer ability.*/
357#define TX_THRESHOLD_KEEP_LIMIT 10 /* setting threshold max value when overrun error occured this count. */ 356#define TX_THRESHOLD_MAX 1536
357/* setting threshold max value when overrun error occured this count. */
358#define TX_THRESHOLD_KEEP_LIMIT 10
358 359
359/* 16 + RX_BUF_NUM * 8 + RX_FD_NUM * 16 + TX_FD_NUM * 32 <= PAGE_SIZE*FD_PAGE_NUM */ 360/* 16 + RX_BUF_NUM * 8 + RX_FD_NUM * 16 + TX_FD_NUM * 32 <= PAGE_SIZE*FD_PAGE_NUM */
360#ifdef TC35815_USE_PACKEDBUFFER 361#ifdef TC35815_USE_PACKEDBUFFER
@@ -396,21 +397,12 @@ struct FrFD {
396}; 397};
397 398
398 399
399#define tc_readl(addr) readl(addr) 400#define tc_readl(addr) ioread32(addr)
400#define tc_writel(d, addr) writel(d, addr) 401#define tc_writel(d, addr) iowrite32(d, addr)
401 402
402#define TC35815_TX_TIMEOUT msecs_to_jiffies(400) 403#define TC35815_TX_TIMEOUT msecs_to_jiffies(400)
403 404
404/* Timer state engine. */ 405/* Information that need to be kept for each controller. */
405enum tc35815_timer_state {
406 arbwait = 0, /* Waiting for auto negotiation to complete. */
407 lupwait = 1, /* Auto-neg complete, awaiting link-up status. */
408 ltrywait = 2, /* Forcing try of all modes, from fastest to slowest. */
409 asleep = 3, /* Time inactive. */
410 lcheck = 4, /* Check link status. */
411};
412
413/* Information that need to be kept for each board. */
414struct tc35815_local { 406struct tc35815_local {
415 struct pci_dev *pci_dev; 407 struct pci_dev *pci_dev;
416 408
@@ -418,12 +410,11 @@ struct tc35815_local {
418 struct napi_struct napi; 410 struct napi_struct napi;
419 411
420 /* statistics */ 412 /* statistics */
421 struct net_device_stats stats;
422 struct { 413 struct {
423 int max_tx_qlen; 414 int max_tx_qlen;
424 int tx_ints; 415 int tx_ints;
425 int rx_ints; 416 int rx_ints;
426 int tx_underrun; 417 int tx_underrun;
427 } lstats; 418 } lstats;
428 419
429 /* Tx control lock. This protects the transmit buffer ring 420 /* Tx control lock. This protects the transmit buffer ring
@@ -433,12 +424,12 @@ struct tc35815_local {
433 */ 424 */
434 spinlock_t lock; 425 spinlock_t lock;
435 426
436 int phy_addr; 427 struct mii_bus mii_bus;
437 int fullduplex; 428 struct phy_device *phy_dev;
438 unsigned short saved_lpa; 429 int duplex;
439 struct timer_list timer; 430 int speed;
440 enum tc35815_timer_state timer_state; /* State of auto-neg timer. */ 431 int link;
441 unsigned int timer_ticks; /* Number of clicks at each state */ 432 struct work_struct restart_work;
442 433
443 /* 434 /*
444 * Transmitting: Batch Mode. 435 * Transmitting: Batch Mode.
@@ -452,7 +443,7 @@ struct tc35815_local {
452 * RX_BUF_NUM BD in Free Buffer FD. 443 * RX_BUF_NUM BD in Free Buffer FD.
453 * One Free Buffer BD has ETH_FRAME_LEN data buffer. 444 * One Free Buffer BD has ETH_FRAME_LEN data buffer.
454 */ 445 */
455 void * fd_buf; /* for TxFD, RxFD, FrFD */ 446 void *fd_buf; /* for TxFD, RxFD, FrFD */
456 dma_addr_t fd_buf_dma; 447 dma_addr_t fd_buf_dma;
457 struct TxFD *tfd_base; 448 struct TxFD *tfd_base;
458 unsigned int tfd_start; 449 unsigned int tfd_start;
@@ -463,7 +454,7 @@ struct tc35815_local {
463 struct FrFD *fbl_ptr; 454 struct FrFD *fbl_ptr;
464#ifdef TC35815_USE_PACKEDBUFFER 455#ifdef TC35815_USE_PACKEDBUFFER
465 unsigned char fbl_curid; 456 unsigned char fbl_curid;
466 void * data_buf[RX_BUF_NUM]; /* packing */ 457 void *data_buf[RX_BUF_NUM]; /* packing */
467 dma_addr_t data_buf_dma[RX_BUF_NUM]; 458 dma_addr_t data_buf_dma[RX_BUF_NUM];
468 struct { 459 struct {
469 struct sk_buff *skb; 460 struct sk_buff *skb;
@@ -476,10 +467,8 @@ struct tc35815_local {
476 dma_addr_t skb_dma; 467 dma_addr_t skb_dma;
477 } tx_skbs[TX_FD_NUM], rx_skbs[RX_BUF_NUM]; 468 } tx_skbs[TX_FD_NUM], rx_skbs[RX_BUF_NUM];
478#endif 469#endif
479 struct mii_if_info mii;
480 unsigned short mii_id[2];
481 u32 msg_enable; 470 u32 msg_enable;
482 board_t boardtype; 471 enum tc35815_chiptype chiptype;
483}; 472};
484 473
485static inline dma_addr_t fd_virt_to_bus(struct tc35815_local *lp, void *virt) 474static inline dma_addr_t fd_virt_to_bus(struct tc35815_local *lp, void *virt)
@@ -506,13 +495,14 @@ static inline void *rxbuf_bus_to_virt(struct tc35815_local *lp, dma_addr_t bus)
506} 495}
507 496
508#define TC35815_DMA_SYNC_ONDEMAND 497#define TC35815_DMA_SYNC_ONDEMAND
509static void* alloc_rxbuf_page(struct pci_dev *hwdev, dma_addr_t *dma_handle) 498static void *alloc_rxbuf_page(struct pci_dev *hwdev, dma_addr_t *dma_handle)
510{ 499{
511#ifdef TC35815_DMA_SYNC_ONDEMAND 500#ifdef TC35815_DMA_SYNC_ONDEMAND
512 void *buf; 501 void *buf;
513 /* pci_map + pci_dma_sync will be more effective than 502 /* pci_map + pci_dma_sync will be more effective than
514 * pci_alloc_consistent on some archs. */ 503 * pci_alloc_consistent on some archs. */
515 if ((buf = (void *)__get_free_page(GFP_ATOMIC)) == NULL) 504 buf = (void *)__get_free_page(GFP_ATOMIC);
505 if (!buf)
516 return NULL; 506 return NULL;
517 *dma_handle = pci_map_single(hwdev, buf, PAGE_SIZE, 507 *dma_handle = pci_map_single(hwdev, buf, PAGE_SIZE,
518 PCI_DMA_FROMDEVICE); 508 PCI_DMA_FROMDEVICE);
@@ -577,7 +567,7 @@ static void tc35815_txdone(struct net_device *dev);
577static int tc35815_close(struct net_device *dev); 567static int tc35815_close(struct net_device *dev);
578static struct net_device_stats *tc35815_get_stats(struct net_device *dev); 568static struct net_device_stats *tc35815_get_stats(struct net_device *dev);
579static void tc35815_set_multicast_list(struct net_device *dev); 569static void tc35815_set_multicast_list(struct net_device *dev);
580static void tc35815_tx_timeout(struct net_device *dev); 570static void tc35815_tx_timeout(struct net_device *dev);
581static int tc35815_ioctl(struct net_device *dev, struct ifreq *rq, int cmd); 571static int tc35815_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
582#ifdef CONFIG_NET_POLL_CONTROLLER 572#ifdef CONFIG_NET_POLL_CONTROLLER
583static void tc35815_poll_controller(struct net_device *dev); 573static void tc35815_poll_controller(struct net_device *dev);
@@ -585,21 +575,225 @@ static void tc35815_poll_controller(struct net_device *dev);
585static const struct ethtool_ops tc35815_ethtool_ops; 575static const struct ethtool_ops tc35815_ethtool_ops;
586 576
587/* Example routines you must write ;->. */ 577/* Example routines you must write ;->. */
588static void tc35815_chip_reset(struct net_device *dev); 578static void tc35815_chip_reset(struct net_device *dev);
589static void tc35815_chip_init(struct net_device *dev); 579static void tc35815_chip_init(struct net_device *dev);
590static void tc35815_find_phy(struct net_device *dev);
591static void tc35815_phy_chip_init(struct net_device *dev);
592 580
593#ifdef DEBUG 581#ifdef DEBUG
594static void panic_queues(struct net_device *dev); 582static void panic_queues(struct net_device *dev);
595#endif 583#endif
596 584
597static void tc35815_timer(unsigned long data); 585static void tc35815_restart_work(struct work_struct *work);
598static void tc35815_start_auto_negotiation(struct net_device *dev, 586
599 struct ethtool_cmd *ep); 587static int tc_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
600static int tc_mdio_read(struct net_device *dev, int phy_id, int location); 588{
601static void tc_mdio_write(struct net_device *dev, int phy_id, int location, 589 struct net_device *dev = bus->priv;
602 int val); 590 struct tc35815_regs __iomem *tr =
591 (struct tc35815_regs __iomem *)dev->base_addr;
592 unsigned long timeout = jiffies + 10;
593
594 tc_writel(MD_CA_Busy | (mii_id << 5) | (regnum & 0x1f), &tr->MD_CA);
595 while (tc_readl(&tr->MD_CA) & MD_CA_Busy) {
596 if (time_after(jiffies, timeout))
597 return -EIO;
598 cpu_relax();
599 }
600 return tc_readl(&tr->MD_Data) & 0xffff;
601}
602
603static int tc_mdio_write(struct mii_bus *bus, int mii_id, int regnum, u16 val)
604{
605 struct net_device *dev = bus->priv;
606 struct tc35815_regs __iomem *tr =
607 (struct tc35815_regs __iomem *)dev->base_addr;
608 unsigned long timeout = jiffies + 10;
609
610 tc_writel(val, &tr->MD_Data);
611 tc_writel(MD_CA_Busy | MD_CA_Wr | (mii_id << 5) | (regnum & 0x1f),
612 &tr->MD_CA);
613 while (tc_readl(&tr->MD_CA) & MD_CA_Busy) {
614 if (time_after(jiffies, timeout))
615 return -EIO;
616 cpu_relax();
617 }
618 return 0;
619}
620
621static void tc_handle_link_change(struct net_device *dev)
622{
623 struct tc35815_local *lp = netdev_priv(dev);
624 struct phy_device *phydev = lp->phy_dev;
625 unsigned long flags;
626 int status_change = 0;
627
628 spin_lock_irqsave(&lp->lock, flags);
629 if (phydev->link &&
630 (lp->speed != phydev->speed || lp->duplex != phydev->duplex)) {
631 struct tc35815_regs __iomem *tr =
632 (struct tc35815_regs __iomem *)dev->base_addr;
633 u32 reg;
634
635 reg = tc_readl(&tr->MAC_Ctl);
636 reg |= MAC_HaltReq;
637 tc_writel(reg, &tr->MAC_Ctl);
638 if (phydev->duplex == DUPLEX_FULL)
639 reg |= MAC_FullDup;
640 else
641 reg &= ~MAC_FullDup;
642 tc_writel(reg, &tr->MAC_Ctl);
643 reg &= ~MAC_HaltReq;
644 tc_writel(reg, &tr->MAC_Ctl);
645
646 /*
647 * TX4939 PCFG.SPEEDn bit will be changed on
648 * NETDEV_CHANGE event.
649 */
650
651#if !defined(NO_CHECK_CARRIER) && defined(WORKAROUND_LOSTCAR)
652 /*
653 * WORKAROUND: enable LostCrS only if half duplex
654 * operation.
655 * (TX4939 does not have EnLCarr)
656 */
657 if (phydev->duplex == DUPLEX_HALF &&
658 lp->chiptype != TC35815_TX4939)
659 tc_writel(tc_readl(&tr->Tx_Ctl) | Tx_EnLCarr,
660 &tr->Tx_Ctl);
661#endif
662
663 lp->speed = phydev->speed;
664 lp->duplex = phydev->duplex;
665 status_change = 1;
666 }
667
668 if (phydev->link != lp->link) {
669 if (phydev->link) {
670#ifdef WORKAROUND_100HALF_PROMISC
671 /* delayed promiscuous enabling */
672 if (dev->flags & IFF_PROMISC)
673 tc35815_set_multicast_list(dev);
674#endif
675 netif_schedule(dev);
676 } else {
677 lp->speed = 0;
678 lp->duplex = -1;
679 }
680 lp->link = phydev->link;
681
682 status_change = 1;
683 }
684 spin_unlock_irqrestore(&lp->lock, flags);
685
686 if (status_change && netif_msg_link(lp)) {
687 phy_print_status(phydev);
688#ifdef DEBUG
689 printk(KERN_DEBUG
690 "%s: MII BMCR %04x BMSR %04x LPA %04x\n",
691 dev->name,
692 phy_read(phydev, MII_BMCR),
693 phy_read(phydev, MII_BMSR),
694 phy_read(phydev, MII_LPA));
695#endif
696 }
697}
698
699static int tc_mii_probe(struct net_device *dev)
700{
701 struct tc35815_local *lp = netdev_priv(dev);
702 struct phy_device *phydev = NULL;
703 int phy_addr;
704 u32 dropmask;
705
706 /* find the first phy */
707 for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) {
708 if (lp->mii_bus.phy_map[phy_addr]) {
709 if (phydev) {
710 printk(KERN_ERR "%s: multiple PHYs found\n",
711 dev->name);
712 return -EINVAL;
713 }
714 phydev = lp->mii_bus.phy_map[phy_addr];
715 break;
716 }
717 }
718
719 if (!phydev) {
720 printk(KERN_ERR "%s: no PHY found\n", dev->name);
721 return -ENODEV;
722 }
723
724 /* attach the mac to the phy */
725 phydev = phy_connect(dev, phydev->dev.bus_id,
726 &tc_handle_link_change, 0,
727 lp->chiptype == TC35815_TX4939 ?
728 PHY_INTERFACE_MODE_RMII : PHY_INTERFACE_MODE_MII);
729 if (IS_ERR(phydev)) {
730 printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name);
731 return PTR_ERR(phydev);
732 }
733 printk(KERN_INFO "%s: attached PHY driver [%s] "
734 "(mii_bus:phy_addr=%s, id=%x)\n",
735 dev->name, phydev->drv->name, phydev->dev.bus_id,
736 phydev->phy_id);
737
738 /* mask with MAC supported features */
739 phydev->supported &= PHY_BASIC_FEATURES;
740 dropmask = 0;
741 if (options.speed == 10)
742 dropmask |= SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full;
743 else if (options.speed == 100)
744 dropmask |= SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full;
745 if (options.duplex == 1)
746 dropmask |= SUPPORTED_10baseT_Full | SUPPORTED_100baseT_Full;
747 else if (options.duplex == 2)
748 dropmask |= SUPPORTED_10baseT_Half | SUPPORTED_100baseT_Half;
749 phydev->supported &= ~dropmask;
750 phydev->advertising = phydev->supported;
751
752 lp->link = 0;
753 lp->speed = 0;
754 lp->duplex = -1;
755 lp->phy_dev = phydev;
756
757 return 0;
758}
759
760static int tc_mii_init(struct net_device *dev)
761{
762 struct tc35815_local *lp = netdev_priv(dev);
763 int err;
764 int i;
765
766 lp->mii_bus.name = "tc35815_mii_bus";
767 lp->mii_bus.read = tc_mdio_read;
768 lp->mii_bus.write = tc_mdio_write;
769 snprintf(lp->mii_bus.id, MII_BUS_ID_SIZE, "%x",
770 (lp->pci_dev->bus->number << 8) | lp->pci_dev->devfn);
771 lp->mii_bus.priv = dev;
772 lp->mii_bus.dev = &lp->pci_dev->dev;
773 lp->mii_bus.irq = kmalloc(sizeof(int) * PHY_MAX_ADDR, GFP_KERNEL);
774 if (!lp->mii_bus.irq) {
775 err = -ENOMEM;
776 goto err_out;
777 }
778
779 for (i = 0; i < PHY_MAX_ADDR; i++)
780 lp->mii_bus.irq[i] = PHY_POLL;
781
782 err = mdiobus_register(&lp->mii_bus);
783 if (err)
784 goto err_out_free_mdio_irq;
785 err = tc_mii_probe(dev);
786 if (err)
787 goto err_out_unregister_bus;
788 return 0;
789
790err_out_unregister_bus:
791 mdiobus_unregister(&lp->mii_bus);
792err_out_free_mdio_irq:
793 kfree(lp->mii_bus.irq);
794err_out:
795 return err;
796}
603 797
604#ifdef CONFIG_CPU_TX49XX 798#ifdef CONFIG_CPU_TX49XX
605/* 799/*
@@ -617,7 +811,7 @@ static int __devinit tc35815_mac_match(struct device *dev, void *data)
617 811
618static int __devinit tc35815_read_plat_dev_addr(struct net_device *dev) 812static int __devinit tc35815_read_plat_dev_addr(struct net_device *dev)
619{ 813{
620 struct tc35815_local *lp = dev->priv; 814 struct tc35815_local *lp = netdev_priv(dev);
621 struct device *pd = bus_find_device(&platform_bus_type, NULL, 815 struct device *pd = bus_find_device(&platform_bus_type, NULL,
622 lp->pci_dev, tc35815_mac_match); 816 lp->pci_dev, tc35815_mac_match);
623 if (pd) { 817 if (pd) {
@@ -635,7 +829,7 @@ static int __devinit tc35815_read_plat_dev_addr(struct net_device *dev)
635} 829}
636#endif 830#endif
637 831
638static int __devinit tc35815_init_dev_addr (struct net_device *dev) 832static int __devinit tc35815_init_dev_addr(struct net_device *dev)
639{ 833{
640 struct tc35815_regs __iomem *tr = 834 struct tc35815_regs __iomem *tr =
641 (struct tc35815_regs __iomem *)dev->base_addr; 835 (struct tc35815_regs __iomem *)dev->base_addr;
@@ -657,21 +851,21 @@ static int __devinit tc35815_init_dev_addr (struct net_device *dev)
657 return 0; 851 return 0;
658} 852}
659 853
660static int __devinit tc35815_init_one (struct pci_dev *pdev, 854static int __devinit tc35815_init_one(struct pci_dev *pdev,
661 const struct pci_device_id *ent) 855 const struct pci_device_id *ent)
662{ 856{
663 void __iomem *ioaddr = NULL; 857 void __iomem *ioaddr = NULL;
664 struct net_device *dev; 858 struct net_device *dev;
665 struct tc35815_local *lp; 859 struct tc35815_local *lp;
666 int rc; 860 int rc;
667 unsigned long mmio_start, mmio_end, mmio_flags, mmio_len; 861 DECLARE_MAC_BUF(mac);
668 862
669 static int printed_version; 863 static int printed_version;
670 if (!printed_version++) { 864 if (!printed_version++) {
671 printk(version); 865 printk(version);
672 dev_printk(KERN_DEBUG, &pdev->dev, 866 dev_printk(KERN_DEBUG, &pdev->dev,
673 "speed:%d duplex:%d doforce:%d\n", 867 "speed:%d duplex:%d\n",
674 options.speed, options.duplex, options.doforce); 868 options.speed, options.duplex);
675 } 869 }
676 870
677 if (!pdev->irq) { 871 if (!pdev->irq) {
@@ -680,55 +874,24 @@ static int __devinit tc35815_init_one (struct pci_dev *pdev,
680 } 874 }
681 875
682 /* dev zeroed in alloc_etherdev */ 876 /* dev zeroed in alloc_etherdev */
683 dev = alloc_etherdev (sizeof (*lp)); 877 dev = alloc_etherdev(sizeof(*lp));
684 if (dev == NULL) { 878 if (dev == NULL) {
685 dev_err(&pdev->dev, "unable to alloc new ethernet\n"); 879 dev_err(&pdev->dev, "unable to alloc new ethernet\n");
686 return -ENOMEM; 880 return -ENOMEM;
687 } 881 }
688 SET_NETDEV_DEV(dev, &pdev->dev); 882 SET_NETDEV_DEV(dev, &pdev->dev);
689 lp = dev->priv; 883 lp = netdev_priv(dev);
690 lp->dev = dev; 884 lp->dev = dev;
691 885
692 /* enable device (incl. PCI PM wakeup), and bus-mastering */ 886 /* enable device (incl. PCI PM wakeup), and bus-mastering */
693 rc = pci_enable_device (pdev); 887 rc = pcim_enable_device(pdev);
694 if (rc) 888 if (rc)
695 goto err_out; 889 goto err_out;
696 890 rc = pcim_iomap_regions(pdev, 1 << 1, MODNAME);
697 mmio_start = pci_resource_start (pdev, 1);
698 mmio_end = pci_resource_end (pdev, 1);
699 mmio_flags = pci_resource_flags (pdev, 1);
700 mmio_len = pci_resource_len (pdev, 1);
701
702 /* set this immediately, we need to know before
703 * we talk to the chip directly */
704
705 /* make sure PCI base addr 1 is MMIO */
706 if (!(mmio_flags & IORESOURCE_MEM)) {
707 dev_err(&pdev->dev, "region #1 not an MMIO resource, aborting\n");
708 rc = -ENODEV;
709 goto err_out;
710 }
711
712 /* check for weird/broken PCI region reporting */
713 if ((mmio_len < sizeof(struct tc35815_regs))) {
714 dev_err(&pdev->dev, "Invalid PCI region size(s), aborting\n");
715 rc = -ENODEV;
716 goto err_out;
717 }
718
719 rc = pci_request_regions (pdev, MODNAME);
720 if (rc) 891 if (rc)
721 goto err_out; 892 goto err_out;
722 893 pci_set_master(pdev);
723 pci_set_master (pdev); 894 ioaddr = pcim_iomap_table(pdev)[1];
724
725 /* ioremap MMIO region */
726 ioaddr = ioremap (mmio_start, mmio_len);
727 if (ioaddr == NULL) {
728 dev_err(&pdev->dev, "cannot remap MMIO, aborting\n");
729 rc = -EIO;
730 goto err_out_free_res;
731 }
732 895
733 /* Initialize the device structure. */ 896 /* Initialize the device structure. */
734 dev->open = tc35815_open; 897 dev->open = tc35815_open;
@@ -748,11 +911,12 @@ static int __devinit tc35815_init_one (struct pci_dev *pdev,
748#endif 911#endif
749 912
750 dev->irq = pdev->irq; 913 dev->irq = pdev->irq;
751 dev->base_addr = (unsigned long) ioaddr; 914 dev->base_addr = (unsigned long)ioaddr;
752 915
916 INIT_WORK(&lp->restart_work, tc35815_restart_work);
753 spin_lock_init(&lp->lock); 917 spin_lock_init(&lp->lock);
754 lp->pci_dev = pdev; 918 lp->pci_dev = pdev;
755 lp->boardtype = ent->driver_data; 919 lp->chiptype = ent->driver_data;
756 920
757 lp->msg_enable = NETIF_MSG_TX_ERR | NETIF_MSG_HW | NETIF_MSG_DRV | NETIF_MSG_LINK; 921 lp->msg_enable = NETIF_MSG_TX_ERR | NETIF_MSG_HW | NETIF_MSG_DRV | NETIF_MSG_LINK;
758 pci_set_drvdata(pdev, dev); 922 pci_set_drvdata(pdev, dev);
@@ -766,68 +930,49 @@ static int __devinit tc35815_init_one (struct pci_dev *pdev,
766 random_ether_addr(dev->dev_addr); 930 random_ether_addr(dev->dev_addr);
767 } 931 }
768 932
769 rc = register_netdev (dev); 933 rc = register_netdev(dev);
770 if (rc) 934 if (rc)
771 goto err_out_unmap; 935 goto err_out;
772 936
773 memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len); 937 memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
774 printk(KERN_INFO "%s: %s at 0x%lx, " 938 printk(KERN_INFO "%s: %s at 0x%lx, %s, IRQ %d\n",
775 "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x, "
776 "IRQ %d\n",
777 dev->name, 939 dev->name,
778 board_info[ent->driver_data].name, 940 chip_info[ent->driver_data].name,
779 dev->base_addr, 941 dev->base_addr,
780 dev->dev_addr[0], dev->dev_addr[1], 942 print_mac(mac, dev->dev_addr),
781 dev->dev_addr[2], dev->dev_addr[3],
782 dev->dev_addr[4], dev->dev_addr[5],
783 dev->irq); 943 dev->irq);
784 944
785 setup_timer(&lp->timer, tc35815_timer, (unsigned long) dev); 945 rc = tc_mii_init(dev);
786 lp->mii.dev = dev; 946 if (rc)
787 lp->mii.mdio_read = tc_mdio_read; 947 goto err_out_unregister;
788 lp->mii.mdio_write = tc_mdio_write;
789 lp->mii.phy_id_mask = 0x1f;
790 lp->mii.reg_num_mask = 0x1f;
791 tc35815_find_phy(dev);
792 lp->mii.phy_id = lp->phy_addr;
793 lp->mii.full_duplex = 0;
794 lp->mii.force_media = 0;
795 948
796 return 0; 949 return 0;
797 950
798err_out_unmap: 951err_out_unregister:
799 iounmap(ioaddr); 952 unregister_netdev(dev);
800err_out_free_res:
801 pci_release_regions (pdev);
802err_out: 953err_out:
803 free_netdev (dev); 954 free_netdev(dev);
804 return rc; 955 return rc;
805} 956}
806 957
807 958
808static void __devexit tc35815_remove_one (struct pci_dev *pdev) 959static void __devexit tc35815_remove_one(struct pci_dev *pdev)
809{ 960{
810 struct net_device *dev = pci_get_drvdata (pdev); 961 struct net_device *dev = pci_get_drvdata(pdev);
811 unsigned long mmio_addr; 962 struct tc35815_local *lp = netdev_priv(dev);
812
813 mmio_addr = dev->base_addr;
814
815 unregister_netdev (dev);
816
817 if (mmio_addr) {
818 iounmap ((void __iomem *)mmio_addr);
819 pci_release_regions (pdev);
820 }
821
822 free_netdev (dev);
823 963
824 pci_set_drvdata (pdev, NULL); 964 phy_disconnect(lp->phy_dev);
965 mdiobus_unregister(&lp->mii_bus);
966 kfree(lp->mii_bus.irq);
967 unregister_netdev(dev);
968 free_netdev(dev);
969 pci_set_drvdata(pdev, NULL);
825} 970}
826 971
827static int 972static int
828tc35815_init_queues(struct net_device *dev) 973tc35815_init_queues(struct net_device *dev)
829{ 974{
830 struct tc35815_local *lp = dev->priv; 975 struct tc35815_local *lp = netdev_priv(dev);
831 int i; 976 int i;
832 unsigned long fd_addr; 977 unsigned long fd_addr;
833 978
@@ -838,11 +983,17 @@ tc35815_init_queues(struct net_device *dev)
838 sizeof(struct TxFD) * TX_FD_NUM > 983 sizeof(struct TxFD) * TX_FD_NUM >
839 PAGE_SIZE * FD_PAGE_NUM); 984 PAGE_SIZE * FD_PAGE_NUM);
840 985
841 if ((lp->fd_buf = pci_alloc_consistent(lp->pci_dev, PAGE_SIZE * FD_PAGE_NUM, &lp->fd_buf_dma)) == 0) 986 lp->fd_buf = pci_alloc_consistent(lp->pci_dev,
987 PAGE_SIZE * FD_PAGE_NUM,
988 &lp->fd_buf_dma);
989 if (!lp->fd_buf)
842 return -ENOMEM; 990 return -ENOMEM;
843 for (i = 0; i < RX_BUF_NUM; i++) { 991 for (i = 0; i < RX_BUF_NUM; i++) {
844#ifdef TC35815_USE_PACKEDBUFFER 992#ifdef TC35815_USE_PACKEDBUFFER
845 if ((lp->data_buf[i] = alloc_rxbuf_page(lp->pci_dev, &lp->data_buf_dma[i])) == NULL) { 993 lp->data_buf[i] =
994 alloc_rxbuf_page(lp->pci_dev,
995 &lp->data_buf_dma[i]);
996 if (!lp->data_buf[i]) {
846 while (--i >= 0) { 997 while (--i >= 0) {
847 free_rxbuf_page(lp->pci_dev, 998 free_rxbuf_page(lp->pci_dev,
848 lp->data_buf[i], 999 lp->data_buf[i],
@@ -885,18 +1036,17 @@ tc35815_init_queues(struct net_device *dev)
885#endif 1036#endif
886 printk("\n"); 1037 printk("\n");
887 } else { 1038 } else {
888 for (i = 0; i < FD_PAGE_NUM; i++) { 1039 for (i = 0; i < FD_PAGE_NUM; i++)
889 clear_page((void *)((unsigned long)lp->fd_buf + i * PAGE_SIZE)); 1040 clear_page((void *)((unsigned long)lp->fd_buf +
890 } 1041 i * PAGE_SIZE));
891 } 1042 }
892 fd_addr = (unsigned long)lp->fd_buf; 1043 fd_addr = (unsigned long)lp->fd_buf;
893 1044
894 /* Free Descriptors (for Receive) */ 1045 /* Free Descriptors (for Receive) */
895 lp->rfd_base = (struct RxFD *)fd_addr; 1046 lp->rfd_base = (struct RxFD *)fd_addr;
896 fd_addr += sizeof(struct RxFD) * RX_FD_NUM; 1047 fd_addr += sizeof(struct RxFD) * RX_FD_NUM;
897 for (i = 0; i < RX_FD_NUM; i++) { 1048 for (i = 0; i < RX_FD_NUM; i++)
898 lp->rfd_base[i].fd.FDCtl = cpu_to_le32(FD_CownsFD); 1049 lp->rfd_base[i].fd.FDCtl = cpu_to_le32(FD_CownsFD);
899 }
900 lp->rfd_cur = lp->rfd_base; 1050 lp->rfd_cur = lp->rfd_base;
901 lp->rfd_limit = (struct RxFD *)fd_addr - (RX_FD_RESERVE + 1); 1051 lp->rfd_limit = (struct RxFD *)fd_addr - (RX_FD_RESERVE + 1);
902 1052
@@ -964,7 +1114,7 @@ tc35815_init_queues(struct net_device *dev)
964static void 1114static void
965tc35815_clear_queues(struct net_device *dev) 1115tc35815_clear_queues(struct net_device *dev)
966{ 1116{
967 struct tc35815_local *lp = dev->priv; 1117 struct tc35815_local *lp = netdev_priv(dev);
968 int i; 1118 int i;
969 1119
970 for (i = 0; i < TX_FD_NUM; i++) { 1120 for (i = 0; i < TX_FD_NUM; i++) {
@@ -995,7 +1145,7 @@ tc35815_clear_queues(struct net_device *dev)
995static void 1145static void
996tc35815_free_queues(struct net_device *dev) 1146tc35815_free_queues(struct net_device *dev)
997{ 1147{
998 struct tc35815_local *lp = dev->priv; 1148 struct tc35815_local *lp = netdev_priv(dev);
999 int i; 1149 int i;
1000 1150
1001 if (lp->tfd_base) { 1151 if (lp->tfd_base) {
@@ -1076,7 +1226,7 @@ dump_rxfd(struct RxFD *fd)
1076 le32_to_cpu(fd->fd.FDStat), 1226 le32_to_cpu(fd->fd.FDStat),
1077 le32_to_cpu(fd->fd.FDCtl)); 1227 le32_to_cpu(fd->fd.FDCtl));
1078 if (le32_to_cpu(fd->fd.FDCtl) & FD_CownsFD) 1228 if (le32_to_cpu(fd->fd.FDCtl) & FD_CownsFD)
1079 return 0; 1229 return 0;
1080 printk("BD: "); 1230 printk("BD: ");
1081 for (i = 0; i < bd_count; i++) 1231 for (i = 0; i < bd_count; i++)
1082 printk(" %08x %08x", 1232 printk(" %08x %08x",
@@ -1109,7 +1259,7 @@ dump_frfd(struct FrFD *fd)
1109static void 1259static void
1110panic_queues(struct net_device *dev) 1260panic_queues(struct net_device *dev)
1111{ 1261{
1112 struct tc35815_local *lp = dev->priv; 1262 struct tc35815_local *lp = netdev_priv(dev);
1113 int i; 1263 int i;
1114 1264
1115 printk("TxFD base %p, start %u, end %u\n", 1265 printk("TxFD base %p, start %u, end %u\n",
@@ -1128,42 +1278,33 @@ panic_queues(struct net_device *dev)
1128} 1278}
1129#endif 1279#endif
1130 1280
1131static void print_eth(char *add) 1281static void print_eth(const u8 *add)
1132{ 1282{
1133 int i; 1283 DECLARE_MAC_BUF(mac);
1134 1284
1135 printk("print_eth(%p)\n", add); 1285 printk(KERN_DEBUG "print_eth(%p)\n", add);
1136 for (i = 0; i < 6; i++) 1286 printk(KERN_DEBUG " %s =>", print_mac(mac, add + 6));
1137 printk(" %2.2X", (unsigned char) add[i + 6]); 1287 printk(KERN_CONT " %s : %02x%02x\n",
1138 printk(" =>"); 1288 print_mac(mac, add), add[12], add[13]);
1139 for (i = 0; i < 6; i++)
1140 printk(" %2.2X", (unsigned char) add[i]);
1141 printk(" : %2.2X%2.2X\n", (unsigned char) add[12], (unsigned char) add[13]);
1142} 1289}
1143 1290
1144static int tc35815_tx_full(struct net_device *dev) 1291static int tc35815_tx_full(struct net_device *dev)
1145{ 1292{
1146 struct tc35815_local *lp = dev->priv; 1293 struct tc35815_local *lp = netdev_priv(dev);
1147 return ((lp->tfd_start + 1) % TX_FD_NUM == lp->tfd_end); 1294 return ((lp->tfd_start + 1) % TX_FD_NUM == lp->tfd_end);
1148} 1295}
1149 1296
1150static void tc35815_restart(struct net_device *dev) 1297static void tc35815_restart(struct net_device *dev)
1151{ 1298{
1152 struct tc35815_local *lp = dev->priv; 1299 struct tc35815_local *lp = netdev_priv(dev);
1153 int pid = lp->phy_addr; 1300
1154 int do_phy_reset = 1; 1301 if (lp->phy_dev) {
1155 del_timer(&lp->timer); /* Kill if running */
1156
1157 if (lp->mii_id[0] == 0x0016 && (lp->mii_id[1] & 0xfc00) == 0xf800) {
1158 /* Resetting PHY cause problem on some chip... (SEEQ 80221) */
1159 do_phy_reset = 0;
1160 }
1161 if (do_phy_reset) {
1162 int timeout; 1302 int timeout;
1163 tc_mdio_write(dev, pid, MII_BMCR, BMCR_RESET); 1303
1304 phy_write(lp->phy_dev, MII_BMCR, BMCR_RESET);
1164 timeout = 100; 1305 timeout = 100;
1165 while (--timeout) { 1306 while (--timeout) {
1166 if (!(tc_mdio_read(dev, pid, MII_BMCR) & BMCR_RESET)) 1307 if (!(phy_read(lp->phy_dev, MII_BMCR) & BMCR_RESET))
1167 break; 1308 break;
1168 udelay(1); 1309 udelay(1);
1169 } 1310 }
@@ -1171,16 +1312,40 @@ static void tc35815_restart(struct net_device *dev)
1171 printk(KERN_ERR "%s: BMCR reset failed.\n", dev->name); 1312 printk(KERN_ERR "%s: BMCR reset failed.\n", dev->name);
1172 } 1313 }
1173 1314
1315 spin_lock_irq(&lp->lock);
1174 tc35815_chip_reset(dev); 1316 tc35815_chip_reset(dev);
1175 tc35815_clear_queues(dev); 1317 tc35815_clear_queues(dev);
1176 tc35815_chip_init(dev); 1318 tc35815_chip_init(dev);
1177 /* Reconfigure CAM again since tc35815_chip_init() initialize it. */ 1319 /* Reconfigure CAM again since tc35815_chip_init() initialize it. */
1178 tc35815_set_multicast_list(dev); 1320 tc35815_set_multicast_list(dev);
1321 spin_unlock_irq(&lp->lock);
1322
1323 netif_wake_queue(dev);
1324}
1325
1326static void tc35815_restart_work(struct work_struct *work)
1327{
1328 struct tc35815_local *lp =
1329 container_of(work, struct tc35815_local, restart_work);
1330 struct net_device *dev = lp->dev;
1331
1332 tc35815_restart(dev);
1333}
1334
1335static void tc35815_schedule_restart(struct net_device *dev)
1336{
1337 struct tc35815_local *lp = netdev_priv(dev);
1338 struct tc35815_regs __iomem *tr =
1339 (struct tc35815_regs __iomem *)dev->base_addr;
1340
1341 /* disable interrupts */
1342 tc_writel(0, &tr->Int_En);
1343 tc_writel(tc_readl(&tr->DMA_Ctl) | DMA_IntMask, &tr->DMA_Ctl);
1344 schedule_work(&lp->restart_work);
1179} 1345}
1180 1346
1181static void tc35815_tx_timeout(struct net_device *dev) 1347static void tc35815_tx_timeout(struct net_device *dev)
1182{ 1348{
1183 struct tc35815_local *lp = dev->priv;
1184 struct tc35815_regs __iomem *tr = 1349 struct tc35815_regs __iomem *tr =
1185 (struct tc35815_regs __iomem *)dev->base_addr; 1350 (struct tc35815_regs __iomem *)dev->base_addr;
1186 1351
@@ -1188,28 +1353,12 @@ static void tc35815_tx_timeout(struct net_device *dev)
1188 dev->name, tc_readl(&tr->Tx_Stat)); 1353 dev->name, tc_readl(&tr->Tx_Stat));
1189 1354
1190 /* Try to restart the adaptor. */ 1355 /* Try to restart the adaptor. */
1191 spin_lock_irq(&lp->lock); 1356 tc35815_schedule_restart(dev);
1192 tc35815_restart(dev); 1357 dev->stats.tx_errors++;
1193 spin_unlock_irq(&lp->lock);
1194
1195 lp->stats.tx_errors++;
1196
1197 /* If we have space available to accept new transmit
1198 * requests, wake up the queueing layer. This would
1199 * be the case if the chipset_init() call above just
1200 * flushes out the tx queue and empties it.
1201 *
1202 * If instead, the tx queue is retained then the
1203 * netif_wake_queue() call should be placed in the
1204 * TX completion interrupt handler of the driver instead
1205 * of here.
1206 */
1207 if (!tc35815_tx_full(dev))
1208 netif_wake_queue(dev);
1209} 1358}
1210 1359
1211/* 1360/*
1212 * Open/initialize the board. This is called (in the current kernel) 1361 * Open/initialize the controller. This is called (in the current kernel)
1213 * sometime after booting when the 'ifconfig' program is run. 1362 * sometime after booting when the 'ifconfig' program is run.
1214 * 1363 *
1215 * This routine should set everything up anew at each open, even 1364 * This routine should set everything up anew at each open, even
@@ -1219,17 +1368,16 @@ static void tc35815_tx_timeout(struct net_device *dev)
1219static int 1368static int
1220tc35815_open(struct net_device *dev) 1369tc35815_open(struct net_device *dev)
1221{ 1370{
1222 struct tc35815_local *lp = dev->priv; 1371 struct tc35815_local *lp = netdev_priv(dev);
1223 1372
1224 /* 1373 /*
1225 * This is used if the interrupt line can turned off (shared). 1374 * This is used if the interrupt line can turned off (shared).
1226 * See 3c503.c for an example of selecting the IRQ at config-time. 1375 * See 3c503.c for an example of selecting the IRQ at config-time.
1227 */ 1376 */
1228 if (request_irq(dev->irq, &tc35815_interrupt, IRQF_SHARED, dev->name, dev)) { 1377 if (request_irq(dev->irq, &tc35815_interrupt, IRQF_SHARED,
1378 dev->name, dev))
1229 return -EAGAIN; 1379 return -EAGAIN;
1230 }
1231 1380
1232 del_timer(&lp->timer); /* Kill if running */
1233 tc35815_chip_reset(dev); 1381 tc35815_chip_reset(dev);
1234 1382
1235 if (tc35815_init_queues(dev) != 0) { 1383 if (tc35815_init_queues(dev) != 0) {
@@ -1246,6 +1394,9 @@ tc35815_open(struct net_device *dev)
1246 tc35815_chip_init(dev); 1394 tc35815_chip_init(dev);
1247 spin_unlock_irq(&lp->lock); 1395 spin_unlock_irq(&lp->lock);
1248 1396
1397 /* schedule a link state check */
1398 phy_start(lp->phy_dev);
1399
1249 /* We are now ready to accept transmit requeusts from 1400 /* We are now ready to accept transmit requeusts from
1250 * the queueing layer of the networking. 1401 * the queueing layer of the networking.
1251 */ 1402 */
@@ -1261,7 +1412,7 @@ tc35815_open(struct net_device *dev)
1261 */ 1412 */
1262static int tc35815_send_packet(struct sk_buff *skb, struct net_device *dev) 1413static int tc35815_send_packet(struct sk_buff *skb, struct net_device *dev)
1263{ 1414{
1264 struct tc35815_local *lp = dev->priv; 1415 struct tc35815_local *lp = netdev_priv(dev);
1265 struct TxFD *txfd; 1416 struct TxFD *txfd;
1266 unsigned long flags; 1417 unsigned long flags;
1267 1418
@@ -1366,7 +1517,7 @@ static void tc35815_fatal_error_interrupt(struct net_device *dev, u32 status)
1366 panic("%s: Too many fatal errors.", dev->name); 1517 panic("%s: Too many fatal errors.", dev->name);
1367 printk(KERN_WARNING "%s: Resetting ...\n", dev->name); 1518 printk(KERN_WARNING "%s: Resetting ...\n", dev->name);
1368 /* Try to restart the adaptor. */ 1519 /* Try to restart the adaptor. */
1369 tc35815_restart(dev); 1520 tc35815_schedule_restart(dev);
1370} 1521}
1371 1522
1372#ifdef TC35815_NAPI 1523#ifdef TC35815_NAPI
@@ -1375,7 +1526,7 @@ static int tc35815_do_interrupt(struct net_device *dev, u32 status, int limit)
1375static int tc35815_do_interrupt(struct net_device *dev, u32 status) 1526static int tc35815_do_interrupt(struct net_device *dev, u32 status)
1376#endif 1527#endif
1377{ 1528{
1378 struct tc35815_local *lp = dev->priv; 1529 struct tc35815_local *lp = netdev_priv(dev);
1379 struct tc35815_regs __iomem *tr = 1530 struct tc35815_regs __iomem *tr =
1380 (struct tc35815_regs __iomem *)dev->base_addr; 1531 (struct tc35815_regs __iomem *)dev->base_addr;
1381 int ret = -1; 1532 int ret = -1;
@@ -1392,7 +1543,7 @@ static int tc35815_do_interrupt(struct net_device *dev, u32 status)
1392 printk(KERN_WARNING 1543 printk(KERN_WARNING
1393 "%s: Free Descriptor Area Exhausted (%#x).\n", 1544 "%s: Free Descriptor Area Exhausted (%#x).\n",
1394 dev->name, status); 1545 dev->name, status);
1395 lp->stats.rx_dropped++; 1546 dev->stats.rx_dropped++;
1396 ret = 0; 1547 ret = 0;
1397 } 1548 }
1398 if (status & Int_IntBLEx) { 1549 if (status & Int_IntBLEx) {
@@ -1401,14 +1552,14 @@ static int tc35815_do_interrupt(struct net_device *dev, u32 status)
1401 printk(KERN_WARNING 1552 printk(KERN_WARNING
1402 "%s: Buffer List Exhausted (%#x).\n", 1553 "%s: Buffer List Exhausted (%#x).\n",
1403 dev->name, status); 1554 dev->name, status);
1404 lp->stats.rx_dropped++; 1555 dev->stats.rx_dropped++;
1405 ret = 0; 1556 ret = 0;
1406 } 1557 }
1407 if (status & Int_IntExBD) { 1558 if (status & Int_IntExBD) {
1408 printk(KERN_WARNING 1559 printk(KERN_WARNING
1409 "%s: Excessive Buffer Descriptiors (%#x).\n", 1560 "%s: Excessive Buffer Descriptiors (%#x).\n",
1410 dev->name, status); 1561 dev->name, status);
1411 lp->stats.rx_length_errors++; 1562 dev->stats.rx_length_errors++;
1412 ret = 0; 1563 ret = 0;
1413 } 1564 }
1414 1565
@@ -1492,7 +1643,7 @@ static void
1492tc35815_rx(struct net_device *dev) 1643tc35815_rx(struct net_device *dev)
1493#endif 1644#endif
1494{ 1645{
1495 struct tc35815_local *lp = dev->priv; 1646 struct tc35815_local *lp = netdev_priv(dev);
1496 unsigned int fdctl; 1647 unsigned int fdctl;
1497 int i; 1648 int i;
1498 int buf_free_count = 0; 1649 int buf_free_count = 0;
@@ -1532,7 +1683,7 @@ tc35815_rx(struct net_device *dev)
1532 if (skb == NULL) { 1683 if (skb == NULL) {
1533 printk(KERN_NOTICE "%s: Memory squeeze, dropping packet.\n", 1684 printk(KERN_NOTICE "%s: Memory squeeze, dropping packet.\n",
1534 dev->name); 1685 dev->name);
1535 lp->stats.rx_dropped++; 1686 dev->stats.rx_dropped++;
1536 break; 1687 break;
1537 } 1688 }
1538 skb_reserve(skb, 2); /* 16 bit alignment */ 1689 skb_reserve(skb, 2); /* 16 bit alignment */
@@ -1602,10 +1753,10 @@ tc35815_rx(struct net_device *dev)
1602 netif_rx(skb); 1753 netif_rx(skb);
1603#endif 1754#endif
1604 dev->last_rx = jiffies; 1755 dev->last_rx = jiffies;
1605 lp->stats.rx_packets++; 1756 dev->stats.rx_packets++;
1606 lp->stats.rx_bytes += pkt_len; 1757 dev->stats.rx_bytes += pkt_len;
1607 } else { 1758 } else {
1608 lp->stats.rx_errors++; 1759 dev->stats.rx_errors++;
1609 printk(KERN_DEBUG "%s: Rx error (status %x)\n", 1760 printk(KERN_DEBUG "%s: Rx error (status %x)\n",
1610 dev->name, status & Rx_Stat_Mask); 1761 dev->name, status & Rx_Stat_Mask);
1611 /* WORKAROUND: LongErr and CRCErr means Overflow. */ 1762 /* WORKAROUND: LongErr and CRCErr means Overflow. */
@@ -1613,10 +1764,14 @@ tc35815_rx(struct net_device *dev)
1613 status &= ~(Rx_LongErr|Rx_CRCErr); 1764 status &= ~(Rx_LongErr|Rx_CRCErr);
1614 status |= Rx_Over; 1765 status |= Rx_Over;
1615 } 1766 }
1616 if (status & Rx_LongErr) lp->stats.rx_length_errors++; 1767 if (status & Rx_LongErr)
1617 if (status & Rx_Over) lp->stats.rx_fifo_errors++; 1768 dev->stats.rx_length_errors++;
1618 if (status & Rx_CRCErr) lp->stats.rx_crc_errors++; 1769 if (status & Rx_Over)
1619 if (status & Rx_Align) lp->stats.rx_frame_errors++; 1770 dev->stats.rx_fifo_errors++;
1771 if (status & Rx_CRCErr)
1772 dev->stats.rx_crc_errors++;
1773 if (status & Rx_Align)
1774 dev->stats.rx_frame_errors++;
1620 } 1775 }
1621 1776
1622 if (bd_count > 0) { 1777 if (bd_count > 0) {
@@ -1772,40 +1927,39 @@ static int tc35815_poll(struct napi_struct *napi, int budget)
1772static void 1927static void
1773tc35815_check_tx_stat(struct net_device *dev, int status) 1928tc35815_check_tx_stat(struct net_device *dev, int status)
1774{ 1929{
1775 struct tc35815_local *lp = dev->priv; 1930 struct tc35815_local *lp = netdev_priv(dev);
1776 const char *msg = NULL; 1931 const char *msg = NULL;
1777 1932
1778 /* count collisions */ 1933 /* count collisions */
1779 if (status & Tx_ExColl) 1934 if (status & Tx_ExColl)
1780 lp->stats.collisions += 16; 1935 dev->stats.collisions += 16;
1781 if (status & Tx_TxColl_MASK) 1936 if (status & Tx_TxColl_MASK)
1782 lp->stats.collisions += status & Tx_TxColl_MASK; 1937 dev->stats.collisions += status & Tx_TxColl_MASK;
1783 1938
1784#ifndef NO_CHECK_CARRIER 1939#ifndef NO_CHECK_CARRIER
1785 /* TX4939 does not have NCarr */ 1940 /* TX4939 does not have NCarr */
1786 if (lp->boardtype == TC35815_TX4939) 1941 if (lp->chiptype == TC35815_TX4939)
1787 status &= ~Tx_NCarr; 1942 status &= ~Tx_NCarr;
1788#ifdef WORKAROUND_LOSTCAR 1943#ifdef WORKAROUND_LOSTCAR
1789 /* WORKAROUND: ignore LostCrS in full duplex operation */ 1944 /* WORKAROUND: ignore LostCrS in full duplex operation */
1790 if ((lp->timer_state != asleep && lp->timer_state != lcheck) 1945 if (!lp->link || lp->duplex == DUPLEX_FULL)
1791 || lp->fullduplex)
1792 status &= ~Tx_NCarr; 1946 status &= ~Tx_NCarr;
1793#endif 1947#endif
1794#endif 1948#endif
1795 1949
1796 if (!(status & TX_STA_ERR)) { 1950 if (!(status & TX_STA_ERR)) {
1797 /* no error. */ 1951 /* no error. */
1798 lp->stats.tx_packets++; 1952 dev->stats.tx_packets++;
1799 return; 1953 return;
1800 } 1954 }
1801 1955
1802 lp->stats.tx_errors++; 1956 dev->stats.tx_errors++;
1803 if (status & Tx_ExColl) { 1957 if (status & Tx_ExColl) {
1804 lp->stats.tx_aborted_errors++; 1958 dev->stats.tx_aborted_errors++;
1805 msg = "Excessive Collision."; 1959 msg = "Excessive Collision.";
1806 } 1960 }
1807 if (status & Tx_Under) { 1961 if (status & Tx_Under) {
1808 lp->stats.tx_fifo_errors++; 1962 dev->stats.tx_fifo_errors++;
1809 msg = "Tx FIFO Underrun."; 1963 msg = "Tx FIFO Underrun.";
1810 if (lp->lstats.tx_underrun < TX_THRESHOLD_KEEP_LIMIT) { 1964 if (lp->lstats.tx_underrun < TX_THRESHOLD_KEEP_LIMIT) {
1811 lp->lstats.tx_underrun++; 1965 lp->lstats.tx_underrun++;
@@ -1818,25 +1972,25 @@ tc35815_check_tx_stat(struct net_device *dev, int status)
1818 } 1972 }
1819 } 1973 }
1820 if (status & Tx_Defer) { 1974 if (status & Tx_Defer) {
1821 lp->stats.tx_fifo_errors++; 1975 dev->stats.tx_fifo_errors++;
1822 msg = "Excessive Deferral."; 1976 msg = "Excessive Deferral.";
1823 } 1977 }
1824#ifndef NO_CHECK_CARRIER 1978#ifndef NO_CHECK_CARRIER
1825 if (status & Tx_NCarr) { 1979 if (status & Tx_NCarr) {
1826 lp->stats.tx_carrier_errors++; 1980 dev->stats.tx_carrier_errors++;
1827 msg = "Lost Carrier Sense."; 1981 msg = "Lost Carrier Sense.";
1828 } 1982 }
1829#endif 1983#endif
1830 if (status & Tx_LateColl) { 1984 if (status & Tx_LateColl) {
1831 lp->stats.tx_aborted_errors++; 1985 dev->stats.tx_aborted_errors++;
1832 msg = "Late Collision."; 1986 msg = "Late Collision.";
1833 } 1987 }
1834 if (status & Tx_TxPar) { 1988 if (status & Tx_TxPar) {
1835 lp->stats.tx_fifo_errors++; 1989 dev->stats.tx_fifo_errors++;
1836 msg = "Transmit Parity Error."; 1990 msg = "Transmit Parity Error.";
1837 } 1991 }
1838 if (status & Tx_SQErr) { 1992 if (status & Tx_SQErr) {
1839 lp->stats.tx_heartbeat_errors++; 1993 dev->stats.tx_heartbeat_errors++;
1840 msg = "Signal Quality Error."; 1994 msg = "Signal Quality Error.";
1841 } 1995 }
1842 if (msg && netif_msg_tx_err(lp)) 1996 if (msg && netif_msg_tx_err(lp))
@@ -1849,7 +2003,7 @@ tc35815_check_tx_stat(struct net_device *dev, int status)
1849static void 2003static void
1850tc35815_txdone(struct net_device *dev) 2004tc35815_txdone(struct net_device *dev)
1851{ 2005{
1852 struct tc35815_local *lp = dev->priv; 2006 struct tc35815_local *lp = netdev_priv(dev);
1853 struct TxFD *txfd; 2007 struct TxFD *txfd;
1854 unsigned int fdctl; 2008 unsigned int fdctl;
1855 2009
@@ -1878,7 +2032,7 @@ tc35815_txdone(struct net_device *dev)
1878 BUG_ON(lp->tx_skbs[lp->tfd_end].skb != skb); 2032 BUG_ON(lp->tx_skbs[lp->tfd_end].skb != skb);
1879#endif 2033#endif
1880 if (skb) { 2034 if (skb) {
1881 lp->stats.tx_bytes += skb->len; 2035 dev->stats.tx_bytes += skb->len;
1882 pci_unmap_single(lp->pci_dev, lp->tx_skbs[lp->tfd_end].skb_dma, skb->len, PCI_DMA_TODEVICE); 2036 pci_unmap_single(lp->pci_dev, lp->tx_skbs[lp->tfd_end].skb_dma, skb->len, PCI_DMA_TODEVICE);
1883 lp->tx_skbs[lp->tfd_end].skb = NULL; 2037 lp->tx_skbs[lp->tfd_end].skb = NULL;
1884 lp->tx_skbs[lp->tfd_end].skb_dma = 0; 2038 lp->tx_skbs[lp->tfd_end].skb_dma = 0;
@@ -1904,7 +2058,7 @@ tc35815_txdone(struct net_device *dev)
1904 struct tc35815_regs __iomem *tr = 2058 struct tc35815_regs __iomem *tr =
1905 (struct tc35815_regs __iomem *)dev->base_addr; 2059 (struct tc35815_regs __iomem *)dev->base_addr;
1906 int head = (lp->tfd_start + TX_FD_NUM - 1) % TX_FD_NUM; 2060 int head = (lp->tfd_start + TX_FD_NUM - 1) % TX_FD_NUM;
1907 struct TxFD* txhead = &lp->tfd_base[head]; 2061 struct TxFD *txhead = &lp->tfd_base[head];
1908 int qlen = (lp->tfd_start + TX_FD_NUM 2062 int qlen = (lp->tfd_start + TX_FD_NUM
1909 - lp->tfd_end) % TX_FD_NUM; 2063 - lp->tfd_end) % TX_FD_NUM;
1910 2064
@@ -1939,7 +2093,7 @@ tc35815_txdone(struct net_device *dev)
1939 * condition, and space has now been made available, 2093 * condition, and space has now been made available,
1940 * wake up the queue. 2094 * wake up the queue.
1941 */ 2095 */
1942 if (netif_queue_stopped(dev) && ! tc35815_tx_full(dev)) 2096 if (netif_queue_stopped(dev) && !tc35815_tx_full(dev))
1943 netif_wake_queue(dev); 2097 netif_wake_queue(dev);
1944} 2098}
1945 2099
@@ -1947,16 +2101,17 @@ tc35815_txdone(struct net_device *dev)
1947static int 2101static int
1948tc35815_close(struct net_device *dev) 2102tc35815_close(struct net_device *dev)
1949{ 2103{
1950 struct tc35815_local *lp = dev->priv; 2104 struct tc35815_local *lp = netdev_priv(dev);
1951 2105
1952 netif_stop_queue(dev); 2106 netif_stop_queue(dev);
1953#ifdef TC35815_NAPI 2107#ifdef TC35815_NAPI
1954 napi_disable(&lp->napi); 2108 napi_disable(&lp->napi);
1955#endif 2109#endif
2110 if (lp->phy_dev)
2111 phy_stop(lp->phy_dev);
2112 cancel_work_sync(&lp->restart_work);
1956 2113
1957 /* Flush the Tx and disable Rx here. */ 2114 /* Flush the Tx and disable Rx here. */
1958
1959 del_timer(&lp->timer); /* Kill if running */
1960 tc35815_chip_reset(dev); 2115 tc35815_chip_reset(dev);
1961 free_irq(dev->irq, dev); 2116 free_irq(dev->irq, dev);
1962 2117
@@ -1972,34 +2127,30 @@ tc35815_close(struct net_device *dev)
1972 */ 2127 */
1973static struct net_device_stats *tc35815_get_stats(struct net_device *dev) 2128static struct net_device_stats *tc35815_get_stats(struct net_device *dev)
1974{ 2129{
1975 struct tc35815_local *lp = dev->priv;
1976 struct tc35815_regs __iomem *tr = 2130 struct tc35815_regs __iomem *tr =
1977 (struct tc35815_regs __iomem *)dev->base_addr; 2131 (struct tc35815_regs __iomem *)dev->base_addr;
1978 if (netif_running(dev)) { 2132 if (netif_running(dev))
1979 /* Update the statistics from the device registers. */ 2133 /* Update the statistics from the device registers. */
1980 lp->stats.rx_missed_errors = tc_readl(&tr->Miss_Cnt); 2134 dev->stats.rx_missed_errors = tc_readl(&tr->Miss_Cnt);
1981 }
1982 2135
1983 return &lp->stats; 2136 return &dev->stats;
1984} 2137}
1985 2138
1986static void tc35815_set_cam_entry(struct net_device *dev, int index, unsigned char *addr) 2139static void tc35815_set_cam_entry(struct net_device *dev, int index, unsigned char *addr)
1987{ 2140{
1988 struct tc35815_local *lp = dev->priv; 2141 struct tc35815_local *lp = netdev_priv(dev);
1989 struct tc35815_regs __iomem *tr = 2142 struct tc35815_regs __iomem *tr =
1990 (struct tc35815_regs __iomem *)dev->base_addr; 2143 (struct tc35815_regs __iomem *)dev->base_addr;
1991 int cam_index = index * 6; 2144 int cam_index = index * 6;
1992 u32 cam_data; 2145 u32 cam_data;
1993 u32 saved_addr; 2146 u32 saved_addr;
2147 DECLARE_MAC_BUF(mac);
2148
1994 saved_addr = tc_readl(&tr->CAM_Adr); 2149 saved_addr = tc_readl(&tr->CAM_Adr);
1995 2150
1996 if (netif_msg_hw(lp)) { 2151 if (netif_msg_hw(lp))
1997 int i; 2152 printk(KERN_DEBUG "%s: CAM %d: %s\n",
1998 printk(KERN_DEBUG "%s: CAM %d:", dev->name, index); 2153 dev->name, index, print_mac(mac, addr));
1999 for (i = 0; i < 6; i++)
2000 printk(" %02x", addr[i]);
2001 printk("\n");
2002 }
2003 if (index & 1) { 2154 if (index & 1) {
2004 /* read modify write */ 2155 /* read modify write */
2005 tc_writel(cam_index - 2, &tr->CAM_Adr); 2156 tc_writel(cam_index - 2, &tr->CAM_Adr);
@@ -2039,28 +2190,24 @@ tc35815_set_multicast_list(struct net_device *dev)
2039 struct tc35815_regs __iomem *tr = 2190 struct tc35815_regs __iomem *tr =
2040 (struct tc35815_regs __iomem *)dev->base_addr; 2191 (struct tc35815_regs __iomem *)dev->base_addr;
2041 2192
2042 if (dev->flags&IFF_PROMISC) 2193 if (dev->flags & IFF_PROMISC) {
2043 {
2044#ifdef WORKAROUND_100HALF_PROMISC 2194#ifdef WORKAROUND_100HALF_PROMISC
2045 /* With some (all?) 100MHalf HUB, controller will hang 2195 /* With some (all?) 100MHalf HUB, controller will hang
2046 * if we enabled promiscuous mode before linkup... */ 2196 * if we enabled promiscuous mode before linkup... */
2047 struct tc35815_local *lp = dev->priv; 2197 struct tc35815_local *lp = netdev_priv(dev);
2048 int pid = lp->phy_addr; 2198
2049 if (!(tc_mdio_read(dev, pid, MII_BMSR) & BMSR_LSTATUS)) 2199 if (!lp->link)
2050 return; 2200 return;
2051#endif 2201#endif
2052 /* Enable promiscuous mode */ 2202 /* Enable promiscuous mode */
2053 tc_writel(CAM_CompEn | CAM_BroadAcc | CAM_GroupAcc | CAM_StationAcc, &tr->CAM_Ctl); 2203 tc_writel(CAM_CompEn | CAM_BroadAcc | CAM_GroupAcc | CAM_StationAcc, &tr->CAM_Ctl);
2054 } 2204 } else if ((dev->flags & IFF_ALLMULTI) ||
2055 else if((dev->flags&IFF_ALLMULTI) || dev->mc_count > CAM_ENTRY_MAX - 3) 2205 dev->mc_count > CAM_ENTRY_MAX - 3) {
2056 {
2057 /* CAM 0, 1, 20 are reserved. */ 2206 /* CAM 0, 1, 20 are reserved. */
2058 /* Disable promiscuous mode, use normal mode. */ 2207 /* Disable promiscuous mode, use normal mode. */
2059 tc_writel(CAM_CompEn | CAM_BroadAcc | CAM_GroupAcc, &tr->CAM_Ctl); 2208 tc_writel(CAM_CompEn | CAM_BroadAcc | CAM_GroupAcc, &tr->CAM_Ctl);
2060 } 2209 } else if (dev->mc_count) {
2061 else if(dev->mc_count) 2210 struct dev_mc_list *cur_addr = dev->mc_list;
2062 {
2063 struct dev_mc_list* cur_addr = dev->mc_list;
2064 int i; 2211 int i;
2065 int ena_bits = CAM_Ena_Bit(CAM_ENTRY_SOURCE); 2212 int ena_bits = CAM_Ena_Bit(CAM_ENTRY_SOURCE);
2066 2213
@@ -2075,8 +2222,7 @@ tc35815_set_multicast_list(struct net_device *dev)
2075 } 2222 }
2076 tc_writel(ena_bits, &tr->CAM_Ena); 2223 tc_writel(ena_bits, &tr->CAM_Ena);
2077 tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl); 2224 tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl);
2078 } 2225 } else {
2079 else {
2080 tc_writel(CAM_Ena_Bit(CAM_ENTRY_SOURCE), &tr->CAM_Ena); 2226 tc_writel(CAM_Ena_Bit(CAM_ENTRY_SOURCE), &tr->CAM_Ena);
2081 tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl); 2227 tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl);
2082 } 2228 }
@@ -2084,7 +2230,7 @@ tc35815_set_multicast_list(struct net_device *dev)
2084 2230
2085static void tc35815_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) 2231static void tc35815_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
2086{ 2232{
2087 struct tc35815_local *lp = dev->priv; 2233 struct tc35815_local *lp = netdev_priv(dev);
2088 strcpy(info->driver, MODNAME); 2234 strcpy(info->driver, MODNAME);
2089 strcpy(info->version, DRV_VERSION); 2235 strcpy(info->version, DRV_VERSION);
2090 strcpy(info->bus_info, pci_name(lp->pci_dev)); 2236 strcpy(info->bus_info, pci_name(lp->pci_dev));
@@ -2092,78 +2238,37 @@ static void tc35815_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *
2092 2238
2093static int tc35815_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) 2239static int tc35815_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
2094{ 2240{
2095 struct tc35815_local *lp = dev->priv; 2241 struct tc35815_local *lp = netdev_priv(dev);
2096 spin_lock_irq(&lp->lock);
2097 mii_ethtool_gset(&lp->mii, cmd);
2098 spin_unlock_irq(&lp->lock);
2099 return 0;
2100}
2101
2102static int tc35815_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
2103{
2104 struct tc35815_local *lp = dev->priv;
2105 int rc;
2106#if 1 /* use our negotiation method... */
2107 /* Verify the settings we care about. */
2108 if (cmd->autoneg != AUTONEG_ENABLE &&
2109 cmd->autoneg != AUTONEG_DISABLE)
2110 return -EINVAL;
2111 if (cmd->autoneg == AUTONEG_DISABLE &&
2112 ((cmd->speed != SPEED_100 &&
2113 cmd->speed != SPEED_10) ||
2114 (cmd->duplex != DUPLEX_HALF &&
2115 cmd->duplex != DUPLEX_FULL)))
2116 return -EINVAL;
2117 2242
2118 /* Ok, do it to it. */ 2243 if (!lp->phy_dev)
2119 spin_lock_irq(&lp->lock); 2244 return -ENODEV;
2120 del_timer(&lp->timer); 2245 return phy_ethtool_gset(lp->phy_dev, cmd);
2121 tc35815_start_auto_negotiation(dev, cmd);
2122 spin_unlock_irq(&lp->lock);
2123 rc = 0;
2124#else
2125 spin_lock_irq(&lp->lock);
2126 rc = mii_ethtool_sset(&lp->mii, cmd);
2127 spin_unlock_irq(&lp->lock);
2128#endif
2129 return rc;
2130} 2246}
2131 2247
2132static int tc35815_nway_reset(struct net_device *dev) 2248static int tc35815_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
2133{ 2249{
2134 struct tc35815_local *lp = dev->priv; 2250 struct tc35815_local *lp = netdev_priv(dev);
2135 int rc;
2136 spin_lock_irq(&lp->lock);
2137 rc = mii_nway_restart(&lp->mii);
2138 spin_unlock_irq(&lp->lock);
2139 return rc;
2140}
2141 2251
2142static u32 tc35815_get_link(struct net_device *dev) 2252 if (!lp->phy_dev)
2143{ 2253 return -ENODEV;
2144 struct tc35815_local *lp = dev->priv; 2254 return phy_ethtool_sset(lp->phy_dev, cmd);
2145 int rc;
2146 spin_lock_irq(&lp->lock);
2147 rc = mii_link_ok(&lp->mii);
2148 spin_unlock_irq(&lp->lock);
2149 return rc;
2150} 2255}
2151 2256
2152static u32 tc35815_get_msglevel(struct net_device *dev) 2257static u32 tc35815_get_msglevel(struct net_device *dev)
2153{ 2258{
2154 struct tc35815_local *lp = dev->priv; 2259 struct tc35815_local *lp = netdev_priv(dev);
2155 return lp->msg_enable; 2260 return lp->msg_enable;
2156} 2261}
2157 2262
2158static void tc35815_set_msglevel(struct net_device *dev, u32 datum) 2263static void tc35815_set_msglevel(struct net_device *dev, u32 datum)
2159{ 2264{
2160 struct tc35815_local *lp = dev->priv; 2265 struct tc35815_local *lp = netdev_priv(dev);
2161 lp->msg_enable = datum; 2266 lp->msg_enable = datum;
2162} 2267}
2163 2268
2164static int tc35815_get_sset_count(struct net_device *dev, int sset) 2269static int tc35815_get_sset_count(struct net_device *dev, int sset)
2165{ 2270{
2166 struct tc35815_local *lp = dev->priv; 2271 struct tc35815_local *lp = netdev_priv(dev);
2167 2272
2168 switch (sset) { 2273 switch (sset) {
2169 case ETH_SS_STATS: 2274 case ETH_SS_STATS:
@@ -2175,7 +2280,7 @@ static int tc35815_get_sset_count(struct net_device *dev, int sset)
2175 2280
2176static void tc35815_get_ethtool_stats(struct net_device *dev, struct ethtool_stats *stats, u64 *data) 2281static void tc35815_get_ethtool_stats(struct net_device *dev, struct ethtool_stats *stats, u64 *data)
2177{ 2282{
2178 struct tc35815_local *lp = dev->priv; 2283 struct tc35815_local *lp = netdev_priv(dev);
2179 data[0] = lp->lstats.max_tx_qlen; 2284 data[0] = lp->lstats.max_tx_qlen;
2180 data[1] = lp->lstats.tx_ints; 2285 data[1] = lp->lstats.tx_ints;
2181 data[2] = lp->lstats.rx_ints; 2286 data[2] = lp->lstats.rx_ints;
@@ -2200,8 +2305,7 @@ static const struct ethtool_ops tc35815_ethtool_ops = {
2200 .get_drvinfo = tc35815_get_drvinfo, 2305 .get_drvinfo = tc35815_get_drvinfo,
2201 .get_settings = tc35815_get_settings, 2306 .get_settings = tc35815_get_settings,
2202 .set_settings = tc35815_set_settings, 2307 .set_settings = tc35815_set_settings,
2203 .nway_reset = tc35815_nway_reset, 2308 .get_link = ethtool_op_get_link,
2204 .get_link = tc35815_get_link,
2205 .get_msglevel = tc35815_get_msglevel, 2309 .get_msglevel = tc35815_get_msglevel,
2206 .set_msglevel = tc35815_set_msglevel, 2310 .set_msglevel = tc35815_set_msglevel,
2207 .get_strings = tc35815_get_strings, 2311 .get_strings = tc35815_get_strings,
@@ -2211,611 +2315,13 @@ static const struct ethtool_ops tc35815_ethtool_ops = {
2211 2315
2212static int tc35815_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) 2316static int tc35815_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2213{ 2317{
2214 struct tc35815_local *lp = dev->priv; 2318 struct tc35815_local *lp = netdev_priv(dev);
2215 int rc;
2216 2319
2217 if (!netif_running(dev)) 2320 if (!netif_running(dev))
2218 return -EINVAL; 2321 return -EINVAL;
2219 2322 if (!lp->phy_dev)
2220 spin_lock_irq(&lp->lock); 2323 return -ENODEV;
2221 rc = generic_mii_ioctl(&lp->mii, if_mii(rq), cmd, NULL); 2324 return phy_mii_ioctl(lp->phy_dev, if_mii(rq), cmd);
2222 spin_unlock_irq(&lp->lock);
2223
2224 return rc;
2225}
2226
2227static int tc_mdio_read(struct net_device *dev, int phy_id, int location)
2228{
2229 struct tc35815_regs __iomem *tr =
2230 (struct tc35815_regs __iomem *)dev->base_addr;
2231 u32 data;
2232 tc_writel(MD_CA_Busy | (phy_id << 5) | location, &tr->MD_CA);
2233 while (tc_readl(&tr->MD_CA) & MD_CA_Busy)
2234 ;
2235 data = tc_readl(&tr->MD_Data);
2236 return data & 0xffff;
2237}
2238
2239static void tc_mdio_write(struct net_device *dev, int phy_id, int location,
2240 int val)
2241{
2242 struct tc35815_regs __iomem *tr =
2243 (struct tc35815_regs __iomem *)dev->base_addr;
2244 tc_writel(val, &tr->MD_Data);
2245 tc_writel(MD_CA_Busy | MD_CA_Wr | (phy_id << 5) | location, &tr->MD_CA);
2246 while (tc_readl(&tr->MD_CA) & MD_CA_Busy)
2247 ;
2248}
2249
2250/* Auto negotiation. The scheme is very simple. We have a timer routine
2251 * that keeps watching the auto negotiation process as it progresses.
2252 * The DP83840 is first told to start doing it's thing, we set up the time
2253 * and place the timer state machine in it's initial state.
2254 *
2255 * Here the timer peeks at the DP83840 status registers at each click to see
2256 * if the auto negotiation has completed, we assume here that the DP83840 PHY
2257 * will time out at some point and just tell us what (didn't) happen. For
2258 * complete coverage we only allow so many of the ticks at this level to run,
2259 * when this has expired we print a warning message and try another strategy.
2260 * This "other" strategy is to force the interface into various speed/duplex
2261 * configurations and we stop when we see a link-up condition before the
2262 * maximum number of "peek" ticks have occurred.
2263 *
2264 * Once a valid link status has been detected we configure the BigMAC and
2265 * the rest of the Happy Meal to speak the most efficient protocol we could
2266 * get a clean link for. The priority for link configurations, highest first
2267 * is:
2268 * 100 Base-T Full Duplex
2269 * 100 Base-T Half Duplex
2270 * 10 Base-T Full Duplex
2271 * 10 Base-T Half Duplex
2272 *
2273 * We start a new timer now, after a successful auto negotiation status has
2274 * been detected. This timer just waits for the link-up bit to get set in
2275 * the BMCR of the DP83840. When this occurs we print a kernel log message
2276 * describing the link type in use and the fact that it is up.
2277 *
2278 * If a fatal error of some sort is signalled and detected in the interrupt
2279 * service routine, and the chip is reset, or the link is ifconfig'd down
2280 * and then back up, this entire process repeats itself all over again.
2281 */
2282/* Note: Above comments are come from sunhme driver. */
2283
2284static int tc35815_try_next_permutation(struct net_device *dev)
2285{
2286 struct tc35815_local *lp = dev->priv;
2287 int pid = lp->phy_addr;
2288 unsigned short bmcr;
2289
2290 bmcr = tc_mdio_read(dev, pid, MII_BMCR);
2291
2292 /* Downgrade from full to half duplex. Only possible via ethtool. */
2293 if (bmcr & BMCR_FULLDPLX) {
2294 bmcr &= ~BMCR_FULLDPLX;
2295 printk(KERN_DEBUG "%s: try next permutation (BMCR %x)\n", dev->name, bmcr);
2296 tc_mdio_write(dev, pid, MII_BMCR, bmcr);
2297 return 0;
2298 }
2299
2300 /* Downgrade from 100 to 10. */
2301 if (bmcr & BMCR_SPEED100) {
2302 bmcr &= ~BMCR_SPEED100;
2303 printk(KERN_DEBUG "%s: try next permutation (BMCR %x)\n", dev->name, bmcr);
2304 tc_mdio_write(dev, pid, MII_BMCR, bmcr);
2305 return 0;
2306 }
2307
2308 /* We've tried everything. */
2309 return -1;
2310}
2311
2312static void
2313tc35815_display_link_mode(struct net_device *dev)
2314{
2315 struct tc35815_local *lp = dev->priv;
2316 int pid = lp->phy_addr;
2317 unsigned short lpa, bmcr;
2318 char *speed = "", *duplex = "";
2319
2320 lpa = tc_mdio_read(dev, pid, MII_LPA);
2321 bmcr = tc_mdio_read(dev, pid, MII_BMCR);
2322 if (options.speed ? (bmcr & BMCR_SPEED100) : (lpa & (LPA_100HALF | LPA_100FULL)))
2323 speed = "100Mb/s";
2324 else
2325 speed = "10Mb/s";
2326 if (options.duplex ? (bmcr & BMCR_FULLDPLX) : (lpa & (LPA_100FULL | LPA_10FULL)))
2327 duplex = "Full Duplex";
2328 else
2329 duplex = "Half Duplex";
2330
2331 if (netif_msg_link(lp))
2332 printk(KERN_INFO "%s: Link is up at %s, %s.\n",
2333 dev->name, speed, duplex);
2334 printk(KERN_DEBUG "%s: MII BMCR %04x BMSR %04x LPA %04x\n",
2335 dev->name,
2336 bmcr, tc_mdio_read(dev, pid, MII_BMSR), lpa);
2337}
2338
2339static void tc35815_display_forced_link_mode(struct net_device *dev)
2340{
2341 struct tc35815_local *lp = dev->priv;
2342 int pid = lp->phy_addr;
2343 unsigned short bmcr;
2344 char *speed = "", *duplex = "";
2345
2346 bmcr = tc_mdio_read(dev, pid, MII_BMCR);
2347 if (bmcr & BMCR_SPEED100)
2348 speed = "100Mb/s";
2349 else
2350 speed = "10Mb/s";
2351 if (bmcr & BMCR_FULLDPLX)
2352 duplex = "Full Duplex.\n";
2353 else
2354 duplex = "Half Duplex.\n";
2355
2356 if (netif_msg_link(lp))
2357 printk(KERN_INFO "%s: Link has been forced up at %s, %s",
2358 dev->name, speed, duplex);
2359}
2360
2361static void tc35815_set_link_modes(struct net_device *dev)
2362{
2363 struct tc35815_local *lp = dev->priv;
2364 struct tc35815_regs __iomem *tr =
2365 (struct tc35815_regs __iomem *)dev->base_addr;
2366 int pid = lp->phy_addr;
2367 unsigned short bmcr, lpa;
2368 int speed;
2369
2370 if (lp->timer_state == arbwait) {
2371 lpa = tc_mdio_read(dev, pid, MII_LPA);
2372 bmcr = tc_mdio_read(dev, pid, MII_BMCR);
2373 printk(KERN_DEBUG "%s: MII BMCR %04x BMSR %04x LPA %04x\n",
2374 dev->name,
2375 bmcr, tc_mdio_read(dev, pid, MII_BMSR), lpa);
2376 if (!(lpa & (LPA_10HALF | LPA_10FULL |
2377 LPA_100HALF | LPA_100FULL))) {
2378 /* fall back to 10HALF */
2379 printk(KERN_INFO "%s: bad ability %04x - falling back to 10HD.\n",
2380 dev->name, lpa);
2381 lpa = LPA_10HALF;
2382 }
2383 if (options.duplex ? (bmcr & BMCR_FULLDPLX) : (lpa & (LPA_100FULL | LPA_10FULL)))
2384 lp->fullduplex = 1;
2385 else
2386 lp->fullduplex = 0;
2387 if (options.speed ? (bmcr & BMCR_SPEED100) : (lpa & (LPA_100HALF | LPA_100FULL)))
2388 speed = 100;
2389 else
2390 speed = 10;
2391 } else {
2392 /* Forcing a link mode. */
2393 bmcr = tc_mdio_read(dev, pid, MII_BMCR);
2394 if (bmcr & BMCR_FULLDPLX)
2395 lp->fullduplex = 1;
2396 else
2397 lp->fullduplex = 0;
2398 if (bmcr & BMCR_SPEED100)
2399 speed = 100;
2400 else
2401 speed = 10;
2402 }
2403
2404 tc_writel(tc_readl(&tr->MAC_Ctl) | MAC_HaltReq, &tr->MAC_Ctl);
2405 if (lp->fullduplex) {
2406 tc_writel(tc_readl(&tr->MAC_Ctl) | MAC_FullDup, &tr->MAC_Ctl);
2407 } else {
2408 tc_writel(tc_readl(&tr->MAC_Ctl) & ~MAC_FullDup, &tr->MAC_Ctl);
2409 }
2410 tc_writel(tc_readl(&tr->MAC_Ctl) & ~MAC_HaltReq, &tr->MAC_Ctl);
2411
2412 /* TX4939 PCFG.SPEEDn bit will be changed on NETDEV_CHANGE event. */
2413
2414#ifndef NO_CHECK_CARRIER
2415 /* TX4939 does not have EnLCarr */
2416 if (lp->boardtype != TC35815_TX4939) {
2417#ifdef WORKAROUND_LOSTCAR
2418 /* WORKAROUND: enable LostCrS only if half duplex operation */
2419 if (!lp->fullduplex && lp->boardtype != TC35815_TX4939)
2420 tc_writel(tc_readl(&tr->Tx_Ctl) | Tx_EnLCarr, &tr->Tx_Ctl);
2421#endif
2422 }
2423#endif
2424 lp->mii.full_duplex = lp->fullduplex;
2425}
2426
2427static void tc35815_timer(unsigned long data)
2428{
2429 struct net_device *dev = (struct net_device *)data;
2430 struct tc35815_local *lp = dev->priv;
2431 int pid = lp->phy_addr;
2432 unsigned short bmsr, bmcr, lpa;
2433 int restart_timer = 0;
2434
2435 spin_lock_irq(&lp->lock);
2436
2437 lp->timer_ticks++;
2438 switch (lp->timer_state) {
2439 case arbwait:
2440 /*
2441 * Only allow for 5 ticks, thats 10 seconds and much too
2442 * long to wait for arbitration to complete.
2443 */
2444 /* TC35815 need more times... */
2445 if (lp->timer_ticks >= 10) {
2446 /* Enter force mode. */
2447 if (!options.doforce) {
2448 printk(KERN_NOTICE "%s: Auto-Negotiation unsuccessful,"
2449 " cable probblem?\n", dev->name);
2450 /* Try to restart the adaptor. */
2451 tc35815_restart(dev);
2452 goto out;
2453 }
2454 printk(KERN_NOTICE "%s: Auto-Negotiation unsuccessful,"
2455 " trying force link mode\n", dev->name);
2456 printk(KERN_DEBUG "%s: BMCR %x BMSR %x\n", dev->name,
2457 tc_mdio_read(dev, pid, MII_BMCR),
2458 tc_mdio_read(dev, pid, MII_BMSR));
2459 bmcr = BMCR_SPEED100;
2460 tc_mdio_write(dev, pid, MII_BMCR, bmcr);
2461
2462 /*
2463 * OK, seems we need do disable the transceiver
2464 * for the first tick to make sure we get an
2465 * accurate link state at the second tick.
2466 */
2467
2468 lp->timer_state = ltrywait;
2469 lp->timer_ticks = 0;
2470 restart_timer = 1;
2471 } else {
2472 /* Anything interesting happen? */
2473 bmsr = tc_mdio_read(dev, pid, MII_BMSR);
2474 if (bmsr & BMSR_ANEGCOMPLETE) {
2475 /* Just what we've been waiting for... */
2476 tc35815_set_link_modes(dev);
2477
2478 /*
2479 * Success, at least so far, advance our state
2480 * engine.
2481 */
2482 lp->timer_state = lupwait;
2483 restart_timer = 1;
2484 } else {
2485 restart_timer = 1;
2486 }
2487 }
2488 break;
2489
2490 case lupwait:
2491 /*
2492 * Auto negotiation was successful and we are awaiting a
2493 * link up status. I have decided to let this timer run
2494 * forever until some sort of error is signalled, reporting
2495 * a message to the user at 10 second intervals.
2496 */
2497 bmsr = tc_mdio_read(dev, pid, MII_BMSR);
2498 if (bmsr & BMSR_LSTATUS) {
2499 /*
2500 * Wheee, it's up, display the link mode in use and put
2501 * the timer to sleep.
2502 */
2503 tc35815_display_link_mode(dev);
2504 netif_carrier_on(dev);
2505#ifdef WORKAROUND_100HALF_PROMISC
2506 /* delayed promiscuous enabling */
2507 if (dev->flags & IFF_PROMISC)
2508 tc35815_set_multicast_list(dev);
2509#endif
2510#if 1
2511 lp->saved_lpa = tc_mdio_read(dev, pid, MII_LPA);
2512 lp->timer_state = lcheck;
2513 restart_timer = 1;
2514#else
2515 lp->timer_state = asleep;
2516 restart_timer = 0;
2517#endif
2518 } else {
2519 if (lp->timer_ticks >= 10) {
2520 printk(KERN_NOTICE "%s: Auto negotiation successful, link still "
2521 "not completely up.\n", dev->name);
2522 lp->timer_ticks = 0;
2523 restart_timer = 1;
2524 } else {
2525 restart_timer = 1;
2526 }
2527 }
2528 break;
2529
2530 case ltrywait:
2531 /*
2532 * Making the timeout here too long can make it take
2533 * annoyingly long to attempt all of the link mode
2534 * permutations, but then again this is essentially
2535 * error recovery code for the most part.
2536 */
2537 bmsr = tc_mdio_read(dev, pid, MII_BMSR);
2538 bmcr = tc_mdio_read(dev, pid, MII_BMCR);
2539 if (lp->timer_ticks == 1) {
2540 /*
2541 * Re-enable transceiver, we'll re-enable the
2542 * transceiver next tick, then check link state
2543 * on the following tick.
2544 */
2545 restart_timer = 1;
2546 break;
2547 }
2548 if (lp->timer_ticks == 2) {
2549 restart_timer = 1;
2550 break;
2551 }
2552 if (bmsr & BMSR_LSTATUS) {
2553 /* Force mode selection success. */
2554 tc35815_display_forced_link_mode(dev);
2555 netif_carrier_on(dev);
2556 tc35815_set_link_modes(dev);
2557#ifdef WORKAROUND_100HALF_PROMISC
2558 /* delayed promiscuous enabling */
2559 if (dev->flags & IFF_PROMISC)
2560 tc35815_set_multicast_list(dev);
2561#endif
2562#if 1
2563 lp->saved_lpa = tc_mdio_read(dev, pid, MII_LPA);
2564 lp->timer_state = lcheck;
2565 restart_timer = 1;
2566#else
2567 lp->timer_state = asleep;
2568 restart_timer = 0;
2569#endif
2570 } else {
2571 if (lp->timer_ticks >= 4) { /* 6 seconds or so... */
2572 int ret;
2573
2574 ret = tc35815_try_next_permutation(dev);
2575 if (ret == -1) {
2576 /*
2577 * Aieee, tried them all, reset the
2578 * chip and try all over again.
2579 */
2580 printk(KERN_NOTICE "%s: Link down, "
2581 "cable problem?\n",
2582 dev->name);
2583
2584 /* Try to restart the adaptor. */
2585 tc35815_restart(dev);
2586 goto out;
2587 }
2588 lp->timer_ticks = 0;
2589 restart_timer = 1;
2590 } else {
2591 restart_timer = 1;
2592 }
2593 }
2594 break;
2595
2596 case lcheck:
2597 bmcr = tc_mdio_read(dev, pid, MII_BMCR);
2598 lpa = tc_mdio_read(dev, pid, MII_LPA);
2599 if (bmcr & (BMCR_PDOWN | BMCR_ISOLATE | BMCR_RESET)) {
2600 printk(KERN_ERR "%s: PHY down? (BMCR %x)\n", dev->name,
2601 bmcr);
2602 } else if ((lp->saved_lpa ^ lpa) &
2603 (LPA_100FULL|LPA_100HALF|LPA_10FULL|LPA_10HALF)) {
2604 printk(KERN_NOTICE "%s: link status changed"
2605 " (BMCR %x LPA %x->%x)\n", dev->name,
2606 bmcr, lp->saved_lpa, lpa);
2607 } else {
2608 /* go on */
2609 restart_timer = 1;
2610 break;
2611 }
2612 /* Try to restart the adaptor. */
2613 tc35815_restart(dev);
2614 goto out;
2615
2616 case asleep:
2617 default:
2618 /* Can't happens.... */
2619 printk(KERN_ERR "%s: Aieee, link timer is asleep but we got "
2620 "one anyways!\n", dev->name);
2621 restart_timer = 0;
2622 lp->timer_ticks = 0;
2623 lp->timer_state = asleep; /* foo on you */
2624 break;
2625 }
2626
2627 if (restart_timer) {
2628 lp->timer.expires = jiffies + msecs_to_jiffies(1200);
2629 add_timer(&lp->timer);
2630 }
2631out:
2632 spin_unlock_irq(&lp->lock);
2633}
2634
2635static void tc35815_start_auto_negotiation(struct net_device *dev,
2636 struct ethtool_cmd *ep)
2637{
2638 struct tc35815_local *lp = dev->priv;
2639 int pid = lp->phy_addr;
2640 unsigned short bmsr, bmcr, advertize;
2641 int timeout;
2642
2643 netif_carrier_off(dev);
2644 bmsr = tc_mdio_read(dev, pid, MII_BMSR);
2645 bmcr = tc_mdio_read(dev, pid, MII_BMCR);
2646 advertize = tc_mdio_read(dev, pid, MII_ADVERTISE);
2647
2648 if (ep == NULL || ep->autoneg == AUTONEG_ENABLE) {
2649 if (options.speed || options.duplex) {
2650 /* Advertise only specified configuration. */
2651 advertize &= ~(ADVERTISE_10HALF |
2652 ADVERTISE_10FULL |
2653 ADVERTISE_100HALF |
2654 ADVERTISE_100FULL);
2655 if (options.speed != 10) {
2656 if (options.duplex != 1)
2657 advertize |= ADVERTISE_100FULL;
2658 if (options.duplex != 2)
2659 advertize |= ADVERTISE_100HALF;
2660 }
2661 if (options.speed != 100) {
2662 if (options.duplex != 1)
2663 advertize |= ADVERTISE_10FULL;
2664 if (options.duplex != 2)
2665 advertize |= ADVERTISE_10HALF;
2666 }
2667 if (options.speed == 100)
2668 bmcr |= BMCR_SPEED100;
2669 else if (options.speed == 10)
2670 bmcr &= ~BMCR_SPEED100;
2671 if (options.duplex == 2)
2672 bmcr |= BMCR_FULLDPLX;
2673 else if (options.duplex == 1)
2674 bmcr &= ~BMCR_FULLDPLX;
2675 } else {
2676 /* Advertise everything we can support. */
2677 if (bmsr & BMSR_10HALF)
2678 advertize |= ADVERTISE_10HALF;
2679 else
2680 advertize &= ~ADVERTISE_10HALF;
2681 if (bmsr & BMSR_10FULL)
2682 advertize |= ADVERTISE_10FULL;
2683 else
2684 advertize &= ~ADVERTISE_10FULL;
2685 if (bmsr & BMSR_100HALF)
2686 advertize |= ADVERTISE_100HALF;
2687 else
2688 advertize &= ~ADVERTISE_100HALF;
2689 if (bmsr & BMSR_100FULL)
2690 advertize |= ADVERTISE_100FULL;
2691 else
2692 advertize &= ~ADVERTISE_100FULL;
2693 }
2694
2695 tc_mdio_write(dev, pid, MII_ADVERTISE, advertize);
2696
2697 /* Enable Auto-Negotiation, this is usually on already... */
2698 bmcr |= BMCR_ANENABLE;
2699 tc_mdio_write(dev, pid, MII_BMCR, bmcr);
2700
2701 /* Restart it to make sure it is going. */
2702 bmcr |= BMCR_ANRESTART;
2703 tc_mdio_write(dev, pid, MII_BMCR, bmcr);
2704 printk(KERN_DEBUG "%s: ADVERTISE %x BMCR %x\n", dev->name, advertize, bmcr);
2705
2706 /* BMCR_ANRESTART self clears when the process has begun. */
2707 timeout = 64; /* More than enough. */
2708 while (--timeout) {
2709 bmcr = tc_mdio_read(dev, pid, MII_BMCR);
2710 if (!(bmcr & BMCR_ANRESTART))
2711 break; /* got it. */
2712 udelay(10);
2713 }
2714 if (!timeout) {
2715 printk(KERN_ERR "%s: TC35815 would not start auto "
2716 "negotiation BMCR=0x%04x\n",
2717 dev->name, bmcr);
2718 printk(KERN_NOTICE "%s: Performing force link "
2719 "detection.\n", dev->name);
2720 goto force_link;
2721 } else {
2722 printk(KERN_DEBUG "%s: auto negotiation started.\n", dev->name);
2723 lp->timer_state = arbwait;
2724 }
2725 } else {
2726force_link:
2727 /* Force the link up, trying first a particular mode.
2728 * Either we are here at the request of ethtool or
2729 * because the Happy Meal would not start to autoneg.
2730 */
2731
2732 /* Disable auto-negotiation in BMCR, enable the duplex and
2733 * speed setting, init the timer state machine, and fire it off.
2734 */
2735 if (ep == NULL || ep->autoneg == AUTONEG_ENABLE) {
2736 bmcr = BMCR_SPEED100;
2737 } else {
2738 if (ep->speed == SPEED_100)
2739 bmcr = BMCR_SPEED100;
2740 else
2741 bmcr = 0;
2742 if (ep->duplex == DUPLEX_FULL)
2743 bmcr |= BMCR_FULLDPLX;
2744 }
2745 tc_mdio_write(dev, pid, MII_BMCR, bmcr);
2746
2747 /* OK, seems we need do disable the transceiver for the first
2748 * tick to make sure we get an accurate link state at the
2749 * second tick.
2750 */
2751 lp->timer_state = ltrywait;
2752 }
2753
2754 del_timer(&lp->timer);
2755 lp->timer_ticks = 0;
2756 lp->timer.expires = jiffies + msecs_to_jiffies(1200);
2757 add_timer(&lp->timer);
2758}
2759
2760static void tc35815_find_phy(struct net_device *dev)
2761{
2762 struct tc35815_local *lp = dev->priv;
2763 int pid = lp->phy_addr;
2764 unsigned short id0;
2765
2766 /* find MII phy */
2767 for (pid = 31; pid >= 0; pid--) {
2768 id0 = tc_mdio_read(dev, pid, MII_BMSR);
2769 if (id0 != 0xffff && id0 != 0x0000 &&
2770 (id0 & BMSR_RESV) != (0xffff & BMSR_RESV) /* paranoia? */
2771 ) {
2772 lp->phy_addr = pid;
2773 break;
2774 }
2775 }
2776 if (pid < 0) {
2777 printk(KERN_ERR "%s: No MII Phy found.\n",
2778 dev->name);
2779 lp->phy_addr = pid = 0;
2780 }
2781
2782 lp->mii_id[0] = tc_mdio_read(dev, pid, MII_PHYSID1);
2783 lp->mii_id[1] = tc_mdio_read(dev, pid, MII_PHYSID2);
2784 if (netif_msg_hw(lp))
2785 printk(KERN_INFO "%s: PHY(%02x) ID %04x %04x\n", dev->name,
2786 pid, lp->mii_id[0], lp->mii_id[1]);
2787}
2788
2789static void tc35815_phy_chip_init(struct net_device *dev)
2790{
2791 struct tc35815_local *lp = dev->priv;
2792 int pid = lp->phy_addr;
2793 unsigned short bmcr;
2794 struct ethtool_cmd ecmd, *ep;
2795
2796 /* dis-isolate if needed. */
2797 bmcr = tc_mdio_read(dev, pid, MII_BMCR);
2798 if (bmcr & BMCR_ISOLATE) {
2799 int count = 32;
2800 printk(KERN_DEBUG "%s: unisolating...", dev->name);
2801 tc_mdio_write(dev, pid, MII_BMCR, bmcr & ~BMCR_ISOLATE);
2802 while (--count) {
2803 if (!(tc_mdio_read(dev, pid, MII_BMCR) & BMCR_ISOLATE))
2804 break;
2805 udelay(20);
2806 }
2807 printk(" %s.\n", count ? "done" : "failed");
2808 }
2809
2810 if (options.speed && options.duplex) {
2811 ecmd.autoneg = AUTONEG_DISABLE;
2812 ecmd.speed = options.speed == 10 ? SPEED_10 : SPEED_100;
2813 ecmd.duplex = options.duplex == 1 ? DUPLEX_HALF : DUPLEX_FULL;
2814 ep = &ecmd;
2815 } else {
2816 ep = NULL;
2817 }
2818 tc35815_start_auto_negotiation(dev, ep);
2819} 2325}
2820 2326
2821static void tc35815_chip_reset(struct net_device *dev) 2327static void tc35815_chip_reset(struct net_device *dev)
@@ -2862,13 +2368,11 @@ static void tc35815_chip_reset(struct net_device *dev)
2862 2368
2863static void tc35815_chip_init(struct net_device *dev) 2369static void tc35815_chip_init(struct net_device *dev)
2864{ 2370{
2865 struct tc35815_local *lp = dev->priv; 2371 struct tc35815_local *lp = netdev_priv(dev);
2866 struct tc35815_regs __iomem *tr = 2372 struct tc35815_regs __iomem *tr =
2867 (struct tc35815_regs __iomem *)dev->base_addr; 2373 (struct tc35815_regs __iomem *)dev->base_addr;
2868 unsigned long txctl = TX_CTL_CMD; 2374 unsigned long txctl = TX_CTL_CMD;
2869 2375
2870 tc35815_phy_chip_init(dev);
2871
2872 /* load station address to CAM */ 2376 /* load station address to CAM */
2873 tc35815_set_cam_entry(dev, CAM_ENTRY_SOURCE, dev->dev_addr); 2377 tc35815_set_cam_entry(dev, CAM_ENTRY_SOURCE, dev->dev_addr);
2874 2378
@@ -2905,12 +2409,11 @@ static void tc35815_chip_init(struct net_device *dev)
2905 /* start MAC transmitter */ 2409 /* start MAC transmitter */
2906#ifndef NO_CHECK_CARRIER 2410#ifndef NO_CHECK_CARRIER
2907 /* TX4939 does not have EnLCarr */ 2411 /* TX4939 does not have EnLCarr */
2908 if (lp->boardtype == TC35815_TX4939) 2412 if (lp->chiptype == TC35815_TX4939)
2909 txctl &= ~Tx_EnLCarr; 2413 txctl &= ~Tx_EnLCarr;
2910#ifdef WORKAROUND_LOSTCAR 2414#ifdef WORKAROUND_LOSTCAR
2911 /* WORKAROUND: ignore LostCrS in full duplex operation */ 2415 /* WORKAROUND: ignore LostCrS in full duplex operation */
2912 if ((lp->timer_state != asleep && lp->timer_state != lcheck) || 2416 if (!lp->phy_dev || !lp->link || lp->duplex == DUPLEX_FULL)
2913 lp->fullduplex)
2914 txctl &= ~Tx_EnLCarr; 2417 txctl &= ~Tx_EnLCarr;
2915#endif 2418#endif
2916#endif /* !NO_CHECK_CARRIER */ 2419#endif /* !NO_CHECK_CARRIER */
@@ -2924,15 +2427,16 @@ static void tc35815_chip_init(struct net_device *dev)
2924static int tc35815_suspend(struct pci_dev *pdev, pm_message_t state) 2427static int tc35815_suspend(struct pci_dev *pdev, pm_message_t state)
2925{ 2428{
2926 struct net_device *dev = pci_get_drvdata(pdev); 2429 struct net_device *dev = pci_get_drvdata(pdev);
2927 struct tc35815_local *lp = dev->priv; 2430 struct tc35815_local *lp = netdev_priv(dev);
2928 unsigned long flags; 2431 unsigned long flags;
2929 2432
2930 pci_save_state(pdev); 2433 pci_save_state(pdev);
2931 if (!netif_running(dev)) 2434 if (!netif_running(dev))
2932 return 0; 2435 return 0;
2933 netif_device_detach(dev); 2436 netif_device_detach(dev);
2437 if (lp->phy_dev)
2438 phy_stop(lp->phy_dev);
2934 spin_lock_irqsave(&lp->lock, flags); 2439 spin_lock_irqsave(&lp->lock, flags);
2935 del_timer(&lp->timer); /* Kill if running */
2936 tc35815_chip_reset(dev); 2440 tc35815_chip_reset(dev);
2937 spin_unlock_irqrestore(&lp->lock, flags); 2441 spin_unlock_irqrestore(&lp->lock, flags);
2938 pci_set_power_state(pdev, PCI_D3hot); 2442 pci_set_power_state(pdev, PCI_D3hot);
@@ -2942,16 +2446,15 @@ static int tc35815_suspend(struct pci_dev *pdev, pm_message_t state)
2942static int tc35815_resume(struct pci_dev *pdev) 2446static int tc35815_resume(struct pci_dev *pdev)
2943{ 2447{
2944 struct net_device *dev = pci_get_drvdata(pdev); 2448 struct net_device *dev = pci_get_drvdata(pdev);
2945 struct tc35815_local *lp = dev->priv; 2449 struct tc35815_local *lp = netdev_priv(dev);
2946 unsigned long flags;
2947 2450
2948 pci_restore_state(pdev); 2451 pci_restore_state(pdev);
2949 if (!netif_running(dev)) 2452 if (!netif_running(dev))
2950 return 0; 2453 return 0;
2951 pci_set_power_state(pdev, PCI_D0); 2454 pci_set_power_state(pdev, PCI_D0);
2952 spin_lock_irqsave(&lp->lock, flags);
2953 tc35815_restart(dev); 2455 tc35815_restart(dev);
2954 spin_unlock_irqrestore(&lp->lock, flags); 2456 if (lp->phy_dev)
2457 phy_start(lp->phy_dev);
2955 netif_device_attach(dev); 2458 netif_device_attach(dev);
2956 return 0; 2459 return 0;
2957} 2460}
@@ -2972,8 +2475,6 @@ module_param_named(speed, options.speed, int, 0);
2972MODULE_PARM_DESC(speed, "0:auto, 10:10Mbps, 100:100Mbps"); 2475MODULE_PARM_DESC(speed, "0:auto, 10:10Mbps, 100:100Mbps");
2973module_param_named(duplex, options.duplex, int, 0); 2476module_param_named(duplex, options.duplex, int, 0);
2974MODULE_PARM_DESC(duplex, "0:auto, 1:half, 2:full"); 2477MODULE_PARM_DESC(duplex, "0:auto, 1:half, 2:full");
2975module_param_named(doforce, options.doforce, int, 0);
2976MODULE_PARM_DESC(doforce, "try force link mode if auto-negotiation failed");
2977 2478
2978static int __init tc35815_init_module(void) 2479static int __init tc35815_init_module(void)
2979{ 2480{
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-02 14:20:24 -0500