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path: root/drivers/net/sungem_phy.c
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-rw-r--r--drivers/net/sungem_phy.c50
1 files changed, 25 insertions, 25 deletions
diff --git a/drivers/net/sungem_phy.c b/drivers/net/sungem_phy.c
index 278c7cb22216..49800b25907d 100644
--- a/drivers/net/sungem_phy.c
+++ b/drivers/net/sungem_phy.c
@@ -1,8 +1,8 @@
1/* 1/*
2 * PHY drivers for the sungem ethernet driver. 2 * PHY drivers for the sungem ethernet driver.
3 * 3 *
4 * This file could be shared with other drivers. 4 * This file could be shared with other drivers.
5 * 5 *
6 * (c) 2002, Benjamin Herrenscmidt (benh@kernel.crashing.org) 6 * (c) 2002, Benjamin Herrenscmidt (benh@kernel.crashing.org)
7 * 7 *
8 * TODO: 8 * TODO:
@@ -73,7 +73,7 @@ static int reset_one_mii_phy(struct mii_phy* phy, int phy_id)
73{ 73{
74 u16 val; 74 u16 val;
75 int limit = 10000; 75 int limit = 10000;
76 76
77 val = __phy_read(phy, phy_id, MII_BMCR); 77 val = __phy_read(phy, phy_id, MII_BMCR);
78 val &= ~(BMCR_ISOLATE | BMCR_PDOWN); 78 val &= ~(BMCR_ISOLATE | BMCR_PDOWN);
79 val |= BMCR_RESET; 79 val |= BMCR_RESET;
@@ -89,7 +89,7 @@ static int reset_one_mii_phy(struct mii_phy* phy, int phy_id)
89 } 89 }
90 if ((val & BMCR_ISOLATE) && limit > 0) 90 if ((val & BMCR_ISOLATE) && limit > 0)
91 __phy_write(phy, phy_id, MII_BMCR, val & ~BMCR_ISOLATE); 91 __phy_write(phy, phy_id, MII_BMCR, val & ~BMCR_ISOLATE);
92 92
93 return (limit <= 0); 93 return (limit <= 0);
94} 94}
95 95
@@ -160,16 +160,16 @@ static int bcm5400_init(struct mii_phy* phy)
160 data = phy_read(phy, MII_BCM5400_AUXCONTROL); 160 data = phy_read(phy, MII_BCM5400_AUXCONTROL);
161 data |= MII_BCM5400_AUXCONTROL_PWR10BASET; 161 data |= MII_BCM5400_AUXCONTROL_PWR10BASET;
162 phy_write(phy, MII_BCM5400_AUXCONTROL, data); 162 phy_write(phy, MII_BCM5400_AUXCONTROL, data);
163 163
164 data = phy_read(phy, MII_BCM5400_GB_CONTROL); 164 data = phy_read(phy, MII_BCM5400_GB_CONTROL);
165 data |= MII_BCM5400_GB_CONTROL_FULLDUPLEXCAP; 165 data |= MII_BCM5400_GB_CONTROL_FULLDUPLEXCAP;
166 phy_write(phy, MII_BCM5400_GB_CONTROL, data); 166 phy_write(phy, MII_BCM5400_GB_CONTROL, data);
167 167
168 udelay(100); 168 udelay(100);
169 169
170 /* Reset and configure cascaded 10/100 PHY */ 170 /* Reset and configure cascaded 10/100 PHY */
171 (void)reset_one_mii_phy(phy, 0x1f); 171 (void)reset_one_mii_phy(phy, 0x1f);
172 172
173 data = __phy_read(phy, 0x1f, MII_BCM5201_MULTIPHY); 173 data = __phy_read(phy, 0x1f, MII_BCM5201_MULTIPHY);
174 data |= MII_BCM5201_MULTIPHY_SERIALMODE; 174 data |= MII_BCM5201_MULTIPHY_SERIALMODE;
175 __phy_write(phy, 0x1f, MII_BCM5201_MULTIPHY, data); 175 __phy_write(phy, 0x1f, MII_BCM5201_MULTIPHY, data);
@@ -199,7 +199,7 @@ static int bcm5401_init(struct mii_phy* phy)
199 /* Some revisions of 5401 appear to need this 199 /* Some revisions of 5401 appear to need this
200 * initialisation sequence to disable, according 200 * initialisation sequence to disable, according
201 * to OF, "tap power management" 201 * to OF, "tap power management"
202 * 202 *
203 * WARNING ! OF and Darwin don't agree on the 203 * WARNING ! OF and Darwin don't agree on the
204 * register addresses. OF seem to interpret the 204 * register addresses. OF seem to interpret the
205 * register numbers below as decimal 205 * register numbers below as decimal
@@ -219,7 +219,7 @@ static int bcm5401_init(struct mii_phy* phy)
219 phy_write(phy, 0x17, 0x201f); 219 phy_write(phy, 0x17, 0x201f);
220 phy_write(phy, 0x15, 0x0a20); 220 phy_write(phy, 0x15, 0x0a20);
221 } 221 }
222 222
223 /* Configure for gigabit full duplex */ 223 /* Configure for gigabit full duplex */
224 data = phy_read(phy, MII_BCM5400_GB_CONTROL); 224 data = phy_read(phy, MII_BCM5400_GB_CONTROL);
225 data |= MII_BCM5400_GB_CONTROL_FULLDUPLEXCAP; 225 data |= MII_BCM5400_GB_CONTROL_FULLDUPLEXCAP;
@@ -229,7 +229,7 @@ static int bcm5401_init(struct mii_phy* phy)
229 229
230 /* Reset and configure cascaded 10/100 PHY */ 230 /* Reset and configure cascaded 10/100 PHY */
231 (void)reset_one_mii_phy(phy, 0x1f); 231 (void)reset_one_mii_phy(phy, 0x1f);
232 232
233 data = __phy_read(phy, 0x1f, MII_BCM5201_MULTIPHY); 233 data = __phy_read(phy, 0x1f, MII_BCM5201_MULTIPHY);
234 data |= MII_BCM5201_MULTIPHY_SERIALMODE; 234 data |= MII_BCM5201_MULTIPHY_SERIALMODE;
235 __phy_write(phy, 0x1f, MII_BCM5201_MULTIPHY, data); 235 __phy_write(phy, 0x1f, MII_BCM5201_MULTIPHY, data);
@@ -270,7 +270,7 @@ static int bcm5411_init(struct mii_phy* phy)
270 270
271 /* Reset and configure cascaded 10/100 PHY */ 271 /* Reset and configure cascaded 10/100 PHY */
272 (void)reset_one_mii_phy(phy, 0x1f); 272 (void)reset_one_mii_phy(phy, 0x1f);
273 273
274 return 0; 274 return 0;
275} 275}
276 276
@@ -355,7 +355,7 @@ static int bcm5461_enable_fiber(struct mii_phy* phy)
355static int bcm54xx_setup_aneg(struct mii_phy *phy, u32 advertise) 355static int bcm54xx_setup_aneg(struct mii_phy *phy, u32 advertise)
356{ 356{
357 u16 ctl, adv; 357 u16 ctl, adv;
358 358
359 phy->autoneg = 1; 359 phy->autoneg = 1;
360 phy->speed = SPEED_10; 360 phy->speed = SPEED_10;
361 phy->duplex = DUPLEX_HALF; 361 phy->duplex = DUPLEX_HALF;
@@ -395,7 +395,7 @@ static int bcm54xx_setup_aneg(struct mii_phy *phy, u32 advertise)
395static int bcm54xx_setup_forced(struct mii_phy *phy, int speed, int fd) 395static int bcm54xx_setup_forced(struct mii_phy *phy, int speed, int fd)
396{ 396{
397 u16 ctl; 397 u16 ctl;
398 398
399 phy->autoneg = 0; 399 phy->autoneg = 0;
400 phy->speed = speed; 400 phy->speed = speed;
401 phy->duplex = fd; 401 phy->duplex = fd;
@@ -421,7 +421,7 @@ static int bcm54xx_setup_forced(struct mii_phy *phy, int speed, int fd)
421 ctl |= BMCR_FULLDPLX; 421 ctl |= BMCR_FULLDPLX;
422 422
423 // XXX Should we set the sungem to GII now on 1000BT ? 423 // XXX Should we set the sungem to GII now on 1000BT ?
424 424
425 phy_write(phy, MII_BMCR, ctl); 425 phy_write(phy, MII_BMCR, ctl);
426 426
427 return 0; 427 return 0;
@@ -429,9 +429,9 @@ static int bcm54xx_setup_forced(struct mii_phy *phy, int speed, int fd)
429 429
430static int bcm54xx_read_link(struct mii_phy *phy) 430static int bcm54xx_read_link(struct mii_phy *phy)
431{ 431{
432 int link_mode; 432 int link_mode;
433 u16 val; 433 u16 val;
434 434
435 if (phy->autoneg) { 435 if (phy->autoneg) {
436 val = phy_read(phy, MII_BCM5400_AUXSTATUS); 436 val = phy_read(phy, MII_BCM5400_AUXSTATUS);
437 link_mode = ((val & MII_BCM5400_AUXSTATUS_LINKMODE_MASK) >> 437 link_mode = ((val & MII_BCM5400_AUXSTATUS_LINKMODE_MASK) >>
@@ -453,7 +453,7 @@ static int bcm54xx_read_link(struct mii_phy *phy)
453static int marvell_setup_aneg(struct mii_phy *phy, u32 advertise) 453static int marvell_setup_aneg(struct mii_phy *phy, u32 advertise)
454{ 454{
455 u16 ctl, adv; 455 u16 ctl, adv;
456 456
457 phy->autoneg = 1; 457 phy->autoneg = 1;
458 phy->speed = SPEED_10; 458 phy->speed = SPEED_10;
459 phy->duplex = DUPLEX_HALF; 459 phy->duplex = DUPLEX_HALF;
@@ -500,7 +500,7 @@ static int marvell_setup_aneg(struct mii_phy *phy, u32 advertise)
500static int marvell_setup_forced(struct mii_phy *phy, int speed, int fd) 500static int marvell_setup_forced(struct mii_phy *phy, int speed, int fd)
501{ 501{
502 u16 ctl, ctl2; 502 u16 ctl, ctl2;
503 503
504 phy->autoneg = 0; 504 phy->autoneg = 0;
505 phy->speed = speed; 505 phy->speed = speed;
506 phy->duplex = fd; 506 phy->duplex = fd;
@@ -541,7 +541,7 @@ static int marvell_setup_forced(struct mii_phy *phy, int speed, int fd)
541 phy_write(phy, MII_1000BASETCONTROL, ctl2); 541 phy_write(phy, MII_1000BASETCONTROL, ctl2);
542 542
543 // XXX Should we set the sungem to GII now on 1000BT ? 543 // XXX Should we set the sungem to GII now on 1000BT ?
544 544
545 phy_write(phy, MII_BMCR, ctl); 545 phy_write(phy, MII_BMCR, ctl);
546 546
547 return 0; 547 return 0;
@@ -577,7 +577,7 @@ static int marvell_read_link(struct mii_phy *phy)
577static int genmii_setup_aneg(struct mii_phy *phy, u32 advertise) 577static int genmii_setup_aneg(struct mii_phy *phy, u32 advertise)
578{ 578{
579 u16 ctl, adv; 579 u16 ctl, adv;
580 580
581 phy->autoneg = 1; 581 phy->autoneg = 1;
582 phy->speed = SPEED_10; 582 phy->speed = SPEED_10;
583 phy->duplex = DUPLEX_HALF; 583 phy->duplex = DUPLEX_HALF;
@@ -608,7 +608,7 @@ static int genmii_setup_aneg(struct mii_phy *phy, u32 advertise)
608static int genmii_setup_forced(struct mii_phy *phy, int speed, int fd) 608static int genmii_setup_forced(struct mii_phy *phy, int speed, int fd)
609{ 609{
610 u16 ctl; 610 u16 ctl;
611 611
612 phy->autoneg = 0; 612 phy->autoneg = 0;
613 phy->speed = speed; 613 phy->speed = speed;
614 phy->duplex = fd; 614 phy->duplex = fd;
@@ -641,7 +641,7 @@ static int genmii_setup_forced(struct mii_phy *phy, int speed, int fd)
641static int genmii_poll_link(struct mii_phy *phy) 641static int genmii_poll_link(struct mii_phy *phy)
642{ 642{
643 u16 status; 643 u16 status;
644 644
645 (void)phy_read(phy, MII_BMSR); 645 (void)phy_read(phy, MII_BMSR);
646 status = phy_read(phy, MII_BMSR); 646 status = phy_read(phy, MII_BMSR);
647 if ((status & BMSR_LSTATUS) == 0) 647 if ((status & BMSR_LSTATUS) == 0)
@@ -918,13 +918,13 @@ int mii_phy_probe(struct mii_phy *phy, int mii_id)
918 * may re-probe the PHY regulary 918 * may re-probe the PHY regulary
919 */ 919 */
920 phy->mii_id = mii_id; 920 phy->mii_id = mii_id;
921 921
922 /* Take PHY out of isloate mode and reset it. */ 922 /* Take PHY out of isloate mode and reset it. */
923 rc = reset_one_mii_phy(phy, mii_id); 923 rc = reset_one_mii_phy(phy, mii_id);
924 if (rc) 924 if (rc)
925 goto fail; 925 goto fail;
926 926
927 /* Read ID and find matching entry */ 927 /* Read ID and find matching entry */
928 id = (phy_read(phy, MII_PHYSID1) << 16 | phy_read(phy, MII_PHYSID2)); 928 id = (phy_read(phy, MII_PHYSID1) << 16 | phy_read(phy, MII_PHYSID2));
929 printk(KERN_DEBUG "PHY ID: %x, addr: %x\n", id, mii_id); 929 printk(KERN_DEBUG "PHY ID: %x, addr: %x\n", id, mii_id);
930 for (i=0; (def = mii_phy_table[i]) != NULL; i++) 930 for (i=0; (def = mii_phy_table[i]) != NULL; i++)
@@ -935,7 +935,7 @@ int mii_phy_probe(struct mii_phy *phy, int mii_id)
935 goto fail; 935 goto fail;
936 936
937 phy->def = def; 937 phy->def = def;
938 938
939 return 0; 939 return 0;
940fail: 940fail:
941 phy->speed = 0; 941 phy->speed = 0;