3 files changed, 8 insertions, 8 deletions

diff --git a/drivers/net/stmmac/dwmac100.c b/drivers/net/stmmac/dwmac100.c
index 4cacca614fc1..1ca84eab289c 100644
--- a/drivers/net/stmmac/dwmac100.c
+++ b/drivers/net/stmmac/dwmac100.c
@@ -139,7 +139,7 @@ static void dwmac100_dump_dma_regs(unsigned long ioaddr)
 {
         int i;
 
-        DBG(KERN_DEBUG "DWMAC 100 DMA CSR \n");
+        DBG(KERN_DEBUG "DWMAC 100 DMA CSR\n");
         for (i = 0; i < 9; i++)
                 pr_debug("\t CSR%d (offset 0x%x): 0x%08x\n", i,
                        (DMA_BUS_MODE + i * 4),
@@ -317,7 +317,7 @@ static void dwmac100_set_filter(struct net_device *dev)
                            MAC_CONTROL_HO | MAC_CONTROL_HP);
         } else {
                 u32 mc_filter[2];
-                struct dev_mc_list *mclist;
+                struct netdev_hw_addr *ha;
 
                 /* Perfect filter mode for physical address and Hash
                    filter for multicast */
@@ -326,11 +326,11 @@ static void dwmac100_set_filter(struct net_device *dev)
                            MAC_CONTROL_IF | MAC_CONTROL_HO);
 
                 memset(mc_filter, 0, sizeof(mc_filter));
-                netdev_for_each_mc_addr(mclist, dev) {
+                netdev_for_each_mc_addr(ha, dev) {
                         /* The upper 6 bits of the calculated CRC are used to
                          * index the contens of the hash table */
                         int bit_nr =
-                            ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26;
+                            ether_crc(ETH_ALEN, ha->addr) >> 26;
                         /* The most significant bit determines the register to
                          * use (H/L) while the other 5 bits determine the bit
                          * within the register. */
diff --git a/drivers/net/stmmac/dwmac1000_core.c b/drivers/net/stmmac/dwmac1000_core.c
index 5bd95ebfe498..f9c7c1cbda93 100644
--- a/drivers/net/stmmac/dwmac1000_core.c
+++ b/drivers/net/stmmac/dwmac1000_core.c
@@ -95,17 +95,17 @@ static void dwmac1000_set_filter(struct net_device *dev)
                 writel(0xffffffff, ioaddr + GMAC_HASH_LOW);
         } else if (!netdev_mc_empty(dev)) {
                 u32 mc_filter[2];
-                struct dev_mc_list *mclist;
+                struct netdev_hw_addr *ha;
 
                 /* Hash filter for multicast */
                 value = GMAC_FRAME_FILTER_HMC;
 
                 memset(mc_filter, 0, sizeof(mc_filter));
-                netdev_for_each_mc_addr(mclist, dev) {
+                netdev_for_each_mc_addr(ha, dev) {
                         /* The upper 6 bits of the calculated CRC are used to
                            index the contens of the hash table */
                         int bit_nr =
-                            bitrev32(~crc32_le(~0, mclist->dmi_addr, 6)) >> 26;
+                            bitrev32(~crc32_le(~0, ha->addr, 6)) >> 26;
                         /* The most significant bit determines the register to
                          * use (H/L) while the other 5 bits determine the bit
                          * within the register. */
diff --git a/drivers/net/stmmac/stmmac_main.c b/drivers/net/stmmac/stmmac_main.c
index 4111a85ec80e..cc532ef28c8f 100644
--- a/drivers/net/stmmac/stmmac_main.c
+++ b/drivers/net/stmmac/stmmac_main.c
@@ -837,7 +837,7 @@ static int stmmac_open(struct net_device *dev)
 #ifdef CONFIG_STMMAC_TIMER
         priv->tm = kzalloc(sizeof(struct stmmac_timer *), GFP_KERNEL);
         if (unlikely(priv->tm == NULL)) {
-                pr_err("%s: ERROR: timer memory alloc failed \n", __func__);
+                pr_err("%s: ERROR: timer memory alloc failed\n", __func__);
                 return -ENOMEM;
         }
         priv->tm->freq = tmrate;