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Diffstat (limited to 'drivers/net/smc91x.h')
-rw-r--r--drivers/net/smc91x.h70
1 files changed, 57 insertions, 13 deletions
diff --git a/drivers/net/smc91x.h b/drivers/net/smc91x.h
index bf776125ca38..fedd1a37bc3e 100644
--- a/drivers/net/smc91x.h
+++ b/drivers/net/smc91x.h
@@ -136,14 +136,9 @@
136#define SMC_CAN_USE_32BIT 0 136#define SMC_CAN_USE_32BIT 0
137#define SMC_IO_SHIFT 0 137#define SMC_IO_SHIFT 0
138#define SMC_NOWAIT 1 138#define SMC_NOWAIT 1
139#define SMC_USE_PXA_DMA 1
140 139
141#define SMC_inb(a, r) readb((a) + (r))
142#define SMC_inw(a, r) readw((a) + (r)) 140#define SMC_inw(a, r) readw((a) + (r))
143#define SMC_inl(a, r) readl((a) + (r))
144#define SMC_outb(v, a, r) writeb(v, (a) + (r))
145#define SMC_outw(v, a, r) writew(v, (a) + (r)) 141#define SMC_outw(v, a, r) writew(v, (a) + (r))
146#define SMC_outl(v, a, r) writel(v, (a) + (r))
147#define SMC_insw(a, r, p, l) readsw((a) + (r), p, l) 142#define SMC_insw(a, r, p, l) readsw((a) + (r), p, l)
148#define SMC_outsw(a, r, p, l) writesw((a) + (r), p, l) 143#define SMC_outsw(a, r, p, l) writesw((a) + (r), p, l)
149 144
@@ -189,16 +184,10 @@ SMC_outw(u16 val, void __iomem *ioaddr, int reg)
189#define SMC_IO_SHIFT 0 184#define SMC_IO_SHIFT 0
190#define SMC_NOWAIT 1 185#define SMC_NOWAIT 1
191 186
192#define SMC_inb(a, r) readb((a) + (r))
193#define SMC_outb(v, a, r) writeb(v, (a) + (r))
194#define SMC_inw(a, r) readw((a) + (r)) 187#define SMC_inw(a, r) readw((a) + (r))
195#define SMC_outw(v, a, r) writew(v, (a) + (r)) 188#define SMC_outw(v, a, r) writew(v, (a) + (r))
196#define SMC_insw(a, r, p, l) readsw((a) + (r), p, l) 189#define SMC_insw(a, r, p, l) readsw((a) + (r), p, l)
197#define SMC_outsw(a, r, p, l) writesw((a) + (r), p, l) 190#define SMC_outsw(a, r, p, l) writesw((a) + (r), p, l)
198#define SMC_inl(a, r) readl((a) + (r))
199#define SMC_outl(v, a, r) writel(v, (a) + (r))
200#define SMC_insl(a, r, p, l) readsl((a) + (r), p, l)
201#define SMC_outsl(a, r, p, l) writesl((a) + (r), p, l)
202 191
203#include <asm/mach-types.h> 192#include <asm/mach-types.h>
204#include <asm/arch/cpu.h> 193#include <asm/arch/cpu.h>
@@ -206,8 +195,9 @@ SMC_outw(u16 val, void __iomem *ioaddr, int reg)
206#define SMC_IRQ_FLAGS (( \ 195#define SMC_IRQ_FLAGS (( \
207 machine_is_omap_h2() \ 196 machine_is_omap_h2() \
208 || machine_is_omap_h3() \ 197 || machine_is_omap_h3() \
198 || machine_is_omap_h4() \
209 || (machine_is_omap_innovator() && !cpu_is_omap1510()) \ 199 || (machine_is_omap_innovator() && !cpu_is_omap1510()) \
210 ) ? SA_TRIGGER_FALLING : SA_TRIGGER_RISING) 200 ) ? IRQF_TRIGGER_FALLING : IRQF_TRIGGER_RISING)
211 201
212 202
213#elif defined(CONFIG_SH_SH4202_MICRODEV) 203#elif defined(CONFIG_SH_SH4202_MICRODEV)
@@ -354,6 +344,60 @@ static inline void LPD7_SMC_outsw (unsigned char* a, int r,
354 344
355#define SMC_IRQ_FLAGS (0) 345#define SMC_IRQ_FLAGS (0)
356 346
347#elif defined(CONFIG_ARCH_VERSATILE)
348
349#define SMC_CAN_USE_8BIT 1
350#define SMC_CAN_USE_16BIT 1
351#define SMC_CAN_USE_32BIT 1
352#define SMC_NOWAIT 1
353
354#define SMC_inb(a, r) readb((a) + (r))
355#define SMC_inw(a, r) readw((a) + (r))
356#define SMC_inl(a, r) readl((a) + (r))
357#define SMC_outb(v, a, r) writeb(v, (a) + (r))
358#define SMC_outw(v, a, r) writew(v, (a) + (r))
359#define SMC_outl(v, a, r) writel(v, (a) + (r))
360#define SMC_insl(a, r, p, l) readsl((a) + (r), p, l)
361#define SMC_outsl(a, r, p, l) writesl((a) + (r), p, l)
362
363#define SMC_IRQ_FLAGS (0)
364
365#elif defined(CONFIG_ARCH_VERSATILE)
366
367#define SMC_CAN_USE_8BIT 1
368#define SMC_CAN_USE_16BIT 1
369#define SMC_CAN_USE_32BIT 1
370#define SMC_NOWAIT 1
371
372#define SMC_inb(a, r) readb((a) + (r))
373#define SMC_inw(a, r) readw((a) + (r))
374#define SMC_inl(a, r) readl((a) + (r))
375#define SMC_outb(v, a, r) writeb(v, (a) + (r))
376#define SMC_outw(v, a, r) writew(v, (a) + (r))
377#define SMC_outl(v, a, r) writel(v, (a) + (r))
378#define SMC_insl(a, r, p, l) readsl((a) + (r), p, l)
379#define SMC_outsl(a, r, p, l) writesl((a) + (r), p, l)
380
381#define SMC_IRQ_FLAGS (0)
382
383#elif defined(CONFIG_ARCH_VERSATILE)
384
385#define SMC_CAN_USE_8BIT 1
386#define SMC_CAN_USE_16BIT 1
387#define SMC_CAN_USE_32BIT 1
388#define SMC_NOWAIT 1
389
390#define SMC_inb(a, r) readb((a) + (r))
391#define SMC_inw(a, r) readw((a) + (r))
392#define SMC_inl(a, r) readl((a) + (r))
393#define SMC_outb(v, a, r) writeb(v, (a) + (r))
394#define SMC_outw(v, a, r) writew(v, (a) + (r))
395#define SMC_outl(v, a, r) writel(v, (a) + (r))
396#define SMC_insl(a, r, p, l) readsl((a) + (r), p, l)
397#define SMC_outsl(a, r, p, l) writesl((a) + (r), p, l)
398
399#define SMC_IRQ_FLAGS (0)
400
357#else 401#else
358 402
359#define SMC_CAN_USE_8BIT 1 403#define SMC_CAN_USE_8BIT 1
@@ -540,7 +584,7 @@ smc_pxa_dma_irq(int dma, void *dummy, struct pt_regs *regs)
540#endif 584#endif
541 585
542#ifndef SMC_IRQ_FLAGS 586#ifndef SMC_IRQ_FLAGS
543#define SMC_IRQ_FLAGS SA_TRIGGER_RISING 587#define SMC_IRQ_FLAGS IRQF_TRIGGER_RISING
544#endif 588#endif
545 589
546#ifndef SMC_INTERRUPT_PREAMBLE 590#ifndef SMC_INTERRUPT_PREAMBLE