1 files changed, 28 insertions, 16 deletions

diff --git a/drivers/net/smc91x.h b/drivers/net/smc91x.h
index f72a4f57905a..bf776125ca38 100644
--- a/drivers/net/smc91x.h
+++ b/drivers/net/smc91x.h
@@ -260,15 +260,17 @@ SMC_outw(u16 val, void __iomem *ioaddr, int reg)
 #define RPC_LSA_DEFAULT         RPC_LED_TX_RX
 #define RPC_LSB_DEFAULT         RPC_LED_100_10
 
-#elif   defined(CONFIG_MACH_LPD7A400) || defined(CONFIG_MACH_LPD7A404)
+#elif   defined(CONFIG_MACH_LPD79520) \
+     || defined(CONFIG_MACH_LPD7A400) \
+     || defined(CONFIG_MACH_LPD7A404)
 
-/* The LPD7A40X_IOBARRIER is necessary to overcome a mismatch between
- * the way that the CPU handles chip selects and the way that the SMC
- * chip expects the chip select to operate.  Refer to
+/* The LPD7X_IOBARRIER is necessary to overcome a mismatch between the
+ * way that the CPU handles chip selects and the way that the SMC chip
+ * expects the chip select to operate.  Refer to
  * Documentation/arm/Sharp-LH/IOBarrier for details.  The read from
- * IOBARRIER is a byte as a least-common denominator of possible
- * regions to use as the barrier.  It would be wasteful to read 32
- * bits from a byte oriented region.
+ * IOBARRIER is a byte, in order that we read the least-common
+ * denominator.  It would be wasteful to read 32 bits from an 8-bit
+ * accessible region.
  *
  * There is no explicit protection against interrupts intervening
  * between the writew and the IOBARRIER.  In SMC ISR there is a
@@ -287,25 +289,35 @@ SMC_outw(u16 val, void __iomem *ioaddr, int reg)
 #define SMC_CAN_USE_16BIT       1
 #define SMC_CAN_USE_32BIT       0
 #define SMC_NOWAIT              0
-#define LPD7A40X_IOBARRIER      readb (IOBARRIER_VIRT)
+#define LPD7X_IOBARRIER         readb (IOBARRIER_VIRT)
 
-#define SMC_inw(a,r)            readw ((void*) ((a) + (r)))
-#define SMC_insw(a,r,p,l)       readsw ((void*) ((a) + (r)), p, l)
-#define SMC_outw(v,a,r)      ({ writew ((v), (a) + (r)); LPD7A40X_IOBARRIER; })
+#define SMC_inw(a,r)\
+   ({ unsigned short v = readw ((void*) ((a) + (r))); LPD7X_IOBARRIER; v; })
+#define SMC_outw(v,a,r)   ({ writew ((v), (a) + (r)); LPD7X_IOBARRIER; })
 
-#define SMC_outsw               LPD7A40X_SMC_outsw
+#define SMC_insw                LPD7_SMC_insw
+static inline void LPD7_SMC_insw (unsigned char* a, int r,
+                                  unsigned char* p, int l)
+{
+        unsigned short* ps = (unsigned short*) p;
+        while (l-- > 0) {
+                *ps++ = readw (a + r);
+                LPD7X_IOBARRIER;
+        }
+}
 
-static inline void LPD7A40X_SMC_outsw(unsigned long a, int r,
-                                     unsigned char* p, int l)
+#define SMC_outsw               LPD7_SMC_outsw
+static inline void LPD7_SMC_outsw (unsigned char* a, int r,
+                                   unsigned char* p, int l)
 {
         unsigned short* ps = (unsigned short*) p;
         while (l-- > 0) {
                 writew (*ps++, a + r);
-                LPD7A40X_IOBARRIER;
+                LPD7X_IOBARRIER;
         }
 }
 
-#define SMC_INTERRUPT_PREAMBLE  LPD7A40X_IOBARRIER
+#define SMC_INTERRUPT_PREAMBLE  LPD7X_IOBARRIER
 
 #define RPC_LSA_DEFAULT         RPC_LED_TX_RX
 #define RPC_LSB_DEFAULT         RPC_LED_100_10