diff options
Diffstat (limited to 'drivers/net/sky2.h')
-rw-r--r-- | drivers/net/sky2.h | 37 |
1 files changed, 19 insertions, 18 deletions
diff --git a/drivers/net/sky2.h b/drivers/net/sky2.h index 8a0bc5525f0a..4c13c371bc21 100644 --- a/drivers/net/sky2.h +++ b/drivers/net/sky2.h | |||
@@ -1318,6 +1318,14 @@ enum { | |||
1318 | }; | 1318 | }; |
1319 | 1319 | ||
1320 | /* for Yukon-2 Gigabit Ethernet PHY (88E1112 only) */ | 1320 | /* for Yukon-2 Gigabit Ethernet PHY (88E1112 only) */ |
1321 | /***** PHY_MARV_PHY_CTRL (page 1) 16 bit r/w Fiber Specific Ctrl *****/ | ||
1322 | enum { | ||
1323 | PHY_M_FIB_FORCE_LNK = 1<<10,/* Force Link Good */ | ||
1324 | PHY_M_FIB_SIGD_POL = 1<<9, /* SIGDET Polarity */ | ||
1325 | PHY_M_FIB_TX_DIS = 1<<3, /* Transmitter Disable */ | ||
1326 | }; | ||
1327 | |||
1328 | /* for Yukon-2 Gigabit Ethernet PHY (88E1112 only) */ | ||
1321 | /***** PHY_MARV_PHY_CTRL (page 2) 16 bit r/w MAC Specific Ctrl *****/ | 1329 | /***** PHY_MARV_PHY_CTRL (page 2) 16 bit r/w MAC Specific Ctrl *****/ |
1322 | enum { | 1330 | enum { |
1323 | PHY_M_MAC_MD_MSK = 7<<7, /* Bit 9.. 7: Mode Select Mask */ | 1331 | PHY_M_MAC_MD_MSK = 7<<7, /* Bit 9.. 7: Mode Select Mask */ |
@@ -1480,7 +1488,7 @@ enum { | |||
1480 | GM_TXCR_FORCE_JAM = 1<<15, /* Bit 15: Force Jam / Flow-Control */ | 1488 | GM_TXCR_FORCE_JAM = 1<<15, /* Bit 15: Force Jam / Flow-Control */ |
1481 | GM_TXCR_CRC_DIS = 1<<14, /* Bit 14: Disable insertion of CRC */ | 1489 | GM_TXCR_CRC_DIS = 1<<14, /* Bit 14: Disable insertion of CRC */ |
1482 | GM_TXCR_PAD_DIS = 1<<13, /* Bit 13: Disable padding of packets */ | 1490 | GM_TXCR_PAD_DIS = 1<<13, /* Bit 13: Disable padding of packets */ |
1483 | GM_TXCR_COL_THR_MSK = 1<<10, /* Bit 12..10: Collision Threshold */ | 1491 | GM_TXCR_COL_THR_MSK = 7<<10, /* Bit 12..10: Collision Threshold */ |
1484 | }; | 1492 | }; |
1485 | 1493 | ||
1486 | #define TX_COL_THR(x) (((x)<<10) & GM_TXCR_COL_THR_MSK) | 1494 | #define TX_COL_THR(x) (((x)<<10) & GM_TXCR_COL_THR_MSK) |
@@ -1566,7 +1574,7 @@ enum { | |||
1566 | 1574 | ||
1567 | GMR_FS_ANY_ERR = GMR_FS_RX_FF_OV | GMR_FS_CRC_ERR | | 1575 | GMR_FS_ANY_ERR = GMR_FS_RX_FF_OV | GMR_FS_CRC_ERR | |
1568 | GMR_FS_FRAGMENT | GMR_FS_LONG_ERR | | 1576 | GMR_FS_FRAGMENT | GMR_FS_LONG_ERR | |
1569 | GMR_FS_MII_ERR | GMR_FS_BAD_FC | GMR_FS_GOOD_FC | | 1577 | GMR_FS_MII_ERR | GMR_FS_BAD_FC | |
1570 | GMR_FS_UN_SIZE | GMR_FS_JABBER, | 1578 | GMR_FS_UN_SIZE | GMR_FS_JABBER, |
1571 | }; | 1579 | }; |
1572 | 1580 | ||
@@ -1748,7 +1756,6 @@ enum { | |||
1748 | INIT_SUM= 1<<3, | 1756 | INIT_SUM= 1<<3, |
1749 | LOCK_SUM= 1<<4, | 1757 | LOCK_SUM= 1<<4, |
1750 | INS_VLAN= 1<<5, | 1758 | INS_VLAN= 1<<5, |
1751 | FRC_STAT= 1<<6, | ||
1752 | EOP = 1<<7, | 1759 | EOP = 1<<7, |
1753 | }; | 1760 | }; |
1754 | 1761 | ||
@@ -1784,21 +1791,9 @@ enum { | |||
1784 | OP_TXINDEXLE = 0x68, | 1791 | OP_TXINDEXLE = 0x68, |
1785 | }; | 1792 | }; |
1786 | 1793 | ||
1787 | /* Yukon 2 hardware interface | 1794 | /* Yukon 2 hardware interface */ |
1788 | * Not tested on big endian | ||
1789 | */ | ||
1790 | struct sky2_tx_le { | 1795 | struct sky2_tx_le { |
1791 | union { | 1796 | __le32 addr; |
1792 | __le32 addr; | ||
1793 | struct { | ||
1794 | __le16 offset; | ||
1795 | __le16 start; | ||
1796 | } csum __attribute((packed)); | ||
1797 | struct { | ||
1798 | __le16 size; | ||
1799 | __le16 rsvd; | ||
1800 | } tso __attribute((packed)); | ||
1801 | } tx; | ||
1802 | __le16 length; /* also vlan tag or checksum start */ | 1797 | __le16 length; /* also vlan tag or checksum start */ |
1803 | u8 ctrl; | 1798 | u8 ctrl; |
1804 | u8 opcode; | 1799 | u8 opcode; |
@@ -1844,6 +1839,7 @@ struct sky2_port { | |||
1844 | u32 tx_addr64; | 1839 | u32 tx_addr64; |
1845 | u16 tx_pending; | 1840 | u16 tx_pending; |
1846 | u16 tx_last_mss; | 1841 | u16 tx_last_mss; |
1842 | u32 tx_tcpsum; | ||
1847 | 1843 | ||
1848 | struct ring_info *rx_ring ____cacheline_aligned_in_smp; | 1844 | struct ring_info *rx_ring ____cacheline_aligned_in_smp; |
1849 | struct sky2_rx_le *rx_le; | 1845 | struct sky2_rx_le *rx_le; |
@@ -1879,7 +1875,7 @@ struct sky2_hw { | |||
1879 | int pm_cap; | 1875 | int pm_cap; |
1880 | u8 chip_id; | 1876 | u8 chip_id; |
1881 | u8 chip_rev; | 1877 | u8 chip_rev; |
1882 | u8 copper; | 1878 | u8 pmd_type; |
1883 | u8 ports; | 1879 | u8 ports; |
1884 | 1880 | ||
1885 | struct sky2_status_le *st_le; | 1881 | struct sky2_status_le *st_le; |
@@ -1891,6 +1887,11 @@ struct sky2_hw { | |||
1891 | wait_queue_head_t msi_wait; | 1887 | wait_queue_head_t msi_wait; |
1892 | }; | 1888 | }; |
1893 | 1889 | ||
1890 | static inline int sky2_is_copper(const struct sky2_hw *hw) | ||
1891 | { | ||
1892 | return !(hw->pmd_type == 'L' || hw->pmd_type == 'S' || hw->pmd_type == 'P'); | ||
1893 | } | ||
1894 | |||
1894 | /* Register accessor for memory mapped device */ | 1895 | /* Register accessor for memory mapped device */ |
1895 | static inline u32 sky2_read32(const struct sky2_hw *hw, unsigned reg) | 1896 | static inline u32 sky2_read32(const struct sky2_hw *hw, unsigned reg) |
1896 | { | 1897 | { |