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path: root/drivers/net/sky2.h
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-rw-r--r--drivers/net/sky2.h9
1 files changed, 7 insertions, 2 deletions
diff --git a/drivers/net/sky2.h b/drivers/net/sky2.h
index 629d08f170fd..f836b0322b19 100644
--- a/drivers/net/sky2.h
+++ b/drivers/net/sky2.h
@@ -309,7 +309,7 @@ enum {
309 Y2_IS_PAR_RX2 | Y2_IS_TCP_TXS2| Y2_IS_TCP_TXA2, 309 Y2_IS_PAR_RX2 | Y2_IS_TCP_TXS2| Y2_IS_TCP_TXA2,
310 310
311 Y2_HWE_ALL_MASK = Y2_IS_TIST_OV | Y2_IS_MST_ERR | Y2_IS_IRQ_STAT | 311 Y2_HWE_ALL_MASK = Y2_IS_TIST_OV | Y2_IS_MST_ERR | Y2_IS_IRQ_STAT |
312 Y2_IS_PCI_EXP | Y2_IS_PCI_NEXP | 312 Y2_IS_PCI_EXP |
313 Y2_HWE_L1_MASK | Y2_HWE_L2_MASK, 313 Y2_HWE_L1_MASK | Y2_HWE_L2_MASK,
314}; 314};
315 315
@@ -346,6 +346,7 @@ enum {
346 CHIP_ID_YUKON_LITE = 0xb1, /* Chip ID for YUKON-Lite (Rev. A1-A3) */ 346 CHIP_ID_YUKON_LITE = 0xb1, /* Chip ID for YUKON-Lite (Rev. A1-A3) */
347 CHIP_ID_YUKON_LP = 0xb2, /* Chip ID for YUKON-LP */ 347 CHIP_ID_YUKON_LP = 0xb2, /* Chip ID for YUKON-LP */
348 CHIP_ID_YUKON_XL = 0xb3, /* Chip ID for YUKON-2 XL */ 348 CHIP_ID_YUKON_XL = 0xb3, /* Chip ID for YUKON-2 XL */
349 CHIP_ID_YUKON_EC_U = 0xb4, /* Chip ID for YUKON-2 EC Ultra */
349 CHIP_ID_YUKON_EC = 0xb6, /* Chip ID for YUKON-2 EC */ 350 CHIP_ID_YUKON_EC = 0xb6, /* Chip ID for YUKON-2 EC */
350 CHIP_ID_YUKON_FE = 0xb7, /* Chip ID for YUKON-2 FE */ 351 CHIP_ID_YUKON_FE = 0xb7, /* Chip ID for YUKON-2 FE */
351 352
@@ -579,7 +580,8 @@ enum {
579 RX_GMF_FL_MSK = 0x0c4c,/* 32 bit Rx GMAC FIFO Flush Mask */ 580 RX_GMF_FL_MSK = 0x0c4c,/* 32 bit Rx GMAC FIFO Flush Mask */
580 RX_GMF_FL_THR = 0x0c50,/* 32 bit Rx GMAC FIFO Flush Threshold */ 581 RX_GMF_FL_THR = 0x0c50,/* 32 bit Rx GMAC FIFO Flush Threshold */
581 RX_GMF_TR_THR = 0x0c54,/* 32 bit Rx Truncation Threshold (Yukon-2) */ 582 RX_GMF_TR_THR = 0x0c54,/* 32 bit Rx Truncation Threshold (Yukon-2) */
582 583 RX_GMF_UP_THR = 0x0c58,/* 8 bit Rx Upper Pause Thr (Yukon-EC_U) */
584 RX_GMF_LP_THR = 0x0c5a,/* 8 bit Rx Lower Pause Thr (Yukon-EC_U) */
583 RX_GMF_VLAN = 0x0c5c,/* 32 bit Rx VLAN Type Register (Yukon-2) */ 585 RX_GMF_VLAN = 0x0c5c,/* 32 bit Rx VLAN Type Register (Yukon-2) */
584 RX_GMF_WP = 0x0c60,/* 32 bit Rx GMAC FIFO Write Pointer */ 586 RX_GMF_WP = 0x0c60,/* 32 bit Rx GMAC FIFO Write Pointer */
585 587
@@ -1557,6 +1559,9 @@ enum {
1557 1559
1558/* TX_GMF_CTRL_T 32 bit Tx GMAC FIFO Control/Test */ 1560/* TX_GMF_CTRL_T 32 bit Tx GMAC FIFO Control/Test */
1559enum { 1561enum {
1562 TX_STFW_DIS = 1<<31,/* Disable Store & Forward (Yukon-EC Ultra) */
1563 TX_STFW_ENA = 1<<30,/* Enable Store & Forward (Yukon-EC Ultra) */
1564
1560 TX_VLAN_TAG_ON = 1<<25,/* enable VLAN tagging */ 1565 TX_VLAN_TAG_ON = 1<<25,/* enable VLAN tagging */
1561 TX_VLAN_TAG_OFF = 1<<24,/* disable VLAN tagging */ 1566 TX_VLAN_TAG_OFF = 1<<24,/* disable VLAN tagging */
1562 1567