diff options
Diffstat (limited to 'drivers/net/sky2.h')
| -rw-r--r-- | drivers/net/sky2.h | 45 | 
1 files changed, 2 insertions, 43 deletions
diff --git a/drivers/net/sky2.h b/drivers/net/sky2.h index 4c13c371bc21..b2981565e9e3 100644 --- a/drivers/net/sky2.h +++ b/drivers/net/sky2.h  | |||
| @@ -4,24 +4,15 @@ | |||
| 4 | #ifndef _SKY2_H | 4 | #ifndef _SKY2_H | 
| 5 | #define _SKY2_H | 5 | #define _SKY2_H | 
| 6 | 6 | ||
| 7 | /* PCI config registers */ | 7 | /* PCI device specific config registers */ | 
| 8 | enum { | 8 | enum { | 
| 9 | PCI_DEV_REG1 = 0x40, | 9 | PCI_DEV_REG1 = 0x40, | 
| 10 | PCI_DEV_REG2 = 0x44, | 10 | PCI_DEV_REG2 = 0x44, | 
| 11 | PCI_DEV_STATUS = 0x7c, | ||
| 12 | PCI_DEV_REG3 = 0x80, | 11 | PCI_DEV_REG3 = 0x80, | 
| 13 | PCI_DEV_REG4 = 0x84, | 12 | PCI_DEV_REG4 = 0x84, | 
| 14 | PCI_DEV_REG5 = 0x88, | 13 | PCI_DEV_REG5 = 0x88, | 
| 15 | }; | 14 | }; | 
| 16 | 15 | ||
| 17 | enum { | ||
| 18 | PEX_DEV_CAP = 0xe4, | ||
| 19 | PEX_DEV_CTRL = 0xe8, | ||
| 20 | PEX_DEV_STA = 0xea, | ||
| 21 | PEX_LNK_STAT = 0xf2, | ||
| 22 | PEX_UNC_ERR_STAT= 0x104, | ||
| 23 | }; | ||
| 24 | |||
| 25 | /* Yukon-2 */ | 16 | /* Yukon-2 */ | 
| 26 | enum pci_dev_reg_1 { | 17 | enum pci_dev_reg_1 { | 
| 27 | PCI_Y2_PIG_ENA = 1<<31, /* Enable Plug-in-Go (YUKON-2) */ | 18 | PCI_Y2_PIG_ENA = 1<<31, /* Enable Plug-in-Go (YUKON-2) */ | 
| @@ -70,39 +61,6 @@ enum pci_dev_reg_4 { | |||
| 70 | PCI_STATUS_REC_MASTER_ABORT | \ | 61 | PCI_STATUS_REC_MASTER_ABORT | \ | 
| 71 | PCI_STATUS_REC_TARGET_ABORT | \ | 62 | PCI_STATUS_REC_TARGET_ABORT | \ | 
| 72 | PCI_STATUS_PARITY) | 63 | PCI_STATUS_PARITY) | 
| 73 | |||
| 74 | enum pex_dev_ctrl { | ||
| 75 | PEX_DC_MAX_RRS_MSK = 7<<12, /* Bit 14..12: Max. Read Request Size */ | ||
| 76 | PEX_DC_EN_NO_SNOOP = 1<<11,/* Enable No Snoop */ | ||
| 77 | PEX_DC_EN_AUX_POW = 1<<10,/* Enable AUX Power */ | ||
| 78 | PEX_DC_EN_PHANTOM = 1<<9, /* Enable Phantom Functions */ | ||
| 79 | PEX_DC_EN_EXT_TAG = 1<<8, /* Enable Extended Tag Field */ | ||
| 80 | PEX_DC_MAX_PLS_MSK = 7<<5, /* Bit 7.. 5: Max. Payload Size Mask */ | ||
| 81 | PEX_DC_EN_REL_ORD = 1<<4, /* Enable Relaxed Ordering */ | ||
| 82 | PEX_DC_EN_UNS_RQ_RP = 1<<3, /* Enable Unsupported Request Reporting */ | ||
| 83 | PEX_DC_EN_FAT_ER_RP = 1<<2, /* Enable Fatal Error Reporting */ | ||
| 84 | PEX_DC_EN_NFA_ER_RP = 1<<1, /* Enable Non-Fatal Error Reporting */ | ||
| 85 | PEX_DC_EN_COR_ER_RP = 1<<0, /* Enable Correctable Error Reporting */ | ||
| 86 | }; | ||
| 87 | #define PEX_DC_MAX_RD_RQ_SIZE(x) (((x)<<12) & PEX_DC_MAX_RRS_MSK) | ||
| 88 | |||
| 89 | /* PEX_UNC_ERR_STAT PEX Uncorrectable Errors Status Register (Yukon-2) */ | ||
| 90 | enum pex_err { | ||
| 91 | PEX_UNSUP_REQ = 1<<20, /* Unsupported Request Error */ | ||
| 92 | |||
| 93 | PEX_MALFOR_TLP = 1<<18, /* Malformed TLP */ | ||
| 94 | |||
| 95 | PEX_UNEXP_COMP = 1<<16, /* Unexpected Completion */ | ||
| 96 | |||
| 97 | PEX_COMP_TO = 1<<14, /* Completion Timeout */ | ||
| 98 | PEX_FLOW_CTRL_P = 1<<13, /* Flow Control Protocol Error */ | ||
| 99 | PEX_POIS_TLP = 1<<12, /* Poisoned TLP */ | ||
| 100 | |||
| 101 | PEX_DATA_LINK_P = 1<<4, /* Data Link Protocol Error */ | ||
| 102 | PEX_FATAL_ERRORS= (PEX_MALFOR_TLP | PEX_FLOW_CTRL_P | PEX_DATA_LINK_P), | ||
| 103 | }; | ||
| 104 | |||
| 105 | |||
| 106 | enum csr_regs { | 64 | enum csr_regs { | 
| 107 | B0_RAP = 0x0000, | 65 | B0_RAP = 0x0000, | 
| 108 | B0_CTST = 0x0004, | 66 | B0_CTST = 0x0004, | 
| @@ -1873,6 +1831,7 @@ struct sky2_hw { | |||
| 1873 | struct net_device *dev[2]; | 1831 | struct net_device *dev[2]; | 
| 1874 | 1832 | ||
| 1875 | int pm_cap; | 1833 | int pm_cap; | 
| 1834 | int err_cap; | ||
| 1876 | u8 chip_id; | 1835 | u8 chip_id; | 
| 1877 | u8 chip_rev; | 1836 | u8 chip_rev; | 
| 1878 | u8 pmd_type; | 1837 | u8 pmd_type; | 
