diff options
Diffstat (limited to 'drivers/net/sky2.h')
-rw-r--r-- | drivers/net/sky2.h | 62 |
1 files changed, 13 insertions, 49 deletions
diff --git a/drivers/net/sky2.h b/drivers/net/sky2.h index 4c13c371bc21..f66109a96d95 100644 --- a/drivers/net/sky2.h +++ b/drivers/net/sky2.h | |||
@@ -4,24 +4,17 @@ | |||
4 | #ifndef _SKY2_H | 4 | #ifndef _SKY2_H |
5 | #define _SKY2_H | 5 | #define _SKY2_H |
6 | 6 | ||
7 | /* PCI config registers */ | 7 | #define ETH_JUMBO_MTU 9000 /* Maximum MTU supported */ |
8 | |||
9 | /* PCI device specific config registers */ | ||
8 | enum { | 10 | enum { |
9 | PCI_DEV_REG1 = 0x40, | 11 | PCI_DEV_REG1 = 0x40, |
10 | PCI_DEV_REG2 = 0x44, | 12 | PCI_DEV_REG2 = 0x44, |
11 | PCI_DEV_STATUS = 0x7c, | ||
12 | PCI_DEV_REG3 = 0x80, | 13 | PCI_DEV_REG3 = 0x80, |
13 | PCI_DEV_REG4 = 0x84, | 14 | PCI_DEV_REG4 = 0x84, |
14 | PCI_DEV_REG5 = 0x88, | 15 | PCI_DEV_REG5 = 0x88, |
15 | }; | 16 | }; |
16 | 17 | ||
17 | enum { | ||
18 | PEX_DEV_CAP = 0xe4, | ||
19 | PEX_DEV_CTRL = 0xe8, | ||
20 | PEX_DEV_STA = 0xea, | ||
21 | PEX_LNK_STAT = 0xf2, | ||
22 | PEX_UNC_ERR_STAT= 0x104, | ||
23 | }; | ||
24 | |||
25 | /* Yukon-2 */ | 18 | /* Yukon-2 */ |
26 | enum pci_dev_reg_1 { | 19 | enum pci_dev_reg_1 { |
27 | PCI_Y2_PIG_ENA = 1<<31, /* Enable Plug-in-Go (YUKON-2) */ | 20 | PCI_Y2_PIG_ENA = 1<<31, /* Enable Plug-in-Go (YUKON-2) */ |
@@ -70,39 +63,6 @@ enum pci_dev_reg_4 { | |||
70 | PCI_STATUS_REC_MASTER_ABORT | \ | 63 | PCI_STATUS_REC_MASTER_ABORT | \ |
71 | PCI_STATUS_REC_TARGET_ABORT | \ | 64 | PCI_STATUS_REC_TARGET_ABORT | \ |
72 | PCI_STATUS_PARITY) | 65 | PCI_STATUS_PARITY) |
73 | |||
74 | enum pex_dev_ctrl { | ||
75 | PEX_DC_MAX_RRS_MSK = 7<<12, /* Bit 14..12: Max. Read Request Size */ | ||
76 | PEX_DC_EN_NO_SNOOP = 1<<11,/* Enable No Snoop */ | ||
77 | PEX_DC_EN_AUX_POW = 1<<10,/* Enable AUX Power */ | ||
78 | PEX_DC_EN_PHANTOM = 1<<9, /* Enable Phantom Functions */ | ||
79 | PEX_DC_EN_EXT_TAG = 1<<8, /* Enable Extended Tag Field */ | ||
80 | PEX_DC_MAX_PLS_MSK = 7<<5, /* Bit 7.. 5: Max. Payload Size Mask */ | ||
81 | PEX_DC_EN_REL_ORD = 1<<4, /* Enable Relaxed Ordering */ | ||
82 | PEX_DC_EN_UNS_RQ_RP = 1<<3, /* Enable Unsupported Request Reporting */ | ||
83 | PEX_DC_EN_FAT_ER_RP = 1<<2, /* Enable Fatal Error Reporting */ | ||
84 | PEX_DC_EN_NFA_ER_RP = 1<<1, /* Enable Non-Fatal Error Reporting */ | ||
85 | PEX_DC_EN_COR_ER_RP = 1<<0, /* Enable Correctable Error Reporting */ | ||
86 | }; | ||
87 | #define PEX_DC_MAX_RD_RQ_SIZE(x) (((x)<<12) & PEX_DC_MAX_RRS_MSK) | ||
88 | |||
89 | /* PEX_UNC_ERR_STAT PEX Uncorrectable Errors Status Register (Yukon-2) */ | ||
90 | enum pex_err { | ||
91 | PEX_UNSUP_REQ = 1<<20, /* Unsupported Request Error */ | ||
92 | |||
93 | PEX_MALFOR_TLP = 1<<18, /* Malformed TLP */ | ||
94 | |||
95 | PEX_UNEXP_COMP = 1<<16, /* Unexpected Completion */ | ||
96 | |||
97 | PEX_COMP_TO = 1<<14, /* Completion Timeout */ | ||
98 | PEX_FLOW_CTRL_P = 1<<13, /* Flow Control Protocol Error */ | ||
99 | PEX_POIS_TLP = 1<<12, /* Poisoned TLP */ | ||
100 | |||
101 | PEX_DATA_LINK_P = 1<<4, /* Data Link Protocol Error */ | ||
102 | PEX_FATAL_ERRORS= (PEX_MALFOR_TLP | PEX_FLOW_CTRL_P | PEX_DATA_LINK_P), | ||
103 | }; | ||
104 | |||
105 | |||
106 | enum csr_regs { | 66 | enum csr_regs { |
107 | B0_RAP = 0x0000, | 67 | B0_RAP = 0x0000, |
108 | B0_CTST = 0x0004, | 68 | B0_CTST = 0x0004, |
@@ -1816,12 +1776,14 @@ struct sky2_status_le { | |||
1816 | struct tx_ring_info { | 1776 | struct tx_ring_info { |
1817 | struct sk_buff *skb; | 1777 | struct sk_buff *skb; |
1818 | DECLARE_PCI_UNMAP_ADDR(mapaddr); | 1778 | DECLARE_PCI_UNMAP_ADDR(mapaddr); |
1819 | u16 idx; | 1779 | DECLARE_PCI_UNMAP_ADDR(maplen); |
1820 | }; | 1780 | }; |
1821 | 1781 | ||
1822 | struct ring_info { | 1782 | struct rx_ring_info { |
1823 | struct sk_buff *skb; | 1783 | struct sk_buff *skb; |
1824 | dma_addr_t mapaddr; | 1784 | dma_addr_t data_addr; |
1785 | DECLARE_PCI_UNMAP_ADDR(data_size); | ||
1786 | dma_addr_t frag_addr[ETH_JUMBO_MTU >> PAGE_SHIFT]; | ||
1825 | }; | 1787 | }; |
1826 | 1788 | ||
1827 | struct sky2_port { | 1789 | struct sky2_port { |
@@ -1831,7 +1793,6 @@ struct sky2_port { | |||
1831 | u32 msg_enable; | 1793 | u32 msg_enable; |
1832 | spinlock_t phy_lock; | 1794 | spinlock_t phy_lock; |
1833 | 1795 | ||
1834 | spinlock_t tx_lock ____cacheline_aligned_in_smp; | ||
1835 | struct tx_ring_info *tx_ring; | 1796 | struct tx_ring_info *tx_ring; |
1836 | struct sky2_tx_le *tx_le; | 1797 | struct sky2_tx_le *tx_le; |
1837 | u16 tx_cons; /* next le to check */ | 1798 | u16 tx_cons; /* next le to check */ |
@@ -1841,13 +1802,15 @@ struct sky2_port { | |||
1841 | u16 tx_last_mss; | 1802 | u16 tx_last_mss; |
1842 | u32 tx_tcpsum; | 1803 | u32 tx_tcpsum; |
1843 | 1804 | ||
1844 | struct ring_info *rx_ring ____cacheline_aligned_in_smp; | 1805 | struct rx_ring_info *rx_ring ____cacheline_aligned_in_smp; |
1845 | struct sky2_rx_le *rx_le; | 1806 | struct sky2_rx_le *rx_le; |
1846 | u32 rx_addr64; | 1807 | u32 rx_addr64; |
1847 | u16 rx_next; /* next re to check */ | 1808 | u16 rx_next; /* next re to check */ |
1848 | u16 rx_put; /* next le index to use */ | 1809 | u16 rx_put; /* next le index to use */ |
1849 | u16 rx_pending; | 1810 | u16 rx_pending; |
1850 | u16 rx_bufsize; | 1811 | u16 rx_data_size; |
1812 | u16 rx_nfrags; | ||
1813 | |||
1851 | #ifdef SKY2_VLAN_TAG_USED | 1814 | #ifdef SKY2_VLAN_TAG_USED |
1852 | u16 rx_tag; | 1815 | u16 rx_tag; |
1853 | struct vlan_group *vlgrp; | 1816 | struct vlan_group *vlgrp; |
@@ -1873,6 +1836,7 @@ struct sky2_hw { | |||
1873 | struct net_device *dev[2]; | 1836 | struct net_device *dev[2]; |
1874 | 1837 | ||
1875 | int pm_cap; | 1838 | int pm_cap; |
1839 | int err_cap; | ||
1876 | u8 chip_id; | 1840 | u8 chip_id; |
1877 | u8 chip_rev; | 1841 | u8 chip_rev; |
1878 | u8 pmd_type; | 1842 | u8 pmd_type; |