diff options
Diffstat (limited to 'drivers/net/sky2.h')
-rw-r--r-- | drivers/net/sky2.h | 45 |
1 files changed, 43 insertions, 2 deletions
diff --git a/drivers/net/sky2.h b/drivers/net/sky2.h index f66109a96d95..43d2accf60e1 100644 --- a/drivers/net/sky2.h +++ b/drivers/net/sky2.h | |||
@@ -6,15 +6,24 @@ | |||
6 | 6 | ||
7 | #define ETH_JUMBO_MTU 9000 /* Maximum MTU supported */ | 7 | #define ETH_JUMBO_MTU 9000 /* Maximum MTU supported */ |
8 | 8 | ||
9 | /* PCI device specific config registers */ | 9 | /* PCI config registers */ |
10 | enum { | 10 | enum { |
11 | PCI_DEV_REG1 = 0x40, | 11 | PCI_DEV_REG1 = 0x40, |
12 | PCI_DEV_REG2 = 0x44, | 12 | PCI_DEV_REG2 = 0x44, |
13 | PCI_DEV_STATUS = 0x7c, | ||
13 | PCI_DEV_REG3 = 0x80, | 14 | PCI_DEV_REG3 = 0x80, |
14 | PCI_DEV_REG4 = 0x84, | 15 | PCI_DEV_REG4 = 0x84, |
15 | PCI_DEV_REG5 = 0x88, | 16 | PCI_DEV_REG5 = 0x88, |
16 | }; | 17 | }; |
17 | 18 | ||
19 | enum { | ||
20 | PEX_DEV_CAP = 0xe4, | ||
21 | PEX_DEV_CTRL = 0xe8, | ||
22 | PEX_DEV_STA = 0xea, | ||
23 | PEX_LNK_STAT = 0xf2, | ||
24 | PEX_UNC_ERR_STAT= 0x104, | ||
25 | }; | ||
26 | |||
18 | /* Yukon-2 */ | 27 | /* Yukon-2 */ |
19 | enum pci_dev_reg_1 { | 28 | enum pci_dev_reg_1 { |
20 | PCI_Y2_PIG_ENA = 1<<31, /* Enable Plug-in-Go (YUKON-2) */ | 29 | PCI_Y2_PIG_ENA = 1<<31, /* Enable Plug-in-Go (YUKON-2) */ |
@@ -63,6 +72,39 @@ enum pci_dev_reg_4 { | |||
63 | PCI_STATUS_REC_MASTER_ABORT | \ | 72 | PCI_STATUS_REC_MASTER_ABORT | \ |
64 | PCI_STATUS_REC_TARGET_ABORT | \ | 73 | PCI_STATUS_REC_TARGET_ABORT | \ |
65 | PCI_STATUS_PARITY) | 74 | PCI_STATUS_PARITY) |
75 | |||
76 | enum pex_dev_ctrl { | ||
77 | PEX_DC_MAX_RRS_MSK = 7<<12, /* Bit 14..12: Max. Read Request Size */ | ||
78 | PEX_DC_EN_NO_SNOOP = 1<<11,/* Enable No Snoop */ | ||
79 | PEX_DC_EN_AUX_POW = 1<<10,/* Enable AUX Power */ | ||
80 | PEX_DC_EN_PHANTOM = 1<<9, /* Enable Phantom Functions */ | ||
81 | PEX_DC_EN_EXT_TAG = 1<<8, /* Enable Extended Tag Field */ | ||
82 | PEX_DC_MAX_PLS_MSK = 7<<5, /* Bit 7.. 5: Max. Payload Size Mask */ | ||
83 | PEX_DC_EN_REL_ORD = 1<<4, /* Enable Relaxed Ordering */ | ||
84 | PEX_DC_EN_UNS_RQ_RP = 1<<3, /* Enable Unsupported Request Reporting */ | ||
85 | PEX_DC_EN_FAT_ER_RP = 1<<2, /* Enable Fatal Error Reporting */ | ||
86 | PEX_DC_EN_NFA_ER_RP = 1<<1, /* Enable Non-Fatal Error Reporting */ | ||
87 | PEX_DC_EN_COR_ER_RP = 1<<0, /* Enable Correctable Error Reporting */ | ||
88 | }; | ||
89 | #define PEX_DC_MAX_RD_RQ_SIZE(x) (((x)<<12) & PEX_DC_MAX_RRS_MSK) | ||
90 | |||
91 | /* PEX_UNC_ERR_STAT PEX Uncorrectable Errors Status Register (Yukon-2) */ | ||
92 | enum pex_err { | ||
93 | PEX_UNSUP_REQ = 1<<20, /* Unsupported Request Error */ | ||
94 | |||
95 | PEX_MALFOR_TLP = 1<<18, /* Malformed TLP */ | ||
96 | |||
97 | PEX_UNEXP_COMP = 1<<16, /* Unexpected Completion */ | ||
98 | |||
99 | PEX_COMP_TO = 1<<14, /* Completion Timeout */ | ||
100 | PEX_FLOW_CTRL_P = 1<<13, /* Flow Control Protocol Error */ | ||
101 | PEX_POIS_TLP = 1<<12, /* Poisoned TLP */ | ||
102 | |||
103 | PEX_DATA_LINK_P = 1<<4, /* Data Link Protocol Error */ | ||
104 | PEX_FATAL_ERRORS= (PEX_MALFOR_TLP | PEX_FLOW_CTRL_P | PEX_DATA_LINK_P), | ||
105 | }; | ||
106 | |||
107 | |||
66 | enum csr_regs { | 108 | enum csr_regs { |
67 | B0_RAP = 0x0000, | 109 | B0_RAP = 0x0000, |
68 | B0_CTST = 0x0004, | 110 | B0_CTST = 0x0004, |
@@ -1836,7 +1878,6 @@ struct sky2_hw { | |||
1836 | struct net_device *dev[2]; | 1878 | struct net_device *dev[2]; |
1837 | 1879 | ||
1838 | int pm_cap; | 1880 | int pm_cap; |
1839 | int err_cap; | ||
1840 | u8 chip_id; | 1881 | u8 chip_id; |
1841 | u8 chip_rev; | 1882 | u8 chip_rev; |
1842 | u8 pmd_type; | 1883 | u8 pmd_type; |