aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/net/sky2.h
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/net/sky2.h')
-rw-r--r--drivers/net/sky2.h83
1 files changed, 72 insertions, 11 deletions
diff --git a/drivers/net/sky2.h b/drivers/net/sky2.h
index fd12c289a238..3edb98075e0a 100644
--- a/drivers/net/sky2.h
+++ b/drivers/net/sky2.h
@@ -5,14 +5,22 @@
5#define _SKY2_H 5#define _SKY2_H
6 6
7/* PCI config registers */ 7/* PCI config registers */
8#define PCI_DEV_REG1 0x40 8enum {
9#define PCI_DEV_REG2 0x44 9 PCI_DEV_REG1 = 0x40,
10#define PCI_DEV_STATUS 0x7c 10 PCI_DEV_REG2 = 0x44,
11#define PCI_OS_PCI_X (1<<26) 11 PCI_DEV_STATUS = 0x7c,
12 PCI_DEV_REG3 = 0x80,
13 PCI_DEV_REG4 = 0x84,
14 PCI_DEV_REG5 = 0x88,
15};
12 16
13#define PEX_LNK_STAT 0xf2 17enum {
14#define PEX_UNC_ERR_STAT 0x104 18 PEX_DEV_CAP = 0xe4,
15#define PEX_DEV_CTRL 0xe8 19 PEX_DEV_CTRL = 0xe8,
20 PEX_DEV_STA = 0xea,
21 PEX_LNK_STAT = 0xf2,
22 PEX_UNC_ERR_STAT= 0x104,
23};
16 24
17/* Yukon-2 */ 25/* Yukon-2 */
18enum pci_dev_reg_1 { 26enum pci_dev_reg_1 {
@@ -37,6 +45,25 @@ enum pci_dev_reg_2 {
37 PCI_USEDATA64 = 1<<0, /* Use 64Bit Data bus ext */ 45 PCI_USEDATA64 = 1<<0, /* Use 64Bit Data bus ext */
38}; 46};
39 47
48/* PCI_OUR_REG_4 32 bit Our Register 4 (Yukon-ECU only) */
49enum pci_dev_reg_4 {
50 /* (Link Training & Status State Machine) */
51 P_TIMER_VALUE_MSK = 0xffL<<16, /* Bit 23..16: Timer Value Mask */
52 /* (Active State Power Management) */
53 P_FORCE_ASPM_REQUEST = 1<<15, /* Force ASPM Request (A1 only) */
54 P_ASPM_GPHY_LINK_DOWN = 1<<14, /* GPHY Link Down (A1 only) */
55 P_ASPM_INT_FIFO_EMPTY = 1<<13, /* Internal FIFO Empty (A1 only) */
56 P_ASPM_CLKRUN_REQUEST = 1<<12, /* CLKRUN Request (A1 only) */
57
58 P_ASPM_FORCE_CLKREQ_ENA = 1<<4, /* Force CLKREQ Enable (A1b only) */
59 P_ASPM_CLKREQ_PAD_CTL = 1<<3, /* CLKREQ PAD Control (A1 only) */
60 P_ASPM_A1_MODE_SELECT = 1<<2, /* A1 Mode Select (A1 only) */
61 P_CLK_GATE_PEX_UNIT_ENA = 1<<1, /* Enable Gate PEX Unit Clock */
62 P_CLK_GATE_ROOT_COR_ENA = 1<<0, /* Enable Gate Root Core Clock */
63 P_ASPM_CONTROL_MSK = P_FORCE_ASPM_REQUEST | P_ASPM_GPHY_LINK_DOWN
64 | P_ASPM_CLKRUN_REQUEST | P_ASPM_INT_FIFO_EMPTY,
65};
66
40 67
41#define PCI_STATUS_ERROR_BITS (PCI_STATUS_DETECTED_PARITY | \ 68#define PCI_STATUS_ERROR_BITS (PCI_STATUS_DETECTED_PARITY | \
42 PCI_STATUS_SIG_SYSTEM_ERROR | \ 69 PCI_STATUS_SIG_SYSTEM_ERROR | \
@@ -507,6 +534,16 @@ enum {
507}; 534};
508#define Q_ADDR(reg, offs) (B8_Q_REGS + (reg) + (offs)) 535#define Q_ADDR(reg, offs) (B8_Q_REGS + (reg) + (offs))
509 536
537/* Q_F 32 bit Flag Register */
538enum {
539 F_ALM_FULL = 1<<27, /* Rx FIFO: almost full */
540 F_EMPTY = 1<<27, /* Tx FIFO: empty flag */
541 F_FIFO_EOF = 1<<26, /* Tag (EOF Flag) bit in FIFO */
542 F_WM_REACHED = 1<<25, /* Watermark reached */
543 F_M_RX_RAM_DIS = 1<<24, /* MAC Rx RAM Read Port disable */
544 F_FIFO_LEVEL = 0x1fL<<16, /* Bit 23..16: # of Qwords in FIFO */
545 F_WATER_MARK = 0x0007ffL, /* Bit 10.. 0: Watermark */
546};
510 547
511/* Queue Prefetch Unit Offsets, use Y2_QADDR() to address (Yukon-2 only)*/ 548/* Queue Prefetch Unit Offsets, use Y2_QADDR() to address (Yukon-2 only)*/
512enum { 549enum {
@@ -909,10 +946,12 @@ enum {
909 PHY_BCOM_ID1_C0 = 0x6044, 946 PHY_BCOM_ID1_C0 = 0x6044,
910 PHY_BCOM_ID1_C5 = 0x6047, 947 PHY_BCOM_ID1_C5 = 0x6047,
911 948
912 PHY_MARV_ID1_B0 = 0x0C23, /* Yukon (PHY 88E1011) */ 949 PHY_MARV_ID1_B0 = 0x0C23, /* Yukon (PHY 88E1011) */
913 PHY_MARV_ID1_B2 = 0x0C25, /* Yukon-Plus (PHY 88E1011) */ 950 PHY_MARV_ID1_B2 = 0x0C25, /* Yukon-Plus (PHY 88E1011) */
914 PHY_MARV_ID1_C2 = 0x0CC2, /* Yukon-EC (PHY 88E1111) */ 951 PHY_MARV_ID1_C2 = 0x0CC2, /* Yukon-EC (PHY 88E1111) */
915 PHY_MARV_ID1_Y2 = 0x0C91, /* Yukon-2 (PHY 88E1112) */ 952 PHY_MARV_ID1_Y2 = 0x0C91, /* Yukon-2 (PHY 88E1112) */
953 PHY_MARV_ID1_FE = 0x0C83, /* Yukon-FE (PHY 88E3082 Rev.A1) */
954 PHY_MARV_ID1_ECU= 0x0CB0, /* Yukon-ECU (PHY 88E1149 Rev.B2?) */
916}; 955};
917 956
918/* Advertisement register bits */ 957/* Advertisement register bits */
@@ -1837,8 +1876,9 @@ struct sky2_port {
1837struct sky2_hw { 1876struct sky2_hw {
1838 void __iomem *regs; 1877 void __iomem *regs;
1839 struct pci_dev *pdev; 1878 struct pci_dev *pdev;
1840 u32 intr_mask;
1841 struct net_device *dev[2]; 1879 struct net_device *dev[2];
1880 spinlock_t hw_lock;
1881 u32 intr_mask;
1842 1882
1843 int pm_cap; 1883 int pm_cap;
1844 int msi; 1884 int msi;
@@ -1912,4 +1952,25 @@ static inline void gma_set_addr(struct sky2_hw *hw, unsigned port, unsigned reg,
1912 gma_write16(hw, port, reg+4,(u16) addr[2] | ((u16) addr[3] << 8)); 1952 gma_write16(hw, port, reg+4,(u16) addr[2] | ((u16) addr[3] << 8));
1913 gma_write16(hw, port, reg+8,(u16) addr[4] | ((u16) addr[5] << 8)); 1953 gma_write16(hw, port, reg+8,(u16) addr[4] | ((u16) addr[5] << 8));
1914} 1954}
1955
1956/* PCI config space access */
1957static inline u32 sky2_pci_read32(const struct sky2_hw *hw, unsigned reg)
1958{
1959 return sky2_read32(hw, Y2_CFG_SPC + reg);
1960}
1961
1962static inline u16 sky2_pci_read16(const struct sky2_hw *hw, unsigned reg)
1963{
1964 return sky2_read16(hw, Y2_CFG_SPC + reg);
1965}
1966
1967static inline void sky2_pci_write32(struct sky2_hw *hw, unsigned reg, u32 val)
1968{
1969 sky2_write32(hw, Y2_CFG_SPC + reg, val);
1970}
1971
1972static inline void sky2_pci_write16(struct sky2_hw *hw, unsigned reg, u16 val)
1973{
1974 sky2_write16(hw, Y2_CFG_SPC + reg, val);
1975}
1915#endif 1976#endif