diff options
Diffstat (limited to 'drivers/net/sky2.h')
-rw-r--r-- | drivers/net/sky2.h | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/net/sky2.h b/drivers/net/sky2.h index c15d46409bcc..629d08f170fd 100644 --- a/drivers/net/sky2.h +++ b/drivers/net/sky2.h | |||
@@ -356,11 +356,11 @@ enum { | |||
356 | 356 | ||
357 | /* B2_Y2_CLK_GATE 8 bit Clock Gating (Yukon-2 only) */ | 357 | /* B2_Y2_CLK_GATE 8 bit Clock Gating (Yukon-2 only) */ |
358 | enum { | 358 | enum { |
359 | Y2_STATUS_LNK2_INAC = 1<<7, /* Status Link 2 inactiv (0 = activ) */ | 359 | Y2_STATUS_LNK2_INAC = 1<<7, /* Status Link 2 inactive (0 = active) */ |
360 | Y2_CLK_GAT_LNK2_DIS = 1<<6, /* Disable clock gating Link 2 */ | 360 | Y2_CLK_GAT_LNK2_DIS = 1<<6, /* Disable clock gating Link 2 */ |
361 | Y2_COR_CLK_LNK2_DIS = 1<<5, /* Disable Core clock Link 2 */ | 361 | Y2_COR_CLK_LNK2_DIS = 1<<5, /* Disable Core clock Link 2 */ |
362 | Y2_PCI_CLK_LNK2_DIS = 1<<4, /* Disable PCI clock Link 2 */ | 362 | Y2_PCI_CLK_LNK2_DIS = 1<<4, /* Disable PCI clock Link 2 */ |
363 | Y2_STATUS_LNK1_INAC = 1<<3, /* Status Link 1 inactiv (0 = activ) */ | 363 | Y2_STATUS_LNK1_INAC = 1<<3, /* Status Link 1 inactive (0 = active) */ |
364 | Y2_CLK_GAT_LNK1_DIS = 1<<2, /* Disable clock gating Link 1 */ | 364 | Y2_CLK_GAT_LNK1_DIS = 1<<2, /* Disable clock gating Link 1 */ |
365 | Y2_COR_CLK_LNK1_DIS = 1<<1, /* Disable Core clock Link 1 */ | 365 | Y2_COR_CLK_LNK1_DIS = 1<<1, /* Disable Core clock Link 1 */ |
366 | Y2_PCI_CLK_LNK1_DIS = 1<<0, /* Disable PCI clock Link 1 */ | 366 | Y2_PCI_CLK_LNK1_DIS = 1<<0, /* Disable PCI clock Link 1 */ |
@@ -410,7 +410,7 @@ enum { | |||
410 | #define RAM_ADR_RAN 0x0007ffffL /* Bit 18.. 0: RAM Address Range */ | 410 | #define RAM_ADR_RAN 0x0007ffffL /* Bit 18.. 0: RAM Address Range */ |
411 | /* RAM Interface Registers */ | 411 | /* RAM Interface Registers */ |
412 | 412 | ||
413 | /* B3_RI_CTRL 16 bit RAM Iface Control Register */ | 413 | /* B3_RI_CTRL 16 bit RAM Interface Control Register */ |
414 | enum { | 414 | enum { |
415 | RI_CLR_RD_PERR = 1<<9, /* Clear IRQ RAM Read Parity Err */ | 415 | RI_CLR_RD_PERR = 1<<9, /* Clear IRQ RAM Read Parity Err */ |
416 | RI_CLR_WR_PERR = 1<<8, /* Clear IRQ RAM Write Parity Err*/ | 416 | RI_CLR_WR_PERR = 1<<8, /* Clear IRQ RAM Write Parity Err*/ |
@@ -613,7 +613,7 @@ enum { | |||
613 | BMU_ENA_RX_CHKSUM = 1<<13, /* Enable Rx TCP/IP Checksum Check */ | 613 | BMU_ENA_RX_CHKSUM = 1<<13, /* Enable Rx TCP/IP Checksum Check */ |
614 | BMU_DIS_RX_CHKSUM = 1<<12, /* Disable Rx TCP/IP Checksum Check */ | 614 | BMU_DIS_RX_CHKSUM = 1<<12, /* Disable Rx TCP/IP Checksum Check */ |
615 | BMU_CLR_IRQ_PAR = 1<<11, /* Clear IRQ on Parity errors (Rx) */ | 615 | BMU_CLR_IRQ_PAR = 1<<11, /* Clear IRQ on Parity errors (Rx) */ |
616 | BMU_CLR_IRQ_TCP = 1<<11, /* Clear IRQ on TCP segmen. error (Tx) */ | 616 | BMU_CLR_IRQ_TCP = 1<<11, /* Clear IRQ on TCP segment. error (Tx) */ |
617 | BMU_CLR_IRQ_CHK = 1<<10, /* Clear IRQ Check */ | 617 | BMU_CLR_IRQ_CHK = 1<<10, /* Clear IRQ Check */ |
618 | BMU_STOP = 1<<9, /* Stop Rx/Tx Queue */ | 618 | BMU_STOP = 1<<9, /* Stop Rx/Tx Queue */ |
619 | BMU_START = 1<<8, /* Start Rx/Tx Queue */ | 619 | BMU_START = 1<<8, /* Start Rx/Tx Queue */ |
@@ -636,7 +636,7 @@ enum { | |||
636 | enum { | 636 | enum { |
637 | BMU_TX_IPIDINCR_ON = 1<<13, /* Enable IP ID Increment */ | 637 | BMU_TX_IPIDINCR_ON = 1<<13, /* Enable IP ID Increment */ |
638 | BMU_TX_IPIDINCR_OFF = 1<<12, /* Disable IP ID Increment */ | 638 | BMU_TX_IPIDINCR_OFF = 1<<12, /* Disable IP ID Increment */ |
639 | BMU_TX_CLR_IRQ_TCP = 1<<11, /* Clear IRQ on TCP segm. length mism. */ | 639 | BMU_TX_CLR_IRQ_TCP = 1<<11, /* Clear IRQ on TCP segment length mismatch */ |
640 | }; | 640 | }; |
641 | 641 | ||
642 | /* Queue Prefetch Unit Offsets, use Y2_QADDR() to address (Yukon-2 only)*/ | 642 | /* Queue Prefetch Unit Offsets, use Y2_QADDR() to address (Yukon-2 only)*/ |