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path: root/drivers/net/sky2.c
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-rw-r--r--drivers/net/sky2.c117
1 files changed, 60 insertions, 57 deletions
diff --git a/drivers/net/sky2.c b/drivers/net/sky2.c
index 842abd9396c6..fb1d2c30c1bb 100644
--- a/drivers/net/sky2.c
+++ b/drivers/net/sky2.c
@@ -100,33 +100,32 @@ module_param(idle_timeout, int, 0);
100MODULE_PARM_DESC(idle_timeout, "Watchdog timer for lost interrupts (ms)"); 100MODULE_PARM_DESC(idle_timeout, "Watchdog timer for lost interrupts (ms)");
101 101
102static const struct pci_device_id sky2_id_table[] = { 102static const struct pci_device_id sky2_id_table[] = {
103 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9000) }, 103 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9000) }, /* SK-9Sxx */
104 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9E00) }, 104 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9E00) }, /* SK-9Exx */
105 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4b00) }, /* DGE-560T */ 105 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4b00) }, /* DGE-560T */
106 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4001) }, /* DGE-550SX */ 106 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4001) }, /* DGE-550SX */
107 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4B02) }, /* DGE-560SX */ 107 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4B02) }, /* DGE-560SX */
108 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4340) }, 108 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4340) }, /* 88E8021 */
109 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4341) }, 109 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4341) }, /* 88E8022 */
110 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4342) }, 110 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4342) }, /* 88E8061 */
111 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4343) }, 111 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4343) }, /* 88E8062 */
112 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4344) }, 112 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4344) }, /* 88E8021 */
113 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4345) }, 113 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4345) }, /* 88E8022 */
114 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4346) }, 114 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4346) }, /* 88E8061 */
115 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4347) }, 115 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4347) }, /* 88E8062 */
116 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4350) }, 116 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4350) }, /* 88E8035 */
117 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4351) }, 117 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4351) }, /* 88E8036 */
118 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4352) }, 118 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4352) }, /* 88E8038 */
119 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4353) }, 119 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4353) }, /* 88E8039 */
120 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4360) }, 120 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4356) }, /* 88EC033 */
121 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4361) }, 121 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4360) }, /* 88E8052 */
122 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4362) }, 122 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4361) }, /* 88E8050 */
123 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4363) }, 123 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4362) }, /* 88E8053 */
124 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4364) }, 124 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4363) }, /* 88E8055 */
125 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4365) }, 125 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4364) }, /* 88E8056 */
126 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4366) }, 126 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4366) }, /* 88EC036 */
127 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4367) }, 127 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4367) }, /* 88EC032 */
128 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4368) }, 128 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4368) }, /* 88EC034 */
129 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4369) },
130 { 0 } 129 { 0 }
131}; 130};
132 131
@@ -522,7 +521,7 @@ static void sky2_phy_init(struct sky2_hw *hw, unsigned port)
522 /* set Tx LED (LED_TX) to blink mode on Rx OR Tx activity */ 521 /* set Tx LED (LED_TX) to blink mode on Rx OR Tx activity */
523 ledctrl |= PHY_M_LED_BLINK_RT(BLINK_84MS) | PHY_M_LEDC_TX_CTRL; 522 ledctrl |= PHY_M_LED_BLINK_RT(BLINK_84MS) | PHY_M_LEDC_TX_CTRL;
524 /* turn off the Rx LED (LED_RX) */ 523 /* turn off the Rx LED (LED_RX) */
525 ledover |= PHY_M_LED_MO_RX(MO_LED_OFF); 524 ledover &= ~PHY_M_LED_MO_RX;
526 } 525 }
527 526
528 if (hw->chip_id == CHIP_ID_YUKON_EC_U && hw->chip_rev == CHIP_REV_YU_EC_A1) { 527 if (hw->chip_id == CHIP_ID_YUKON_EC_U && hw->chip_rev == CHIP_REV_YU_EC_A1) {
@@ -545,7 +544,7 @@ static void sky2_phy_init(struct sky2_hw *hw, unsigned port)
545 544
546 if (sky2->autoneg == AUTONEG_DISABLE || sky2->speed == SPEED_100) { 545 if (sky2->autoneg == AUTONEG_DISABLE || sky2->speed == SPEED_100) {
547 /* turn on 100 Mbps LED (LED_LINK100) */ 546 /* turn on 100 Mbps LED (LED_LINK100) */
548 ledover |= PHY_M_LED_MO_100(MO_LED_ON); 547 ledover |= PHY_M_LED_MO_100;
549 } 548 }
550 549
551 if (ledover) 550 if (ledover)
@@ -697,10 +696,15 @@ static void sky2_mac_init(struct sky2_hw *hw, unsigned port)
697 696
698} 697}
699 698
700/* Assign Ram Buffer allocation in units of 64bit (8 bytes) */ 699/* Assign Ram Buffer allocation to queue */
701static void sky2_ramset(struct sky2_hw *hw, u16 q, u32 start, u32 end) 700static void sky2_ramset(struct sky2_hw *hw, u16 q, u32 start, u32 space)
702{ 701{
703 pr_debug(PFX "q %d %#x %#x\n", q, start, end); 702 u32 end;
703
704 /* convert from K bytes to qwords used for hw register */
705 start *= 1024/8;
706 space *= 1024/8;
707 end = start + space - 1;
704 708
705 sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_RST_CLR); 709 sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_RST_CLR);
706 sky2_write32(hw, RB_ADDR(q, RB_START), start); 710 sky2_write32(hw, RB_ADDR(q, RB_START), start);
@@ -709,7 +713,6 @@ static void sky2_ramset(struct sky2_hw *hw, u16 q, u32 start, u32 end)
709 sky2_write32(hw, RB_ADDR(q, RB_RP), start); 713 sky2_write32(hw, RB_ADDR(q, RB_RP), start);
710 714
711 if (q == Q_R1 || q == Q_R2) { 715 if (q == Q_R1 || q == Q_R2) {
712 u32 space = end - start + 1;
713 u32 tp = space - space/4; 716 u32 tp = space - space/4;
714 717
715 /* On receive queue's set the thresholds 718 /* On receive queue's set the thresholds
@@ -1059,11 +1062,16 @@ static int sky2_rx_start(struct sky2_port *sky2)
1059 sky2->rx_put = sky2->rx_next = 0; 1062 sky2->rx_put = sky2->rx_next = 0;
1060 sky2_qset(hw, rxq); 1063 sky2_qset(hw, rxq);
1061 1064
1065 /* On PCI express lowering the watermark gives better performance */
1066 if (pci_find_capability(hw->pdev, PCI_CAP_ID_EXP))
1067 sky2_write32(hw, Q_ADDR(rxq, Q_WM), BMU_WM_PEX);
1068
1069 /* These chips have no ram buffer?
1070 * MAC Rx RAM Read is controlled by hardware */
1062 if (hw->chip_id == CHIP_ID_YUKON_EC_U && 1071 if (hw->chip_id == CHIP_ID_YUKON_EC_U &&
1063 (hw->chip_rev == CHIP_REV_YU_EC_U_A1 || hw->chip_rev == CHIP_REV_YU_EC_U_B0)) { 1072 (hw->chip_rev == CHIP_REV_YU_EC_U_A1
1064 /* MAC Rx RAM Read is controlled by hardware */ 1073 || hw->chip_rev == CHIP_REV_YU_EC_U_B0))
1065 sky2_write32(hw, Q_ADDR(rxq, Q_F), F_M_RX_RAM_DIS); 1074 sky2_write32(hw, Q_ADDR(rxq, Q_F), F_M_RX_RAM_DIS);
1066 }
1067 1075
1068 sky2_prefetch_init(hw, rxq, sky2->rx_le_map, RX_LE_SIZE - 1); 1076 sky2_prefetch_init(hw, rxq, sky2->rx_le_map, RX_LE_SIZE - 1);
1069 1077
@@ -1139,7 +1147,7 @@ static int sky2_up(struct net_device *dev)
1139 struct sky2_port *sky2 = netdev_priv(dev); 1147 struct sky2_port *sky2 = netdev_priv(dev);
1140 struct sky2_hw *hw = sky2->hw; 1148 struct sky2_hw *hw = sky2->hw;
1141 unsigned port = sky2->port; 1149 unsigned port = sky2->port;
1142 u32 ramsize, rxspace, imask; 1150 u32 ramsize, imask;
1143 int cap, err = -ENOMEM; 1151 int cap, err = -ENOMEM;
1144 struct net_device *otherdev = hw->dev[sky2->port^1]; 1152 struct net_device *otherdev = hw->dev[sky2->port^1];
1145 1153
@@ -1192,20 +1200,25 @@ static int sky2_up(struct net_device *dev)
1192 1200
1193 sky2_mac_init(hw, port); 1201 sky2_mac_init(hw, port);
1194 1202
1195 /* Determine available ram buffer space in qwords. */ 1203 /* Register is number of 4K blocks on internal RAM buffer. */
1196 ramsize = sky2_read8(hw, B2_E_0) * 4096/8; 1204 ramsize = sky2_read8(hw, B2_E_0) * 4;
1205 printk(KERN_INFO PFX "%s: ram buffer %dK\n", dev->name, ramsize);
1197 1206
1198 if (ramsize > 6*1024/8) 1207 if (ramsize > 0) {
1199 rxspace = ramsize - (ramsize + 2) / 3; 1208 u32 rxspace;
1200 else
1201 rxspace = ramsize / 2;
1202 1209
1203 sky2_ramset(hw, rxqaddr[port], 0, rxspace-1); 1210 if (ramsize < 16)
1204 sky2_ramset(hw, txqaddr[port], rxspace, ramsize-1); 1211 rxspace = ramsize / 2;
1212 else
1213 rxspace = 8 + (2*(ramsize - 16))/3;
1214
1215 sky2_ramset(hw, rxqaddr[port], 0, rxspace);
1216 sky2_ramset(hw, txqaddr[port], rxspace, ramsize - rxspace);
1205 1217
1206 /* Make sure SyncQ is disabled */ 1218 /* Make sure SyncQ is disabled */
1207 sky2_write8(hw, RB_ADDR(port == 0 ? Q_XS1 : Q_XS2, RB_CTRL), 1219 sky2_write8(hw, RB_ADDR(port == 0 ? Q_XS1 : Q_XS2, RB_CTRL),
1208 RB_RST_SET); 1220 RB_RST_SET);
1221 }
1209 1222
1210 sky2_qset(hw, txqaddr[port]); 1223 sky2_qset(hw, txqaddr[port]);
1211 1224
@@ -2917,18 +2930,8 @@ static void sky2_led(struct sky2_hw *hw, unsigned port, int on)
2917 2930
2918 default: 2931 default:
2919 gm_phy_write(hw, port, PHY_MARV_LED_CTRL, 0); 2932 gm_phy_write(hw, port, PHY_MARV_LED_CTRL, 0);
2920 gm_phy_write(hw, port, PHY_MARV_LED_OVER, 2933 gm_phy_write(hw, port, PHY_MARV_LED_OVER,
2921 on ? PHY_M_LED_MO_DUP(MO_LED_ON) | 2934 on ? PHY_M_LED_ALL : 0);
2922 PHY_M_LED_MO_10(MO_LED_ON) |
2923 PHY_M_LED_MO_100(MO_LED_ON) |
2924 PHY_M_LED_MO_1000(MO_LED_ON) |
2925 PHY_M_LED_MO_RX(MO_LED_ON)
2926 : PHY_M_LED_MO_DUP(MO_LED_OFF) |
2927 PHY_M_LED_MO_10(MO_LED_OFF) |
2928 PHY_M_LED_MO_100(MO_LED_OFF) |
2929 PHY_M_LED_MO_1000(MO_LED_OFF) |
2930 PHY_M_LED_MO_RX(MO_LED_OFF));
2931
2932 } 2935 }
2933} 2936}
2934 2937