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path: root/drivers/net/sky2.c
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Diffstat (limited to 'drivers/net/sky2.c')
-rw-r--r--drivers/net/sky2.c313
1 files changed, 155 insertions, 158 deletions
diff --git a/drivers/net/sky2.c b/drivers/net/sky2.c
index cae2edf23004..73260364cba3 100644
--- a/drivers/net/sky2.c
+++ b/drivers/net/sky2.c
@@ -74,7 +74,7 @@
74#define TX_RING_SIZE 512 74#define TX_RING_SIZE 512
75#define TX_DEF_PENDING (TX_RING_SIZE - 1) 75#define TX_DEF_PENDING (TX_RING_SIZE - 1)
76#define TX_MIN_PENDING 64 76#define TX_MIN_PENDING 64
77#define MAX_SKB_TX_LE (4 + 2*MAX_SKB_FRAGS) 77#define MAX_SKB_TX_LE (4 + (sizeof(dma_addr_t)/sizeof(u32))*MAX_SKB_FRAGS)
78 78
79#define STATUS_RING_SIZE 2048 /* 2 ports * (TX + 2*RX) */ 79#define STATUS_RING_SIZE 2048 /* 2 ports * (TX + 2*RX) */
80#define STATUS_LE_BYTES (STATUS_RING_SIZE*sizeof(struct sky2_status_le)) 80#define STATUS_LE_BYTES (STATUS_RING_SIZE*sizeof(struct sky2_status_le))
@@ -96,10 +96,6 @@ static int copybreak __read_mostly = 256;
96module_param(copybreak, int, 0); 96module_param(copybreak, int, 0);
97MODULE_PARM_DESC(copybreak, "Receive copy threshold"); 97MODULE_PARM_DESC(copybreak, "Receive copy threshold");
98 98
99static int disable_msi = 0;
100module_param(disable_msi, int, 0);
101MODULE_PARM_DESC(disable_msi, "Disable Message Signaled Interrupt (MSI)");
102
103static const struct pci_device_id sky2_id_table[] = { 99static const struct pci_device_id sky2_id_table[] = {
104 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9000) }, 100 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9000) },
105 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9E00) }, 101 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9E00) },
@@ -195,11 +191,11 @@ static int sky2_set_power_state(struct sky2_hw *hw, pci_power_t state)
195 pr_debug("sky2_set_power_state %d\n", state); 191 pr_debug("sky2_set_power_state %d\n", state);
196 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON); 192 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
197 193
198 pci_read_config_word(hw->pdev, hw->pm_cap + PCI_PM_PMC, &power_control); 194 power_control = sky2_pci_read16(hw, hw->pm_cap + PCI_PM_PMC);
199 vaux = (sky2_read16(hw, B0_CTST) & Y2_VAUX_AVAIL) && 195 vaux = (sky2_read16(hw, B0_CTST) & Y2_VAUX_AVAIL) &&
200 (power_control & PCI_PM_CAP_PME_D3cold); 196 (power_control & PCI_PM_CAP_PME_D3cold);
201 197
202 pci_read_config_word(hw->pdev, hw->pm_cap + PCI_PM_CTRL, &power_control); 198 power_control = sky2_pci_read16(hw, hw->pm_cap + PCI_PM_CTRL);
203 199
204 power_control |= PCI_PM_CTRL_PME_STATUS; 200 power_control |= PCI_PM_CTRL_PME_STATUS;
205 power_control &= ~(PCI_PM_CTRL_STATE_MASK); 201 power_control &= ~(PCI_PM_CTRL_STATE_MASK);
@@ -223,7 +219,7 @@ static int sky2_set_power_state(struct sky2_hw *hw, pci_power_t state)
223 sky2_write8(hw, B2_Y2_CLK_GATE, 0); 219 sky2_write8(hw, B2_Y2_CLK_GATE, 0);
224 220
225 /* Turn off phy power saving */ 221 /* Turn off phy power saving */
226 pci_read_config_dword(hw->pdev, PCI_DEV_REG1, &reg1); 222 reg1 = sky2_pci_read32(hw, PCI_DEV_REG1);
227 reg1 &= ~(PCI_Y2_PHY1_POWD | PCI_Y2_PHY2_POWD); 223 reg1 &= ~(PCI_Y2_PHY1_POWD | PCI_Y2_PHY2_POWD);
228 224
229 /* looks like this XL is back asswards .. */ 225 /* looks like this XL is back asswards .. */
@@ -232,18 +228,28 @@ static int sky2_set_power_state(struct sky2_hw *hw, pci_power_t state)
232 if (hw->ports > 1) 228 if (hw->ports > 1)
233 reg1 |= PCI_Y2_PHY2_COMA; 229 reg1 |= PCI_Y2_PHY2_COMA;
234 } 230 }
235 pci_write_config_dword(hw->pdev, PCI_DEV_REG1, reg1); 231
232 if (hw->chip_id == CHIP_ID_YUKON_EC_U) {
233 sky2_pci_write32(hw, PCI_DEV_REG3, 0);
234 reg1 = sky2_pci_read32(hw, PCI_DEV_REG4);
235 reg1 &= P_ASPM_CONTROL_MSK;
236 sky2_pci_write32(hw, PCI_DEV_REG4, reg1);
237 sky2_pci_write32(hw, PCI_DEV_REG5, 0);
238 }
239
240 sky2_pci_write32(hw, PCI_DEV_REG1, reg1);
241
236 break; 242 break;
237 243
238 case PCI_D3hot: 244 case PCI_D3hot:
239 case PCI_D3cold: 245 case PCI_D3cold:
240 /* Turn on phy power saving */ 246 /* Turn on phy power saving */
241 pci_read_config_dword(hw->pdev, PCI_DEV_REG1, &reg1); 247 reg1 = sky2_pci_read32(hw, PCI_DEV_REG1);
242 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1) 248 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1)
243 reg1 &= ~(PCI_Y2_PHY1_POWD | PCI_Y2_PHY2_POWD); 249 reg1 &= ~(PCI_Y2_PHY1_POWD | PCI_Y2_PHY2_POWD);
244 else 250 else
245 reg1 |= (PCI_Y2_PHY1_POWD | PCI_Y2_PHY2_POWD); 251 reg1 |= (PCI_Y2_PHY1_POWD | PCI_Y2_PHY2_POWD);
246 pci_write_config_dword(hw->pdev, PCI_DEV_REG1, reg1); 252 sky2_pci_write32(hw, PCI_DEV_REG1, reg1);
247 253
248 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1) 254 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1)
249 sky2_write8(hw, B2_Y2_CLK_GATE, 0); 255 sky2_write8(hw, B2_Y2_CLK_GATE, 0);
@@ -265,7 +271,7 @@ static int sky2_set_power_state(struct sky2_hw *hw, pci_power_t state)
265 ret = -1; 271 ret = -1;
266 } 272 }
267 273
268 pci_write_config_byte(hw->pdev, hw->pm_cap + PCI_PM_CTRL, power_control); 274 sky2_pci_write16(hw, hw->pm_cap + PCI_PM_CTRL, power_control);
269 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF); 275 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
270 return ret; 276 return ret;
271} 277}
@@ -463,16 +469,31 @@ static void sky2_phy_init(struct sky2_hw *hw, unsigned port)
463 ledover |= PHY_M_LED_MO_RX(MO_LED_OFF); 469 ledover |= PHY_M_LED_MO_RX(MO_LED_OFF);
464 } 470 }
465 471
466 gm_phy_write(hw, port, PHY_MARV_LED_CTRL, ledctrl); 472 if (hw->chip_id == CHIP_ID_YUKON_EC_U && hw->chip_rev >= 2) {
473 /* apply fixes in PHY AFE */
474 gm_phy_write(hw, port, 22, 255);
475 /* increase differential signal amplitude in 10BASE-T */
476 gm_phy_write(hw, port, 24, 0xaa99);
477 gm_phy_write(hw, port, 23, 0x2011);
467 478
468 if (sky2->autoneg == AUTONEG_DISABLE || sky2->speed == SPEED_100) { 479 /* fix for IEEE A/B Symmetry failure in 1000BASE-T */
469 /* turn on 100 Mbps LED (LED_LINK100) */ 480 gm_phy_write(hw, port, 24, 0xa204);
470 ledover |= PHY_M_LED_MO_100(MO_LED_ON); 481 gm_phy_write(hw, port, 23, 0x2002);
471 }
472 482
473 if (ledover) 483 /* set page register to 0 */
474 gm_phy_write(hw, port, PHY_MARV_LED_OVER, ledover); 484 gm_phy_write(hw, port, 22, 0);
485 } else {
486 gm_phy_write(hw, port, PHY_MARV_LED_CTRL, ledctrl);
487
488 if (sky2->autoneg == AUTONEG_DISABLE || sky2->speed == SPEED_100) {
489 /* turn on 100 Mbps LED (LED_LINK100) */
490 ledover |= PHY_M_LED_MO_100(MO_LED_ON);
491 }
492
493 if (ledover)
494 gm_phy_write(hw, port, PHY_MARV_LED_OVER, ledover);
475 495
496 }
476 /* Enable phy interrupt on auto-negotiation complete (or link up) */ 497 /* Enable phy interrupt on auto-negotiation complete (or link up) */
477 if (sky2->autoneg == AUTONEG_ENABLE) 498 if (sky2->autoneg == AUTONEG_ENABLE)
478 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_IS_AN_COMPL); 499 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_IS_AN_COMPL);
@@ -520,10 +541,16 @@ static void sky2_mac_init(struct sky2_hw *hw, unsigned port)
520 541
521 switch (sky2->speed) { 542 switch (sky2->speed) {
522 case SPEED_1000: 543 case SPEED_1000:
544 reg &= ~GM_GPCR_SPEED_100;
523 reg |= GM_GPCR_SPEED_1000; 545 reg |= GM_GPCR_SPEED_1000;
524 /* fallthru */ 546 break;
525 case SPEED_100: 547 case SPEED_100:
548 reg &= ~GM_GPCR_SPEED_1000;
526 reg |= GM_GPCR_SPEED_100; 549 reg |= GM_GPCR_SPEED_100;
550 break;
551 case SPEED_10:
552 reg &= ~(GM_GPCR_SPEED_1000 | GM_GPCR_SPEED_100);
553 break;
527 } 554 }
528 555
529 if (sky2->duplex == DUPLEX_FULL) 556 if (sky2->duplex == DUPLEX_FULL)
@@ -595,8 +622,8 @@ static void sky2_mac_init(struct sky2_hw *hw, unsigned port)
595 622
596 /* Configure Rx MAC FIFO */ 623 /* Configure Rx MAC FIFO */
597 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_CLR); 624 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_CLR);
598 sky2_write16(hw, SK_REG(port, RX_GMF_CTRL_T), 625 sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T),
599 GMF_RX_CTRL_DEF); 626 GMF_OPER_ON | GMF_RX_F_FL_ON);
600 627
601 /* Flush Rx MAC FIFO on any flow control or error */ 628 /* Flush Rx MAC FIFO on any flow control or error */
602 sky2_write16(hw, SK_REG(port, RX_GMF_FL_MSK), GMR_FS_ANY_ERR); 629 sky2_write16(hw, SK_REG(port, RX_GMF_FL_MSK), GMR_FS_ANY_ERR);
@@ -947,6 +974,12 @@ static int sky2_rx_start(struct sky2_port *sky2)
947 974
948 sky2->rx_put = sky2->rx_next = 0; 975 sky2->rx_put = sky2->rx_next = 0;
949 sky2_qset(hw, rxq); 976 sky2_qset(hw, rxq);
977
978 if (hw->chip_id == CHIP_ID_YUKON_EC_U && hw->chip_rev >= 2) {
979 /* MAC Rx RAM Read is controlled by hardware */
980 sky2_write32(hw, Q_ADDR(rxq, Q_F), F_M_RX_RAM_DIS);
981 }
982
950 sky2_prefetch_init(hw, rxq, sky2->rx_le_map, RX_LE_SIZE - 1); 983 sky2_prefetch_init(hw, rxq, sky2->rx_le_map, RX_LE_SIZE - 1);
951 984
952 rx_set_checksum(sky2); 985 rx_set_checksum(sky2);
@@ -962,6 +995,10 @@ static int sky2_rx_start(struct sky2_port *sky2)
962 sky2_rx_add(sky2, re->mapaddr); 995 sky2_rx_add(sky2, re->mapaddr);
963 } 996 }
964 997
998 /* Truncate oversize frames */
999 sky2_write16(hw, SK_REG(sky2->port, RX_GMF_TR_THR), sky2->rx_bufsize - 8);
1000 sky2_write32(hw, SK_REG(sky2->port, RX_GMF_CTRL_T), RX_TRUNC_ON);
1001
965 /* Tell chip about available buffers */ 1002 /* Tell chip about available buffers */
966 sky2_write16(hw, Y2_QADDR(rxq, PREF_UNIT_PUT_IDX), sky2->rx_put); 1003 sky2_write16(hw, Y2_QADDR(rxq, PREF_UNIT_PUT_IDX), sky2->rx_put);
967 sky2->rx_last_put = sky2_read16(hw, Y2_QADDR(rxq, PREF_UNIT_PUT_IDX)); 1004 sky2->rx_last_put = sky2_read16(hw, Y2_QADDR(rxq, PREF_UNIT_PUT_IDX));
@@ -1029,9 +1066,10 @@ static int sky2_up(struct net_device *dev)
1029 RB_RST_SET); 1066 RB_RST_SET);
1030 1067
1031 sky2_qset(hw, txqaddr[port]); 1068 sky2_qset(hw, txqaddr[port]);
1032 if (hw->chip_id == CHIP_ID_YUKON_EC_U)
1033 sky2_write16(hw, Q_ADDR(txqaddr[port], Q_AL), 0x1a0);
1034 1069
1070 /* Set almost empty threshold */
1071 if (hw->chip_id == CHIP_ID_YUKON_EC_U && hw->chip_rev == 1)
1072 sky2_write16(hw, Q_ADDR(txqaddr[port], Q_AL), 0x1a0);
1035 1073
1036 sky2_prefetch_init(hw, txqaddr[port], sky2->tx_le_map, 1074 sky2_prefetch_init(hw, txqaddr[port], sky2->tx_le_map,
1037 TX_RING_SIZE - 1); 1075 TX_RING_SIZE - 1);
@@ -1041,8 +1079,10 @@ static int sky2_up(struct net_device *dev)
1041 goto err_out; 1079 goto err_out;
1042 1080
1043 /* Enable interrupts from phy/mac for port */ 1081 /* Enable interrupts from phy/mac for port */
1082 spin_lock_irq(&hw->hw_lock);
1044 hw->intr_mask |= (port == 0) ? Y2_IS_PORT_1 : Y2_IS_PORT_2; 1083 hw->intr_mask |= (port == 0) ? Y2_IS_PORT_1 : Y2_IS_PORT_2;
1045 sky2_write32(hw, B0_IMSK, hw->intr_mask); 1084 sky2_write32(hw, B0_IMSK, hw->intr_mask);
1085 spin_unlock_irq(&hw->hw_lock);
1046 return 0; 1086 return 0;
1047 1087
1048err_out: 1088err_out:
@@ -1109,6 +1149,7 @@ static int sky2_xmit_frame(struct sk_buff *skb, struct net_device *dev)
1109 struct sky2_tx_le *le = NULL; 1149 struct sky2_tx_le *le = NULL;
1110 struct tx_ring_info *re; 1150 struct tx_ring_info *re;
1111 unsigned i, len; 1151 unsigned i, len;
1152 int avail;
1112 dma_addr_t mapping; 1153 dma_addr_t mapping;
1113 u32 addr64; 1154 u32 addr64;
1114 u16 mss; 1155 u16 mss;
@@ -1251,12 +1292,16 @@ static int sky2_xmit_frame(struct sk_buff *skb, struct net_device *dev)
1251 re->idx = sky2->tx_prod; 1292 re->idx = sky2->tx_prod;
1252 le->ctrl |= EOP; 1293 le->ctrl |= EOP;
1253 1294
1295 avail = tx_avail(sky2);
1296 if (mss != 0 || avail < TX_MIN_PENDING) {
1297 le->ctrl |= FRC_STAT;
1298 if (avail <= MAX_SKB_TX_LE)
1299 netif_stop_queue(dev);
1300 }
1301
1254 sky2_put_idx(hw, txqaddr[sky2->port], sky2->tx_prod, 1302 sky2_put_idx(hw, txqaddr[sky2->port], sky2->tx_prod,
1255 &sky2->tx_last_put, TX_RING_SIZE); 1303 &sky2->tx_last_put, TX_RING_SIZE);
1256 1304
1257 if (tx_avail(sky2) <= MAX_SKB_TX_LE)
1258 netif_stop_queue(dev);
1259
1260out_unlock: 1305out_unlock:
1261 spin_unlock(&sky2->tx_lock); 1306 spin_unlock(&sky2->tx_lock);
1262 1307
@@ -1342,10 +1387,10 @@ static int sky2_down(struct net_device *dev)
1342 netif_stop_queue(dev); 1387 netif_stop_queue(dev);
1343 1388
1344 /* Disable port IRQ */ 1389 /* Disable port IRQ */
1345 local_irq_disable(); 1390 spin_lock_irq(&hw->hw_lock);
1346 hw->intr_mask &= ~((sky2->port == 0) ? Y2_IS_IRQ_PHY1 : Y2_IS_IRQ_PHY2); 1391 hw->intr_mask &= ~((sky2->port == 0) ? Y2_IS_IRQ_PHY1 : Y2_IS_IRQ_PHY2);
1347 sky2_write32(hw, B0_IMSK, hw->intr_mask); 1392 sky2_write32(hw, B0_IMSK, hw->intr_mask);
1348 local_irq_enable(); 1393 spin_unlock_irq(&hw->hw_lock);
1349 1394
1350 flush_scheduled_work(); 1395 flush_scheduled_work();
1351 1396
@@ -1446,6 +1491,29 @@ static void sky2_link_up(struct sky2_port *sky2)
1446 sky2_write8(hw, SK_REG(port, GMAC_IRQ_MSK), GMAC_DEF_MSK); 1491 sky2_write8(hw, SK_REG(port, GMAC_IRQ_MSK), GMAC_DEF_MSK);
1447 1492
1448 reg = gma_read16(hw, port, GM_GP_CTRL); 1493 reg = gma_read16(hw, port, GM_GP_CTRL);
1494 if (sky2->autoneg == AUTONEG_DISABLE) {
1495 reg |= GM_GPCR_AU_ALL_DIS;
1496
1497 /* Is write/read necessary? Copied from sky2_mac_init */
1498 gma_write16(hw, port, GM_GP_CTRL, reg);
1499 gma_read16(hw, port, GM_GP_CTRL);
1500
1501 switch (sky2->speed) {
1502 case SPEED_1000:
1503 reg &= ~GM_GPCR_SPEED_100;
1504 reg |= GM_GPCR_SPEED_1000;
1505 break;
1506 case SPEED_100:
1507 reg &= ~GM_GPCR_SPEED_1000;
1508 reg |= GM_GPCR_SPEED_100;
1509 break;
1510 case SPEED_10:
1511 reg &= ~(GM_GPCR_SPEED_1000 | GM_GPCR_SPEED_100);
1512 break;
1513 }
1514 } else
1515 reg &= ~GM_GPCR_AU_ALL_DIS;
1516
1449 if (sky2->duplex == DUPLEX_FULL || sky2->autoneg == AUTONEG_ENABLE) 1517 if (sky2->duplex == DUPLEX_FULL || sky2->autoneg == AUTONEG_ENABLE)
1450 reg |= GM_GPCR_DUP_FULL; 1518 reg |= GM_GPCR_DUP_FULL;
1451 1519
@@ -1604,10 +1672,10 @@ static void sky2_phy_task(void *arg)
1604out: 1672out:
1605 up(&sky2->phy_sema); 1673 up(&sky2->phy_sema);
1606 1674
1607 local_irq_disable(); 1675 spin_lock_irq(&hw->hw_lock);
1608 hw->intr_mask |= (sky2->port == 0) ? Y2_IS_IRQ_PHY1 : Y2_IS_IRQ_PHY2; 1676 hw->intr_mask |= (sky2->port == 0) ? Y2_IS_IRQ_PHY1 : Y2_IS_IRQ_PHY2;
1609 sky2_write32(hw, B0_IMSK, hw->intr_mask); 1677 sky2_write32(hw, B0_IMSK, hw->intr_mask);
1610 local_irq_enable(); 1678 spin_unlock_irq(&hw->hw_lock);
1611} 1679}
1612 1680
1613 1681
@@ -1648,10 +1716,12 @@ static void sky2_tx_timeout(struct net_device *dev)
1648 1716
1649 1717
1650#define roundup(x, y) ((((x)+((y)-1))/(y))*(y)) 1718#define roundup(x, y) ((((x)+((y)-1))/(y))*(y))
1651/* Want receive buffer size to be multiple of 64 bits, and incl room for vlan */ 1719/* Want receive buffer size to be multiple of 64 bits
1720 * and incl room for vlan and truncation
1721 */
1652static inline unsigned sky2_buf_size(int mtu) 1722static inline unsigned sky2_buf_size(int mtu)
1653{ 1723{
1654 return roundup(mtu + ETH_HLEN + 4, 8); 1724 return roundup(mtu + ETH_HLEN + VLAN_HLEN, 8) + 8;
1655} 1725}
1656 1726
1657static int sky2_change_mtu(struct net_device *dev, int new_mtu) 1727static int sky2_change_mtu(struct net_device *dev, int new_mtu)
@@ -1734,7 +1804,7 @@ static struct sk_buff *sky2_receive(struct sky2_port *sky2,
1734 if (!(status & GMR_FS_RX_OK)) 1804 if (!(status & GMR_FS_RX_OK))
1735 goto resubmit; 1805 goto resubmit;
1736 1806
1737 if ((status >> 16) != length || length > sky2->rx_bufsize) 1807 if (length > sky2->netdev->mtu + ETH_HLEN)
1738 goto oversize; 1808 goto oversize;
1739 1809
1740 if (length < copybreak) { 1810 if (length < copybreak) {
@@ -1834,6 +1904,17 @@ static int sky2_poll(struct net_device *dev0, int *budget)
1834 1904
1835 sky2_write32(hw, STAT_CTRL, SC_STAT_CLR_IRQ); 1905 sky2_write32(hw, STAT_CTRL, SC_STAT_CLR_IRQ);
1836 1906
1907 /*
1908 * Kick the STAT_LEV_TIMER_CTRL timer.
1909 * This fixes my hangs on Yukon-EC (0xb6) rev 1.
1910 * The if clause is there to start the timer only if it has been
1911 * configured correctly and not been disabled via ethtool.
1912 */
1913 if (sky2_read8(hw, STAT_LEV_TIMER_CTRL) == TIM_START) {
1914 sky2_write8(hw, STAT_LEV_TIMER_CTRL, TIM_STOP);
1915 sky2_write8(hw, STAT_LEV_TIMER_CTRL, TIM_START);
1916 }
1917
1837 hwidx = sky2_read16(hw, STAT_PUT_IDX); 1918 hwidx = sky2_read16(hw, STAT_PUT_IDX);
1838 BUG_ON(hwidx >= STATUS_RING_SIZE); 1919 BUG_ON(hwidx >= STATUS_RING_SIZE);
1839 rmb(); 1920 rmb();
@@ -1916,16 +1997,19 @@ exit_loop:
1916 sky2_tx_check(hw, 0, tx_done[0]); 1997 sky2_tx_check(hw, 0, tx_done[0]);
1917 sky2_tx_check(hw, 1, tx_done[1]); 1998 sky2_tx_check(hw, 1, tx_done[1]);
1918 1999
2000 if (sky2_read8(hw, STAT_TX_TIMER_CTRL) == TIM_START) {
2001 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_STOP);
2002 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_START);
2003 }
2004
1919 if (likely(work_done < to_do)) { 2005 if (likely(work_done < to_do)) {
1920 /* need to restart TX timer */ 2006 spin_lock_irq(&hw->hw_lock);
1921 if (is_ec_a1(hw)) { 2007 __netif_rx_complete(dev0);
1922 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_STOP);
1923 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_START);
1924 }
1925 2008
1926 netif_rx_complete(dev0);
1927 hw->intr_mask |= Y2_IS_STAT_BMU; 2009 hw->intr_mask |= Y2_IS_STAT_BMU;
1928 sky2_write32(hw, B0_IMSK, hw->intr_mask); 2010 sky2_write32(hw, B0_IMSK, hw->intr_mask);
2011 spin_unlock_irq(&hw->hw_lock);
2012
1929 return 0; 2013 return 0;
1930 } else { 2014 } else {
1931 *budget -= work_done; 2015 *budget -= work_done;
@@ -1988,13 +2072,13 @@ static void sky2_hw_intr(struct sky2_hw *hw)
1988 if (status & (Y2_IS_MST_ERR | Y2_IS_IRQ_STAT)) { 2072 if (status & (Y2_IS_MST_ERR | Y2_IS_IRQ_STAT)) {
1989 u16 pci_err; 2073 u16 pci_err;
1990 2074
1991 pci_read_config_word(hw->pdev, PCI_STATUS, &pci_err); 2075 pci_err = sky2_pci_read16(hw, PCI_STATUS);
1992 if (net_ratelimit()) 2076 if (net_ratelimit())
1993 printk(KERN_ERR PFX "%s: pci hw error (0x%x)\n", 2077 printk(KERN_ERR PFX "%s: pci hw error (0x%x)\n",
1994 pci_name(hw->pdev), pci_err); 2078 pci_name(hw->pdev), pci_err);
1995 2079
1996 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON); 2080 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
1997 pci_write_config_word(hw->pdev, PCI_STATUS, 2081 sky2_pci_write16(hw, PCI_STATUS,
1998 pci_err | PCI_STATUS_ERROR_BITS); 2082 pci_err | PCI_STATUS_ERROR_BITS);
1999 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF); 2083 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
2000 } 2084 }
@@ -2003,7 +2087,7 @@ static void sky2_hw_intr(struct sky2_hw *hw)
2003 /* PCI-Express uncorrectable Error occurred */ 2087 /* PCI-Express uncorrectable Error occurred */
2004 u32 pex_err; 2088 u32 pex_err;
2005 2089
2006 pci_read_config_dword(hw->pdev, PEX_UNC_ERR_STAT, &pex_err); 2090 pex_err = sky2_pci_read32(hw, PEX_UNC_ERR_STAT);
2007 2091
2008 if (net_ratelimit()) 2092 if (net_ratelimit())
2009 printk(KERN_ERR PFX "%s: pci express error (0x%x)\n", 2093 printk(KERN_ERR PFX "%s: pci express error (0x%x)\n",
@@ -2011,7 +2095,7 @@ static void sky2_hw_intr(struct sky2_hw *hw)
2011 2095
2012 /* clear the interrupt */ 2096 /* clear the interrupt */
2013 sky2_write32(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON); 2097 sky2_write32(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
2014 pci_write_config_dword(hw->pdev, PEX_UNC_ERR_STAT, 2098 sky2_pci_write32(hw, PEX_UNC_ERR_STAT,
2015 0xffffffffUL); 2099 0xffffffffUL);
2016 sky2_write32(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF); 2100 sky2_write32(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
2017 2101
@@ -2057,6 +2141,7 @@ static void sky2_phy_intr(struct sky2_hw *hw, unsigned port)
2057 2141
2058 hw->intr_mask &= ~(port == 0 ? Y2_IS_IRQ_PHY1 : Y2_IS_IRQ_PHY2); 2142 hw->intr_mask &= ~(port == 0 ? Y2_IS_IRQ_PHY1 : Y2_IS_IRQ_PHY2);
2059 sky2_write32(hw, B0_IMSK, hw->intr_mask); 2143 sky2_write32(hw, B0_IMSK, hw->intr_mask);
2144
2060 schedule_work(&sky2->phy_task); 2145 schedule_work(&sky2->phy_task);
2061} 2146}
2062 2147
@@ -2070,6 +2155,7 @@ static irqreturn_t sky2_intr(int irq, void *dev_id, struct pt_regs *regs)
2070 if (status == 0 || status == ~0) 2155 if (status == 0 || status == ~0)
2071 return IRQ_NONE; 2156 return IRQ_NONE;
2072 2157
2158 spin_lock(&hw->hw_lock);
2073 if (status & Y2_IS_HW_ERR) 2159 if (status & Y2_IS_HW_ERR)
2074 sky2_hw_intr(hw); 2160 sky2_hw_intr(hw);
2075 2161
@@ -2098,7 +2184,7 @@ static irqreturn_t sky2_intr(int irq, void *dev_id, struct pt_regs *regs)
2098 2184
2099 sky2_write32(hw, B0_Y2_SP_ICR, 2); 2185 sky2_write32(hw, B0_Y2_SP_ICR, 2);
2100 2186
2101 sky2_read32(hw, B0_IMSK); 2187 spin_unlock(&hw->hw_lock);
2102 2188
2103 return IRQ_HANDLED; 2189 return IRQ_HANDLED;
2104} 2190}
@@ -2141,7 +2227,7 @@ static int sky2_reset(struct sky2_hw *hw)
2141{ 2227{
2142 u16 status; 2228 u16 status;
2143 u8 t8, pmd_type; 2229 u8 t8, pmd_type;
2144 int i, err; 2230 int i;
2145 2231
2146 sky2_write8(hw, B0_CTST, CS_RST_CLR); 2232 sky2_write8(hw, B0_CTST, CS_RST_CLR);
2147 2233
@@ -2163,25 +2249,18 @@ static int sky2_reset(struct sky2_hw *hw)
2163 sky2_write8(hw, B0_CTST, CS_RST_CLR); 2249 sky2_write8(hw, B0_CTST, CS_RST_CLR);
2164 2250
2165 /* clear PCI errors, if any */ 2251 /* clear PCI errors, if any */
2166 err = pci_read_config_word(hw->pdev, PCI_STATUS, &status); 2252 status = sky2_pci_read16(hw, PCI_STATUS);
2167 if (err)
2168 goto pci_err;
2169 2253
2170 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON); 2254 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
2171 err = pci_write_config_word(hw->pdev, PCI_STATUS, 2255 sky2_pci_write16(hw, PCI_STATUS, status | PCI_STATUS_ERROR_BITS);
2172 status | PCI_STATUS_ERROR_BITS); 2256
2173 if (err)
2174 goto pci_err;
2175 2257
2176 sky2_write8(hw, B0_CTST, CS_MRST_CLR); 2258 sky2_write8(hw, B0_CTST, CS_MRST_CLR);
2177 2259
2178 /* clear any PEX errors */ 2260 /* clear any PEX errors */
2179 if (pci_find_capability(hw->pdev, PCI_CAP_ID_EXP)) { 2261 if (pci_find_capability(hw->pdev, PCI_CAP_ID_EXP))
2180 err = pci_write_config_dword(hw->pdev, PEX_UNC_ERR_STAT, 2262 sky2_pci_write32(hw, PEX_UNC_ERR_STAT, 0xffffffffUL);
2181 0xffffffffUL); 2263
2182 if (err)
2183 goto pci_err;
2184 }
2185 2264
2186 pmd_type = sky2_read8(hw, B2_PMD_TYP); 2265 pmd_type = sky2_read8(hw, B2_PMD_TYP);
2187 hw->copper = !(pmd_type == 'L' || pmd_type == 'S'); 2266 hw->copper = !(pmd_type == 'L' || pmd_type == 'S');
@@ -2280,8 +2359,7 @@ static int sky2_reset(struct sky2_hw *hw)
2280 sky2_write8(hw, STAT_FIFO_ISR_WM, 16); 2359 sky2_write8(hw, STAT_FIFO_ISR_WM, 16);
2281 2360
2282 sky2_write32(hw, STAT_TX_TIMER_INI, sky2_us2clk(hw, 1000)); 2361 sky2_write32(hw, STAT_TX_TIMER_INI, sky2_us2clk(hw, 1000));
2283 sky2_write32(hw, STAT_LEV_TIMER_INI, sky2_us2clk(hw, 100)); 2362 sky2_write32(hw, STAT_ISR_TIMER_INI, sky2_us2clk(hw, 7));
2284 sky2_write32(hw, STAT_ISR_TIMER_INI, sky2_us2clk(hw, 20));
2285 } 2363 }
2286 2364
2287 /* enable status unit */ 2365 /* enable status unit */
@@ -2292,14 +2370,6 @@ static int sky2_reset(struct sky2_hw *hw)
2292 sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_START); 2370 sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_START);
2293 2371
2294 return 0; 2372 return 0;
2295
2296pci_err:
2297 /* This is to catch a BIOS bug workaround where
2298 * mmconfig table doesn't have other buses.
2299 */
2300 printk(KERN_ERR PFX "%s: can't access PCI config space\n",
2301 pci_name(hw->pdev));
2302 return err;
2303} 2373}
2304 2374
2305static u32 sky2_supported_modes(const struct sky2_hw *hw) 2375static u32 sky2_supported_modes(const struct sky2_hw *hw)
@@ -2823,11 +2893,11 @@ static int sky2_set_coalesce(struct net_device *dev,
2823 (ecmd->rx_coalesce_usecs_irq < tmin || ecmd->rx_coalesce_usecs_irq > tmax)) 2893 (ecmd->rx_coalesce_usecs_irq < tmin || ecmd->rx_coalesce_usecs_irq > tmax))
2824 return -EINVAL; 2894 return -EINVAL;
2825 2895
2826 if (ecmd->tx_max_coalesced_frames > 0xffff) 2896 if (ecmd->tx_max_coalesced_frames >= TX_RING_SIZE-1)
2827 return -EINVAL; 2897 return -EINVAL;
2828 if (ecmd->rx_max_coalesced_frames > 0xff) 2898 if (ecmd->rx_max_coalesced_frames > RX_MAX_PENDING)
2829 return -EINVAL; 2899 return -EINVAL;
2830 if (ecmd->rx_max_coalesced_frames_irq > 0xff) 2900 if (ecmd->rx_max_coalesced_frames_irq >RX_MAX_PENDING)
2831 return -EINVAL; 2901 return -EINVAL;
2832 2902
2833 if (ecmd->tx_coalesce_usecs == 0) 2903 if (ecmd->tx_coalesce_usecs == 0)
@@ -3063,61 +3133,6 @@ static void __devinit sky2_show_addr(struct net_device *dev)
3063 dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]); 3133 dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]);
3064} 3134}
3065 3135
3066/* Handle software interrupt used during MSI test */
3067static irqreturn_t __devinit sky2_test_intr(int irq, void *dev_id,
3068 struct pt_regs *regs)
3069{
3070 struct sky2_hw *hw = dev_id;
3071 u32 status = sky2_read32(hw, B0_Y2_SP_ISRC2);
3072
3073 if (status == 0)
3074 return IRQ_NONE;
3075
3076 if (status & Y2_IS_IRQ_SW) {
3077 sky2_write8(hw, B0_CTST, CS_CL_SW_IRQ);
3078 hw->msi = 1;
3079 }
3080 sky2_write32(hw, B0_Y2_SP_ICR, 2);
3081
3082 sky2_read32(hw, B0_IMSK);
3083 return IRQ_HANDLED;
3084}
3085
3086/* Test interrupt path by forcing a a software IRQ */
3087static int __devinit sky2_test_msi(struct sky2_hw *hw)
3088{
3089 struct pci_dev *pdev = hw->pdev;
3090 int i, err;
3091
3092 sky2_write32(hw, B0_IMSK, Y2_IS_IRQ_SW);
3093
3094 err = request_irq(pdev->irq, sky2_test_intr, SA_SHIRQ, DRV_NAME, hw);
3095 if (err) {
3096 printk(KERN_ERR PFX "%s: cannot assign irq %d\n",
3097 pci_name(pdev), pdev->irq);
3098 return err;
3099 }
3100
3101 sky2_write8(hw, B0_CTST, CS_ST_SW_IRQ);
3102 wmb();
3103
3104 for (i = 0; i < 10; i++) {
3105 barrier();
3106 if (hw->msi)
3107 goto found;
3108 mdelay(1);
3109 }
3110
3111 err = -EOPNOTSUPP;
3112 sky2_write8(hw, B0_CTST, CS_CL_SW_IRQ);
3113 found:
3114 sky2_write32(hw, B0_IMSK, 0);
3115
3116 free_irq(pdev->irq, hw);
3117
3118 return err;
3119}
3120
3121static int __devinit sky2_probe(struct pci_dev *pdev, 3136static int __devinit sky2_probe(struct pci_dev *pdev,
3122 const struct pci_device_id *ent) 3137 const struct pci_device_id *ent)
3123{ 3138{
@@ -3169,17 +3184,6 @@ static int __devinit sky2_probe(struct pci_dev *pdev,
3169 } 3184 }
3170 } 3185 }
3171 3186
3172#ifdef __BIG_ENDIAN
3173 /* byte swap descriptors in hardware */
3174 {
3175 u32 reg;
3176
3177 pci_read_config_dword(pdev, PCI_DEV_REG2, &reg);
3178 reg |= PCI_REV_DESC;
3179 pci_write_config_dword(pdev, PCI_DEV_REG2, reg);
3180 }
3181#endif
3182
3183 err = -ENOMEM; 3187 err = -ENOMEM;
3184 hw = kzalloc(sizeof(*hw), GFP_KERNEL); 3188 hw = kzalloc(sizeof(*hw), GFP_KERNEL);
3185 if (!hw) { 3189 if (!hw) {
@@ -3197,6 +3201,18 @@ static int __devinit sky2_probe(struct pci_dev *pdev,
3197 goto err_out_free_hw; 3201 goto err_out_free_hw;
3198 } 3202 }
3199 hw->pm_cap = pm_cap; 3203 hw->pm_cap = pm_cap;
3204 spin_lock_init(&hw->hw_lock);
3205
3206#ifdef __BIG_ENDIAN
3207 /* byte swap descriptors in hardware */
3208 {
3209 u32 reg;
3210
3211 reg = sky2_pci_read32(hw, PCI_DEV_REG2);
3212 reg |= PCI_REV_DESC;
3213 sky2_pci_write32(hw, PCI_DEV_REG2, reg);
3214 }
3215#endif
3200 3216
3201 /* ring for status responses */ 3217 /* ring for status responses */
3202 hw->st_le = pci_alloc_consistent(hw->pdev, STATUS_LE_BYTES, 3218 hw->st_le = pci_alloc_consistent(hw->pdev, STATUS_LE_BYTES,
@@ -3238,22 +3254,7 @@ static int __devinit sky2_probe(struct pci_dev *pdev,
3238 } 3254 }
3239 } 3255 }
3240 3256
3241 if (!disable_msi && pci_enable_msi(pdev) == 0) { 3257 err = request_irq(pdev->irq, sky2_intr, SA_SHIRQ, DRV_NAME, hw);
3242 err = sky2_test_msi(hw);
3243 if (err == -EOPNOTSUPP) {
3244 /* MSI test failed, go back to INTx mode */
3245 printk(KERN_WARNING PFX "%s: No interrupt was generated using MSI, "
3246 "switching to INTx mode. Please report this failure to "
3247 "the PCI maintainer and include system chipset information.\n",
3248 pci_name(pdev));
3249 pci_disable_msi(pdev);
3250 }
3251 else if (err)
3252 goto err_out_unregister;
3253 }
3254
3255 err = request_irq(pdev->irq, sky2_intr, SA_SHIRQ | SA_SAMPLE_RANDOM,
3256 DRV_NAME, hw);
3257 if (err) { 3258 if (err) {
3258 printk(KERN_ERR PFX "%s: cannot assign irq %d\n", 3259 printk(KERN_ERR PFX "%s: cannot assign irq %d\n",
3259 pci_name(pdev), pdev->irq); 3260 pci_name(pdev), pdev->irq);
@@ -3268,8 +3269,6 @@ static int __devinit sky2_probe(struct pci_dev *pdev,
3268 return 0; 3269 return 0;
3269 3270
3270err_out_unregister: 3271err_out_unregister:
3271 if (hw->msi)
3272 pci_disable_msi(pdev);
3273 if (dev1) { 3272 if (dev1) {
3274 unregister_netdev(dev1); 3273 unregister_netdev(dev1);
3275 free_netdev(dev1); 3274 free_netdev(dev1);
@@ -3312,8 +3311,6 @@ static void __devexit sky2_remove(struct pci_dev *pdev)
3312 sky2_read8(hw, B0_CTST); 3311 sky2_read8(hw, B0_CTST);
3313 3312
3314 free_irq(pdev->irq, hw); 3313 free_irq(pdev->irq, hw);
3315 if (hw->msi)
3316 pci_disable_msi(pdev);
3317 pci_free_consistent(pdev, STATUS_LE_BYTES, hw->st_le, hw->st_dma); 3314 pci_free_consistent(pdev, STATUS_LE_BYTES, hw->st_le, hw->st_dma);
3318 pci_release_regions(pdev); 3315 pci_release_regions(pdev);
3319 pci_disable_device(pdev); 3316 pci_disable_device(pdev);