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path: root/drivers/net/sky2.c
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-rw-r--r--drivers/net/sky2.c233
1 files changed, 124 insertions, 109 deletions
diff --git a/drivers/net/sky2.c b/drivers/net/sky2.c
index c10e7f5faa5f..95efdb5bbbe1 100644
--- a/drivers/net/sky2.c
+++ b/drivers/net/sky2.c
@@ -50,7 +50,7 @@
50#include "sky2.h" 50#include "sky2.h"
51 51
52#define DRV_NAME "sky2" 52#define DRV_NAME "sky2"
53#define DRV_VERSION "1.9" 53#define DRV_VERSION "1.10"
54#define PFX DRV_NAME " " 54#define PFX DRV_NAME " "
55 55
56/* 56/*
@@ -96,9 +96,9 @@ static int disable_msi = 0;
96module_param(disable_msi, int, 0); 96module_param(disable_msi, int, 0);
97MODULE_PARM_DESC(disable_msi, "Disable Message Signaled Interrupt (MSI)"); 97MODULE_PARM_DESC(disable_msi, "Disable Message Signaled Interrupt (MSI)");
98 98
99static int idle_timeout = 100; 99static int idle_timeout = 0;
100module_param(idle_timeout, int, 0); 100module_param(idle_timeout, int, 0);
101MODULE_PARM_DESC(idle_timeout, "Idle timeout workaround for lost interrupts (ms)"); 101MODULE_PARM_DESC(idle_timeout, "Watchdog timer for lost interrupts (ms)");
102 102
103static const struct pci_device_id sky2_id_table[] = { 103static const struct pci_device_id sky2_id_table[] = {
104 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9000) }, 104 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9000) },
@@ -284,6 +284,31 @@ static void sky2_gmac_reset(struct sky2_hw *hw, unsigned port)
284 gma_write16(hw, port, GM_RX_CTRL, reg); 284 gma_write16(hw, port, GM_RX_CTRL, reg);
285} 285}
286 286
287/* flow control to advertise bits */
288static const u16 copper_fc_adv[] = {
289 [FC_NONE] = 0,
290 [FC_TX] = PHY_M_AN_ASP,
291 [FC_RX] = PHY_M_AN_PC,
292 [FC_BOTH] = PHY_M_AN_PC | PHY_M_AN_ASP,
293};
294
295/* flow control to advertise bits when using 1000BaseX */
296static const u16 fiber_fc_adv[] = {
297 [FC_BOTH] = PHY_M_P_BOTH_MD_X,
298 [FC_TX] = PHY_M_P_ASYM_MD_X,
299 [FC_RX] = PHY_M_P_SYM_MD_X,
300 [FC_NONE] = PHY_M_P_NO_PAUSE_X,
301};
302
303/* flow control to GMA disable bits */
304static const u16 gm_fc_disable[] = {
305 [FC_NONE] = GM_GPCR_FC_RX_DIS | GM_GPCR_FC_TX_DIS,
306 [FC_TX] = GM_GPCR_FC_RX_DIS,
307 [FC_RX] = GM_GPCR_FC_TX_DIS,
308 [FC_BOTH] = 0,
309};
310
311
287static void sky2_phy_init(struct sky2_hw *hw, unsigned port) 312static void sky2_phy_init(struct sky2_hw *hw, unsigned port)
288{ 313{
289 struct sky2_port *sky2 = netdev_priv(hw->dev[port]); 314 struct sky2_port *sky2 = netdev_priv(hw->dev[port]);
@@ -356,16 +381,7 @@ static void sky2_phy_init(struct sky2_hw *hw, unsigned port)
356 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg); 381 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
357 } 382 }
358 383
359 ctrl = gm_phy_read(hw, port, PHY_MARV_CTRL); 384 ctrl = PHY_CT_RESET;
360 if (sky2->autoneg == AUTONEG_DISABLE)
361 ctrl &= ~PHY_CT_ANE;
362 else
363 ctrl |= PHY_CT_ANE;
364
365 ctrl |= PHY_CT_RESET;
366 gm_phy_write(hw, port, PHY_MARV_CTRL, ctrl);
367
368 ctrl = 0;
369 ct1000 = 0; 385 ct1000 = 0;
370 adv = PHY_AN_CSMA; 386 adv = PHY_AN_CSMA;
371 reg = 0; 387 reg = 0;
@@ -384,20 +400,16 @@ static void sky2_phy_init(struct sky2_hw *hw, unsigned port)
384 adv |= PHY_M_AN_10_FD; 400 adv |= PHY_M_AN_10_FD;
385 if (sky2->advertising & ADVERTISED_10baseT_Half) 401 if (sky2->advertising & ADVERTISED_10baseT_Half)
386 adv |= PHY_M_AN_10_HD; 402 adv |= PHY_M_AN_10_HD;
403
404 adv |= copper_fc_adv[sky2->flow_mode];
387 } else { /* special defines for FIBER (88E1040S only) */ 405 } else { /* special defines for FIBER (88E1040S only) */
388 if (sky2->advertising & ADVERTISED_1000baseT_Full) 406 if (sky2->advertising & ADVERTISED_1000baseT_Full)
389 adv |= PHY_M_AN_1000X_AFD; 407 adv |= PHY_M_AN_1000X_AFD;
390 if (sky2->advertising & ADVERTISED_1000baseT_Half) 408 if (sky2->advertising & ADVERTISED_1000baseT_Half)
391 adv |= PHY_M_AN_1000X_AHD; 409 adv |= PHY_M_AN_1000X_AHD;
392 }
393 410
394 /* Set Flow-control capabilities */ 411 adv |= fiber_fc_adv[sky2->flow_mode];
395 if (sky2->tx_pause && sky2->rx_pause) 412 }
396 adv |= PHY_AN_PAUSE_CAP; /* symmetric */
397 else if (sky2->rx_pause && !sky2->tx_pause)
398 adv |= PHY_AN_PAUSE_ASYM | PHY_AN_PAUSE_CAP;
399 else if (!sky2->rx_pause && sky2->tx_pause)
400 adv |= PHY_AN_PAUSE_ASYM; /* local */
401 413
402 /* Restart Auto-negotiation */ 414 /* Restart Auto-negotiation */
403 ctrl |= PHY_CT_ANE | PHY_CT_RE_CFG; 415 ctrl |= PHY_CT_ANE | PHY_CT_RE_CFG;
@@ -422,25 +434,17 @@ static void sky2_phy_init(struct sky2_hw *hw, unsigned port)
422 if (sky2->duplex == DUPLEX_FULL) { 434 if (sky2->duplex == DUPLEX_FULL) {
423 reg |= GM_GPCR_DUP_FULL; 435 reg |= GM_GPCR_DUP_FULL;
424 ctrl |= PHY_CT_DUP_MD; 436 ctrl |= PHY_CT_DUP_MD;
425 } else if (sky2->speed != SPEED_1000 && hw->chip_id != CHIP_ID_YUKON_EC_U) { 437 } else if (sky2->speed < SPEED_1000)
426 /* Turn off flow control for 10/100mbps */ 438 sky2->flow_mode = FC_NONE;
427 sky2->rx_pause = 0;
428 sky2->tx_pause = 0;
429 }
430 439
431 if (!sky2->rx_pause)
432 reg |= GM_GPCR_FC_RX_DIS;
433 440
434 if (!sky2->tx_pause) 441 reg |= gm_fc_disable[sky2->flow_mode];
435 reg |= GM_GPCR_FC_TX_DIS;
436 442
437 /* Forward pause packets to GMAC? */ 443 /* Forward pause packets to GMAC? */
438 if (sky2->tx_pause || sky2->rx_pause) 444 if (sky2->flow_mode & FC_RX)
439 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_ON); 445 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_ON);
440 else 446 else
441 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF); 447 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF);
442
443 ctrl |= PHY_CT_RESET;
444 } 448 }
445 449
446 gma_write16(hw, port, GM_GP_CTRL, reg); 450 gma_write16(hw, port, GM_GP_CTRL, reg);
@@ -695,16 +699,10 @@ static void sky2_mac_init(struct sky2_hw *hw, unsigned port)
695 699
696} 700}
697 701
698/* Assign Ram Buffer allocation. 702/* Assign Ram Buffer allocation in units of 64bit (8 bytes) */
699 * start and end are in units of 4k bytes 703static void sky2_ramset(struct sky2_hw *hw, u16 q, u32 start, u32 end)
700 * ram registers are in units of 64bit words
701 */
702static void sky2_ramset(struct sky2_hw *hw, u16 q, u8 startk, u8 endk)
703{ 704{
704 u32 start, end; 705 pr_debug(PFX "q %d %#x %#x\n", q, start, end);
705
706 start = startk * 4096/8;
707 end = (endk * 4096/8) - 1;
708 706
709 sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_RST_CLR); 707 sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_RST_CLR);
710 sky2_write32(hw, RB_ADDR(q, RB_START), start); 708 sky2_write32(hw, RB_ADDR(q, RB_START), start);
@@ -713,7 +711,7 @@ static void sky2_ramset(struct sky2_hw *hw, u16 q, u8 startk, u8 endk)
713 sky2_write32(hw, RB_ADDR(q, RB_RP), start); 711 sky2_write32(hw, RB_ADDR(q, RB_RP), start);
714 712
715 if (q == Q_R1 || q == Q_R2) { 713 if (q == Q_R1 || q == Q_R2) {
716 u32 space = (endk - startk) * 4096/8; 714 u32 space = end - start + 1;
717 u32 tp = space - space/4; 715 u32 tp = space - space/4;
718 716
719 /* On receive queue's set the thresholds 717 /* On receive queue's set the thresholds
@@ -1195,19 +1193,16 @@ static int sky2_up(struct net_device *dev)
1195 1193
1196 sky2_mac_init(hw, port); 1194 sky2_mac_init(hw, port);
1197 1195
1198 /* Determine available ram buffer space (in 4K blocks). 1196 /* Determine available ram buffer space in qwords. */
1199 * Note: not sure about the FE setting below yet 1197 ramsize = sky2_read8(hw, B2_E_0) * 4096/8;
1200 */
1201 if (hw->chip_id == CHIP_ID_YUKON_FE)
1202 ramsize = 4;
1203 else
1204 ramsize = sky2_read8(hw, B2_E_0);
1205 1198
1206 /* Give transmitter one third (rounded up) */ 1199 if (ramsize > 6*1024/8)
1207 rxspace = ramsize - (ramsize + 2) / 3; 1200 rxspace = ramsize - (ramsize + 2) / 3;
1201 else
1202 rxspace = ramsize / 2;
1208 1203
1209 sky2_ramset(hw, rxqaddr[port], 0, rxspace); 1204 sky2_ramset(hw, rxqaddr[port], 0, rxspace-1);
1210 sky2_ramset(hw, txqaddr[port], rxspace, ramsize); 1205 sky2_ramset(hw, txqaddr[port], rxspace, ramsize-1);
1211 1206
1212 /* Make sure SyncQ is disabled */ 1207 /* Make sure SyncQ is disabled */
1213 sky2_write8(hw, RB_ADDR(port == 0 ? Q_XS1 : Q_XS2, RB_CTRL), 1208 sky2_write8(hw, RB_ADDR(port == 0 ? Q_XS1 : Q_XS2, RB_CTRL),
@@ -1499,6 +1494,11 @@ static int sky2_down(struct net_device *dev)
1499 /* Stop more packets from being queued */ 1494 /* Stop more packets from being queued */
1500 netif_stop_queue(dev); 1495 netif_stop_queue(dev);
1501 1496
1497 /* Disable port IRQ */
1498 imask = sky2_read32(hw, B0_IMSK);
1499 imask &= ~portirq_msk[port];
1500 sky2_write32(hw, B0_IMSK, imask);
1501
1502 sky2_gmac_reset(hw, port); 1502 sky2_gmac_reset(hw, port);
1503 1503
1504 /* Stop transmitter */ 1504 /* Stop transmitter */
@@ -1549,11 +1549,6 @@ static int sky2_down(struct net_device *dev)
1549 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET); 1549 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET);
1550 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_SET); 1550 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_SET);
1551 1551
1552 /* Disable port IRQ */
1553 imask = sky2_read32(hw, B0_IMSK);
1554 imask &= ~portirq_msk[port];
1555 sky2_write32(hw, B0_IMSK, imask);
1556
1557 sky2_phy_power(hw, port, 0); 1552 sky2_phy_power(hw, port, 0);
1558 1553
1559 /* turn off LED's */ 1554 /* turn off LED's */
@@ -1605,6 +1600,12 @@ static void sky2_link_up(struct sky2_port *sky2)
1605 struct sky2_hw *hw = sky2->hw; 1600 struct sky2_hw *hw = sky2->hw;
1606 unsigned port = sky2->port; 1601 unsigned port = sky2->port;
1607 u16 reg; 1602 u16 reg;
1603 static const char *fc_name[] = {
1604 [FC_NONE] = "none",
1605 [FC_TX] = "tx",
1606 [FC_RX] = "rx",
1607 [FC_BOTH] = "both",
1608 };
1608 1609
1609 /* enable Rx/Tx */ 1610 /* enable Rx/Tx */
1610 reg = gma_read16(hw, port, GM_GP_CTRL); 1611 reg = gma_read16(hw, port, GM_GP_CTRL);
@@ -1648,8 +1649,7 @@ static void sky2_link_up(struct sky2_port *sky2)
1648 "%s: Link is up at %d Mbps, %s duplex, flow control %s\n", 1649 "%s: Link is up at %d Mbps, %s duplex, flow control %s\n",
1649 sky2->netdev->name, sky2->speed, 1650 sky2->netdev->name, sky2->speed,
1650 sky2->duplex == DUPLEX_FULL ? "full" : "half", 1651 sky2->duplex == DUPLEX_FULL ? "full" : "half",
1651 (sky2->tx_pause && sky2->rx_pause) ? "both" : 1652 fc_name[sky2->flow_status]);
1652 sky2->tx_pause ? "tx" : sky2->rx_pause ? "rx" : "none");
1653} 1653}
1654 1654
1655static void sky2_link_down(struct sky2_port *sky2) 1655static void sky2_link_down(struct sky2_port *sky2)
@@ -1664,7 +1664,7 @@ static void sky2_link_down(struct sky2_port *sky2)
1664 reg &= ~(GM_GPCR_RX_ENA | GM_GPCR_TX_ENA); 1664 reg &= ~(GM_GPCR_RX_ENA | GM_GPCR_TX_ENA);
1665 gma_write16(hw, port, GM_GP_CTRL, reg); 1665 gma_write16(hw, port, GM_GP_CTRL, reg);
1666 1666
1667 if (sky2->rx_pause && !sky2->tx_pause) { 1667 if (sky2->flow_status == FC_RX) {
1668 /* restore Asymmetric Pause bit */ 1668 /* restore Asymmetric Pause bit */
1669 gm_phy_write(hw, port, PHY_MARV_AUNE_ADV, 1669 gm_phy_write(hw, port, PHY_MARV_AUNE_ADV,
1670 gm_phy_read(hw, port, PHY_MARV_AUNE_ADV) 1670 gm_phy_read(hw, port, PHY_MARV_AUNE_ADV)
@@ -1683,6 +1683,14 @@ static void sky2_link_down(struct sky2_port *sky2)
1683 sky2_phy_init(hw, port); 1683 sky2_phy_init(hw, port);
1684} 1684}
1685 1685
1686static enum flow_control sky2_flow(int rx, int tx)
1687{
1688 if (rx)
1689 return tx ? FC_BOTH : FC_RX;
1690 else
1691 return tx ? FC_TX : FC_NONE;
1692}
1693
1686static int sky2_autoneg_done(struct sky2_port *sky2, u16 aux) 1694static int sky2_autoneg_done(struct sky2_port *sky2, u16 aux)
1687{ 1695{
1688 struct sky2_hw *hw = sky2->hw; 1696 struct sky2_hw *hw = sky2->hw;
@@ -1703,39 +1711,20 @@ static int sky2_autoneg_done(struct sky2_port *sky2, u16 aux)
1703 } 1711 }
1704 1712
1705 sky2->speed = sky2_phy_speed(hw, aux); 1713 sky2->speed = sky2_phy_speed(hw, aux);
1706 if (sky2->speed == SPEED_1000) { 1714 sky2->duplex = (aux & PHY_M_PS_FULL_DUP) ? DUPLEX_FULL : DUPLEX_HALF;
1707 u16 ctl2 = gm_phy_read(hw, port, PHY_MARV_1000T_CTRL);
1708 u16 lpa2 = gm_phy_read(hw, port, PHY_MARV_1000T_STAT);
1709 if (lpa2 & PHY_B_1000S_MSF) {
1710 printk(KERN_ERR PFX "%s: master/slave fault",
1711 sky2->netdev->name);
1712 return -1;
1713 }
1714
1715 if ((ctl2 & PHY_M_1000C_AFD) && (lpa2 & PHY_B_1000S_LP_FD))
1716 sky2->duplex = DUPLEX_FULL;
1717 else
1718 sky2->duplex = DUPLEX_HALF;
1719 } else {
1720 u16 adv = gm_phy_read(hw, port, PHY_MARV_AUNE_ADV);
1721 if ((aux & adv) & PHY_AN_FULL)
1722 sky2->duplex = DUPLEX_FULL;
1723 else
1724 sky2->duplex = DUPLEX_HALF;
1725 }
1726 1715
1727 /* Pause bits are offset (9..8) */ 1716 /* Pause bits are offset (9..8) */
1728 if (hw->chip_id == CHIP_ID_YUKON_XL || hw->chip_id == CHIP_ID_YUKON_EC_U) 1717 if (hw->chip_id == CHIP_ID_YUKON_XL || hw->chip_id == CHIP_ID_YUKON_EC_U)
1729 aux >>= 6; 1718 aux >>= 6;
1730 1719
1731 sky2->rx_pause = (aux & PHY_M_PS_RX_P_EN) != 0; 1720 sky2->flow_status = sky2_flow(aux & PHY_M_PS_RX_P_EN,
1732 sky2->tx_pause = (aux & PHY_M_PS_TX_P_EN) != 0; 1721 aux & PHY_M_PS_TX_P_EN);
1733 1722
1734 if (sky2->duplex == DUPLEX_HALF && sky2->speed != SPEED_1000 1723 if (sky2->duplex == DUPLEX_HALF && sky2->speed < SPEED_1000
1735 && hw->chip_id != CHIP_ID_YUKON_EC_U) 1724 && hw->chip_id != CHIP_ID_YUKON_EC_U)
1736 sky2->rx_pause = sky2->tx_pause = 0; 1725 sky2->flow_status = FC_NONE;
1737 1726
1738 if (sky2->rx_pause || sky2->tx_pause) 1727 if (aux & PHY_M_PS_RX_P_EN)
1739 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_ON); 1728 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_ON);
1740 else 1729 else
1741 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF); 1730 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF);
@@ -1750,13 +1739,13 @@ static void sky2_phy_intr(struct sky2_hw *hw, unsigned port)
1750 struct sky2_port *sky2 = netdev_priv(dev); 1739 struct sky2_port *sky2 = netdev_priv(dev);
1751 u16 istatus, phystat; 1740 u16 istatus, phystat;
1752 1741
1742 if (!netif_running(dev))
1743 return;
1744
1753 spin_lock(&sky2->phy_lock); 1745 spin_lock(&sky2->phy_lock);
1754 istatus = gm_phy_read(hw, port, PHY_MARV_INT_STAT); 1746 istatus = gm_phy_read(hw, port, PHY_MARV_INT_STAT);
1755 phystat = gm_phy_read(hw, port, PHY_MARV_PHY_STAT); 1747 phystat = gm_phy_read(hw, port, PHY_MARV_PHY_STAT);
1756 1748
1757 if (!netif_running(dev))
1758 goto out;
1759
1760 if (netif_msg_intr(sky2)) 1749 if (netif_msg_intr(sky2))
1761 printk(KERN_INFO PFX "%s: phy interrupt status 0x%x 0x%x\n", 1750 printk(KERN_INFO PFX "%s: phy interrupt status 0x%x 0x%x\n",
1762 sky2->netdev->name, istatus, phystat); 1751 sky2->netdev->name, istatus, phystat);
@@ -2016,6 +2005,10 @@ oversize:
2016 2005
2017error: 2006error:
2018 ++sky2->net_stats.rx_errors; 2007 ++sky2->net_stats.rx_errors;
2008 if (status & GMR_FS_RX_FF_OV) {
2009 sky2->net_stats.rx_fifo_errors++;
2010 goto resubmit;
2011 }
2019 2012
2020 if (netif_msg_rx_err(sky2) && net_ratelimit()) 2013 if (netif_msg_rx_err(sky2) && net_ratelimit())
2021 printk(KERN_INFO PFX "%s: rx error, status 0x%x length %d\n", 2014 printk(KERN_INFO PFX "%s: rx error, status 0x%x length %d\n",
@@ -2027,8 +2020,6 @@ error:
2027 sky2->net_stats.rx_frame_errors++; 2020 sky2->net_stats.rx_frame_errors++;
2028 if (status & GMR_FS_CRC_ERR) 2021 if (status & GMR_FS_CRC_ERR)
2029 sky2->net_stats.rx_crc_errors++; 2022 sky2->net_stats.rx_crc_errors++;
2030 if (status & GMR_FS_RX_FF_OV)
2031 sky2->net_stats.rx_fifo_errors++;
2032 2023
2033 goto resubmit; 2024 goto resubmit;
2034} 2025}
@@ -2748,7 +2739,7 @@ static int sky2_nway_reset(struct net_device *dev)
2748{ 2739{
2749 struct sky2_port *sky2 = netdev_priv(dev); 2740 struct sky2_port *sky2 = netdev_priv(dev);
2750 2741
2751 if (sky2->autoneg != AUTONEG_ENABLE) 2742 if (!netif_running(dev) || sky2->autoneg != AUTONEG_ENABLE)
2752 return -EINVAL; 2743 return -EINVAL;
2753 2744
2754 sky2_phy_reinit(sky2); 2745 sky2_phy_reinit(sky2);
@@ -2850,6 +2841,14 @@ static int sky2_set_mac_address(struct net_device *dev, void *p)
2850 return 0; 2841 return 0;
2851} 2842}
2852 2843
2844static void inline sky2_add_filter(u8 filter[8], const u8 *addr)
2845{
2846 u32 bit;
2847
2848 bit = ether_crc(ETH_ALEN, addr) & 63;
2849 filter[bit >> 3] |= 1 << (bit & 7);
2850}
2851
2853static void sky2_set_multicast(struct net_device *dev) 2852static void sky2_set_multicast(struct net_device *dev)
2854{ 2853{
2855 struct sky2_port *sky2 = netdev_priv(dev); 2854 struct sky2_port *sky2 = netdev_priv(dev);
@@ -2858,7 +2857,10 @@ static void sky2_set_multicast(struct net_device *dev)
2858 struct dev_mc_list *list = dev->mc_list; 2857 struct dev_mc_list *list = dev->mc_list;
2859 u16 reg; 2858 u16 reg;
2860 u8 filter[8]; 2859 u8 filter[8];
2860 int rx_pause;
2861 static const u8 pause_mc_addr[ETH_ALEN] = { 0x1, 0x80, 0xc2, 0x0, 0x0, 0x1 };
2861 2862
2863 rx_pause = (sky2->flow_status == FC_RX || sky2->flow_status == FC_BOTH);
2862 memset(filter, 0, sizeof(filter)); 2864 memset(filter, 0, sizeof(filter));
2863 2865
2864 reg = gma_read16(hw, port, GM_RX_CTRL); 2866 reg = gma_read16(hw, port, GM_RX_CTRL);
@@ -2866,18 +2868,19 @@ static void sky2_set_multicast(struct net_device *dev)
2866 2868
2867 if (dev->flags & IFF_PROMISC) /* promiscuous */ 2869 if (dev->flags & IFF_PROMISC) /* promiscuous */
2868 reg &= ~(GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA); 2870 reg &= ~(GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA);
2869 else if ((dev->flags & IFF_ALLMULTI) || dev->mc_count > 16) /* all multicast */ 2871 else if (dev->flags & IFF_ALLMULTI)
2870 memset(filter, 0xff, sizeof(filter)); 2872 memset(filter, 0xff, sizeof(filter));
2871 else if (dev->mc_count == 0) /* no multicast */ 2873 else if (dev->mc_count == 0 && !rx_pause)
2872 reg &= ~GM_RXCR_MCF_ENA; 2874 reg &= ~GM_RXCR_MCF_ENA;
2873 else { 2875 else {
2874 int i; 2876 int i;
2875 reg |= GM_RXCR_MCF_ENA; 2877 reg |= GM_RXCR_MCF_ENA;
2876 2878
2877 for (i = 0; list && i < dev->mc_count; i++, list = list->next) { 2879 if (rx_pause)
2878 u32 bit = ether_crc(ETH_ALEN, list->dmi_addr) & 0x3f; 2880 sky2_add_filter(filter, pause_mc_addr);
2879 filter[bit / 8] |= 1 << (bit % 8); 2881
2880 } 2882 for (i = 0; list && i < dev->mc_count; i++, list = list->next)
2883 sky2_add_filter(filter, list->dmi_addr);
2881 } 2884 }
2882 2885
2883 gma_write16(hw, port, GM_MC_ADDR_H1, 2886 gma_write16(hw, port, GM_MC_ADDR_H1,
@@ -2990,8 +2993,20 @@ static void sky2_get_pauseparam(struct net_device *dev,
2990{ 2993{
2991 struct sky2_port *sky2 = netdev_priv(dev); 2994 struct sky2_port *sky2 = netdev_priv(dev);
2992 2995
2993 ecmd->tx_pause = sky2->tx_pause; 2996 switch (sky2->flow_mode) {
2994 ecmd->rx_pause = sky2->rx_pause; 2997 case FC_NONE:
2998 ecmd->tx_pause = ecmd->rx_pause = 0;
2999 break;
3000 case FC_TX:
3001 ecmd->tx_pause = 1, ecmd->rx_pause = 0;
3002 break;
3003 case FC_RX:
3004 ecmd->tx_pause = 0, ecmd->rx_pause = 1;
3005 break;
3006 case FC_BOTH:
3007 ecmd->tx_pause = ecmd->rx_pause = 1;
3008 }
3009
2995 ecmd->autoneg = sky2->autoneg; 3010 ecmd->autoneg = sky2->autoneg;
2996} 3011}
2997 3012
@@ -3001,10 +3016,10 @@ static int sky2_set_pauseparam(struct net_device *dev,
3001 struct sky2_port *sky2 = netdev_priv(dev); 3016 struct sky2_port *sky2 = netdev_priv(dev);
3002 3017
3003 sky2->autoneg = ecmd->autoneg; 3018 sky2->autoneg = ecmd->autoneg;
3004 sky2->tx_pause = ecmd->tx_pause != 0; 3019 sky2->flow_mode = sky2_flow(ecmd->rx_pause, ecmd->tx_pause);
3005 sky2->rx_pause = ecmd->rx_pause != 0;
3006 3020
3007 sky2_phy_reinit(sky2); 3021 if (netif_running(dev))
3022 sky2_phy_reinit(sky2);
3008 3023
3009 return 0; 3024 return 0;
3010} 3025}
@@ -3234,8 +3249,8 @@ static __devinit struct net_device *sky2_init_netdev(struct sky2_hw *hw,
3234 3249
3235 /* Auto speed and flow control */ 3250 /* Auto speed and flow control */
3236 sky2->autoneg = AUTONEG_ENABLE; 3251 sky2->autoneg = AUTONEG_ENABLE;
3237 sky2->tx_pause = 1; 3252 sky2->flow_mode = FC_BOTH;
3238 sky2->rx_pause = 1; 3253
3239 sky2->duplex = -1; 3254 sky2->duplex = -1;
3240 sky2->speed = -1; 3255 sky2->speed = -1;
3241 sky2->advertising = sky2_supported_modes(hw); 3256 sky2->advertising = sky2_supported_modes(hw);
@@ -3326,9 +3341,8 @@ static int __devinit sky2_test_msi(struct sky2_hw *hw)
3326 3341
3327 if (!hw->msi_detected) { 3342 if (!hw->msi_detected) {
3328 /* MSI test failed, go back to INTx mode */ 3343 /* MSI test failed, go back to INTx mode */
3329 printk(KERN_WARNING PFX "%s: No interrupt was generated using MSI, " 3344 printk(KERN_INFO PFX "%s: No interrupt generated using MSI, "
3330 "switching to INTx mode. Please report this failure to " 3345 "switching to INTx mode.\n",
3331 "the PCI maintainer and include system chipset information.\n",
3332 pci_name(pdev)); 3346 pci_name(pdev));
3333 3347
3334 err = -EOPNOTSUPP; 3348 err = -EOPNOTSUPP;
@@ -3336,6 +3350,7 @@ static int __devinit sky2_test_msi(struct sky2_hw *hw)
3336 } 3350 }
3337 3351
3338 sky2_write32(hw, B0_IMSK, 0); 3352 sky2_write32(hw, B0_IMSK, 0);
3353 sky2_read32(hw, B0_IMSK);
3339 3354
3340 free_irq(pdev->irq, hw); 3355 free_irq(pdev->irq, hw);
3341 3356