diff options
Diffstat (limited to 'drivers/net/sky2.c')
-rw-r--r-- | drivers/net/sky2.c | 156 |
1 files changed, 81 insertions, 75 deletions
diff --git a/drivers/net/sky2.c b/drivers/net/sky2.c index 16616f5440d0..fb1d2c30c1bb 100644 --- a/drivers/net/sky2.c +++ b/drivers/net/sky2.c | |||
@@ -100,32 +100,32 @@ module_param(idle_timeout, int, 0); | |||
100 | MODULE_PARM_DESC(idle_timeout, "Watchdog timer for lost interrupts (ms)"); | 100 | MODULE_PARM_DESC(idle_timeout, "Watchdog timer for lost interrupts (ms)"); |
101 | 101 | ||
102 | static const struct pci_device_id sky2_id_table[] = { | 102 | static const struct pci_device_id sky2_id_table[] = { |
103 | { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9000) }, | 103 | { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9000) }, /* SK-9Sxx */ |
104 | { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9E00) }, | 104 | { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9E00) }, /* SK-9Exx */ |
105 | { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4b00) }, /* DGE-560T */ | 105 | { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4b00) }, /* DGE-560T */ |
106 | { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4001) }, /* DGE-550SX */ | 106 | { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4001) }, /* DGE-550SX */ |
107 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4340) }, | 107 | { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4B02) }, /* DGE-560SX */ |
108 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4341) }, | 108 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4340) }, /* 88E8021 */ |
109 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4342) }, | 109 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4341) }, /* 88E8022 */ |
110 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4343) }, | 110 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4342) }, /* 88E8061 */ |
111 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4344) }, | 111 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4343) }, /* 88E8062 */ |
112 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4345) }, | 112 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4344) }, /* 88E8021 */ |
113 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4346) }, | 113 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4345) }, /* 88E8022 */ |
114 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4347) }, | 114 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4346) }, /* 88E8061 */ |
115 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4350) }, | 115 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4347) }, /* 88E8062 */ |
116 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4351) }, | 116 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4350) }, /* 88E8035 */ |
117 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4352) }, | 117 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4351) }, /* 88E8036 */ |
118 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4353) }, | 118 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4352) }, /* 88E8038 */ |
119 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4360) }, | 119 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4353) }, /* 88E8039 */ |
120 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4361) }, | 120 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4356) }, /* 88EC033 */ |
121 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4362) }, | 121 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4360) }, /* 88E8052 */ |
122 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4363) }, | 122 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4361) }, /* 88E8050 */ |
123 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4364) }, | 123 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4362) }, /* 88E8053 */ |
124 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4365) }, | 124 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4363) }, /* 88E8055 */ |
125 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4366) }, | 125 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4364) }, /* 88E8056 */ |
126 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4367) }, | 126 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4366) }, /* 88EC036 */ |
127 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4368) }, | 127 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4367) }, /* 88EC032 */ |
128 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4369) }, | 128 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4368) }, /* 88EC034 */ |
129 | { 0 } | 129 | { 0 } |
130 | }; | 130 | }; |
131 | 131 | ||
@@ -521,7 +521,7 @@ static void sky2_phy_init(struct sky2_hw *hw, unsigned port) | |||
521 | /* set Tx LED (LED_TX) to blink mode on Rx OR Tx activity */ | 521 | /* set Tx LED (LED_TX) to blink mode on Rx OR Tx activity */ |
522 | ledctrl |= PHY_M_LED_BLINK_RT(BLINK_84MS) | PHY_M_LEDC_TX_CTRL; | 522 | ledctrl |= PHY_M_LED_BLINK_RT(BLINK_84MS) | PHY_M_LEDC_TX_CTRL; |
523 | /* turn off the Rx LED (LED_RX) */ | 523 | /* turn off the Rx LED (LED_RX) */ |
524 | ledover |= PHY_M_LED_MO_RX(MO_LED_OFF); | 524 | ledover &= ~PHY_M_LED_MO_RX; |
525 | } | 525 | } |
526 | 526 | ||
527 | if (hw->chip_id == CHIP_ID_YUKON_EC_U && hw->chip_rev == CHIP_REV_YU_EC_A1) { | 527 | if (hw->chip_id == CHIP_ID_YUKON_EC_U && hw->chip_rev == CHIP_REV_YU_EC_A1) { |
@@ -544,7 +544,7 @@ static void sky2_phy_init(struct sky2_hw *hw, unsigned port) | |||
544 | 544 | ||
545 | if (sky2->autoneg == AUTONEG_DISABLE || sky2->speed == SPEED_100) { | 545 | if (sky2->autoneg == AUTONEG_DISABLE || sky2->speed == SPEED_100) { |
546 | /* turn on 100 Mbps LED (LED_LINK100) */ | 546 | /* turn on 100 Mbps LED (LED_LINK100) */ |
547 | ledover |= PHY_M_LED_MO_100(MO_LED_ON); | 547 | ledover |= PHY_M_LED_MO_100; |
548 | } | 548 | } |
549 | 549 | ||
550 | if (ledover) | 550 | if (ledover) |
@@ -676,17 +676,15 @@ static void sky2_mac_init(struct sky2_hw *hw, unsigned port) | |||
676 | /* Flush Rx MAC FIFO on any flow control or error */ | 676 | /* Flush Rx MAC FIFO on any flow control or error */ |
677 | sky2_write16(hw, SK_REG(port, RX_GMF_FL_MSK), GMR_FS_ANY_ERR); | 677 | sky2_write16(hw, SK_REG(port, RX_GMF_FL_MSK), GMR_FS_ANY_ERR); |
678 | 678 | ||
679 | /* Set threshold to 0xa (64 bytes) | 679 | /* Set threshold to 0xa (64 bytes) + 1 to workaround pause bug */ |
680 | * ASF disabled so no need to do WA dev #4.30 | 680 | sky2_write16(hw, SK_REG(port, RX_GMF_FL_THR), RX_GMF_FL_THR_DEF+1); |
681 | */ | ||
682 | sky2_write16(hw, SK_REG(port, RX_GMF_FL_THR), RX_GMF_FL_THR_DEF); | ||
683 | 681 | ||
684 | /* Configure Tx MAC FIFO */ | 682 | /* Configure Tx MAC FIFO */ |
685 | sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_CLR); | 683 | sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_CLR); |
686 | sky2_write16(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_OPER_ON); | 684 | sky2_write16(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_OPER_ON); |
687 | 685 | ||
688 | if (hw->chip_id == CHIP_ID_YUKON_EC_U) { | 686 | if (hw->chip_id == CHIP_ID_YUKON_EC_U) { |
689 | sky2_write8(hw, SK_REG(port, RX_GMF_LP_THR), 512/8); | 687 | sky2_write8(hw, SK_REG(port, RX_GMF_LP_THR), 768/8); |
690 | sky2_write8(hw, SK_REG(port, RX_GMF_UP_THR), 1024/8); | 688 | sky2_write8(hw, SK_REG(port, RX_GMF_UP_THR), 1024/8); |
691 | if (hw->dev[port]->mtu > ETH_DATA_LEN) { | 689 | if (hw->dev[port]->mtu > ETH_DATA_LEN) { |
692 | /* set Tx GMAC FIFO Almost Empty Threshold */ | 690 | /* set Tx GMAC FIFO Almost Empty Threshold */ |
@@ -698,10 +696,15 @@ static void sky2_mac_init(struct sky2_hw *hw, unsigned port) | |||
698 | 696 | ||
699 | } | 697 | } |
700 | 698 | ||
701 | /* Assign Ram Buffer allocation in units of 64bit (8 bytes) */ | 699 | /* Assign Ram Buffer allocation to queue */ |
702 | static void sky2_ramset(struct sky2_hw *hw, u16 q, u32 start, u32 end) | 700 | static void sky2_ramset(struct sky2_hw *hw, u16 q, u32 start, u32 space) |
703 | { | 701 | { |
704 | pr_debug(PFX "q %d %#x %#x\n", q, start, end); | 702 | u32 end; |
703 | |||
704 | /* convert from K bytes to qwords used for hw register */ | ||
705 | start *= 1024/8; | ||
706 | space *= 1024/8; | ||
707 | end = start + space - 1; | ||
705 | 708 | ||
706 | sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_RST_CLR); | 709 | sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_RST_CLR); |
707 | sky2_write32(hw, RB_ADDR(q, RB_START), start); | 710 | sky2_write32(hw, RB_ADDR(q, RB_START), start); |
@@ -710,7 +713,6 @@ static void sky2_ramset(struct sky2_hw *hw, u16 q, u32 start, u32 end) | |||
710 | sky2_write32(hw, RB_ADDR(q, RB_RP), start); | 713 | sky2_write32(hw, RB_ADDR(q, RB_RP), start); |
711 | 714 | ||
712 | if (q == Q_R1 || q == Q_R2) { | 715 | if (q == Q_R1 || q == Q_R2) { |
713 | u32 space = end - start + 1; | ||
714 | u32 tp = space - space/4; | 716 | u32 tp = space - space/4; |
715 | 717 | ||
716 | /* On receive queue's set the thresholds | 718 | /* On receive queue's set the thresholds |
@@ -1060,10 +1062,16 @@ static int sky2_rx_start(struct sky2_port *sky2) | |||
1060 | sky2->rx_put = sky2->rx_next = 0; | 1062 | sky2->rx_put = sky2->rx_next = 0; |
1061 | sky2_qset(hw, rxq); | 1063 | sky2_qset(hw, rxq); |
1062 | 1064 | ||
1063 | if (hw->chip_id == CHIP_ID_YUKON_EC_U && hw->chip_rev >= 2) { | 1065 | /* On PCI express lowering the watermark gives better performance */ |
1064 | /* MAC Rx RAM Read is controlled by hardware */ | 1066 | if (pci_find_capability(hw->pdev, PCI_CAP_ID_EXP)) |
1067 | sky2_write32(hw, Q_ADDR(rxq, Q_WM), BMU_WM_PEX); | ||
1068 | |||
1069 | /* These chips have no ram buffer? | ||
1070 | * MAC Rx RAM Read is controlled by hardware */ | ||
1071 | if (hw->chip_id == CHIP_ID_YUKON_EC_U && | ||
1072 | (hw->chip_rev == CHIP_REV_YU_EC_U_A1 | ||
1073 | || hw->chip_rev == CHIP_REV_YU_EC_U_B0)) | ||
1065 | sky2_write32(hw, Q_ADDR(rxq, Q_F), F_M_RX_RAM_DIS); | 1074 | sky2_write32(hw, Q_ADDR(rxq, Q_F), F_M_RX_RAM_DIS); |
1066 | } | ||
1067 | 1075 | ||
1068 | sky2_prefetch_init(hw, rxq, sky2->rx_le_map, RX_LE_SIZE - 1); | 1076 | sky2_prefetch_init(hw, rxq, sky2->rx_le_map, RX_LE_SIZE - 1); |
1069 | 1077 | ||
@@ -1139,7 +1147,7 @@ static int sky2_up(struct net_device *dev) | |||
1139 | struct sky2_port *sky2 = netdev_priv(dev); | 1147 | struct sky2_port *sky2 = netdev_priv(dev); |
1140 | struct sky2_hw *hw = sky2->hw; | 1148 | struct sky2_hw *hw = sky2->hw; |
1141 | unsigned port = sky2->port; | 1149 | unsigned port = sky2->port; |
1142 | u32 ramsize, rxspace, imask; | 1150 | u32 ramsize, imask; |
1143 | int cap, err = -ENOMEM; | 1151 | int cap, err = -ENOMEM; |
1144 | struct net_device *otherdev = hw->dev[sky2->port^1]; | 1152 | struct net_device *otherdev = hw->dev[sky2->port^1]; |
1145 | 1153 | ||
@@ -1192,20 +1200,25 @@ static int sky2_up(struct net_device *dev) | |||
1192 | 1200 | ||
1193 | sky2_mac_init(hw, port); | 1201 | sky2_mac_init(hw, port); |
1194 | 1202 | ||
1195 | /* Determine available ram buffer space in qwords. */ | 1203 | /* Register is number of 4K blocks on internal RAM buffer. */ |
1196 | ramsize = sky2_read8(hw, B2_E_0) * 4096/8; | 1204 | ramsize = sky2_read8(hw, B2_E_0) * 4; |
1205 | printk(KERN_INFO PFX "%s: ram buffer %dK\n", dev->name, ramsize); | ||
1197 | 1206 | ||
1198 | if (ramsize > 6*1024/8) | 1207 | if (ramsize > 0) { |
1199 | rxspace = ramsize - (ramsize + 2) / 3; | 1208 | u32 rxspace; |
1200 | else | ||
1201 | rxspace = ramsize / 2; | ||
1202 | 1209 | ||
1203 | sky2_ramset(hw, rxqaddr[port], 0, rxspace-1); | 1210 | if (ramsize < 16) |
1204 | sky2_ramset(hw, txqaddr[port], rxspace, ramsize-1); | 1211 | rxspace = ramsize / 2; |
1212 | else | ||
1213 | rxspace = 8 + (2*(ramsize - 16))/3; | ||
1205 | 1214 | ||
1206 | /* Make sure SyncQ is disabled */ | 1215 | sky2_ramset(hw, rxqaddr[port], 0, rxspace); |
1207 | sky2_write8(hw, RB_ADDR(port == 0 ? Q_XS1 : Q_XS2, RB_CTRL), | 1216 | sky2_ramset(hw, txqaddr[port], rxspace, ramsize - rxspace); |
1208 | RB_RST_SET); | 1217 | |
1218 | /* Make sure SyncQ is disabled */ | ||
1219 | sky2_write8(hw, RB_ADDR(port == 0 ? Q_XS1 : Q_XS2, RB_CTRL), | ||
1220 | RB_RST_SET); | ||
1221 | } | ||
1209 | 1222 | ||
1210 | sky2_qset(hw, txqaddr[port]); | 1223 | sky2_qset(hw, txqaddr[port]); |
1211 | 1224 | ||
@@ -1350,7 +1363,7 @@ static int sky2_xmit_frame(struct sk_buff *skb, struct net_device *dev) | |||
1350 | u32 tcpsum; | 1363 | u32 tcpsum; |
1351 | 1364 | ||
1352 | tcpsum = offset << 16; /* sum start */ | 1365 | tcpsum = offset << 16; /* sum start */ |
1353 | tcpsum |= offset + skb->csum; /* sum write */ | 1366 | tcpsum |= offset + skb->csum_offset; /* sum write */ |
1354 | 1367 | ||
1355 | ctrl = CALSUM | WR_SUM | INIT_SUM | LOCK_SUM; | 1368 | ctrl = CALSUM | WR_SUM | INIT_SUM | LOCK_SUM; |
1356 | if (skb->nh.iph->protocol == IPPROTO_UDP) | 1369 | if (skb->nh.iph->protocol == IPPROTO_UDP) |
@@ -1453,7 +1466,7 @@ static void sky2_tx_complete(struct sky2_port *sky2, u16 done) | |||
1453 | if (unlikely(netif_msg_tx_done(sky2))) | 1466 | if (unlikely(netif_msg_tx_done(sky2))) |
1454 | printk(KERN_DEBUG "%s: tx done %u\n", | 1467 | printk(KERN_DEBUG "%s: tx done %u\n", |
1455 | dev->name, idx); | 1468 | dev->name, idx); |
1456 | dev_kfree_skb(re->skb); | 1469 | dev_kfree_skb_any(re->skb); |
1457 | } | 1470 | } |
1458 | 1471 | ||
1459 | le->opcode = 0; /* paranoia */ | 1472 | le->opcode = 0; /* paranoia */ |
@@ -1509,7 +1522,7 @@ static int sky2_down(struct net_device *dev) | |||
1509 | 1522 | ||
1510 | /* WA for dev. #4.209 */ | 1523 | /* WA for dev. #4.209 */ |
1511 | if (hw->chip_id == CHIP_ID_YUKON_EC_U | 1524 | if (hw->chip_id == CHIP_ID_YUKON_EC_U |
1512 | && hw->chip_rev == CHIP_REV_YU_EC_U_A1) | 1525 | && (hw->chip_rev == CHIP_REV_YU_EC_U_A1 || hw->chip_rev == CHIP_REV_YU_EC_U_B0)) |
1513 | sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), | 1526 | sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), |
1514 | sky2->speed != SPEED_1000 ? | 1527 | sky2->speed != SPEED_1000 ? |
1515 | TX_STFW_ENA : TX_STFW_DIS); | 1528 | TX_STFW_ENA : TX_STFW_DIS); |
@@ -2065,7 +2078,7 @@ static int sky2_status_intr(struct sky2_hw *hw, int to_do) | |||
2065 | case OP_RXSTAT: | 2078 | case OP_RXSTAT: |
2066 | skb = sky2_receive(dev, length, status); | 2079 | skb = sky2_receive(dev, length, status); |
2067 | if (!skb) | 2080 | if (!skb) |
2068 | break; | 2081 | goto force_update; |
2069 | 2082 | ||
2070 | skb->protocol = eth_type_trans(skb, dev); | 2083 | skb->protocol = eth_type_trans(skb, dev); |
2071 | dev->last_rx = jiffies; | 2084 | dev->last_rx = jiffies; |
@@ -2081,8 +2094,8 @@ static int sky2_status_intr(struct sky2_hw *hw, int to_do) | |||
2081 | 2094 | ||
2082 | /* Update receiver after 16 frames */ | 2095 | /* Update receiver after 16 frames */ |
2083 | if (++buf_write[le->link] == RX_BUF_WRITE) { | 2096 | if (++buf_write[le->link] == RX_BUF_WRITE) { |
2084 | sky2_put_idx(hw, rxqaddr[le->link], | 2097 | force_update: |
2085 | sky2->rx_put); | 2098 | sky2_put_idx(hw, rxqaddr[le->link], sky2->rx_put); |
2086 | buf_write[le->link] = 0; | 2099 | buf_write[le->link] = 0; |
2087 | } | 2100 | } |
2088 | 2101 | ||
@@ -2917,18 +2930,8 @@ static void sky2_led(struct sky2_hw *hw, unsigned port, int on) | |||
2917 | 2930 | ||
2918 | default: | 2931 | default: |
2919 | gm_phy_write(hw, port, PHY_MARV_LED_CTRL, 0); | 2932 | gm_phy_write(hw, port, PHY_MARV_LED_CTRL, 0); |
2920 | gm_phy_write(hw, port, PHY_MARV_LED_OVER, | 2933 | gm_phy_write(hw, port, PHY_MARV_LED_OVER, |
2921 | on ? PHY_M_LED_MO_DUP(MO_LED_ON) | | 2934 | on ? PHY_M_LED_ALL : 0); |
2922 | PHY_M_LED_MO_10(MO_LED_ON) | | ||
2923 | PHY_M_LED_MO_100(MO_LED_ON) | | ||
2924 | PHY_M_LED_MO_1000(MO_LED_ON) | | ||
2925 | PHY_M_LED_MO_RX(MO_LED_ON) | ||
2926 | : PHY_M_LED_MO_DUP(MO_LED_OFF) | | ||
2927 | PHY_M_LED_MO_10(MO_LED_OFF) | | ||
2928 | PHY_M_LED_MO_100(MO_LED_OFF) | | ||
2929 | PHY_M_LED_MO_1000(MO_LED_OFF) | | ||
2930 | PHY_M_LED_MO_RX(MO_LED_OFF)); | ||
2931 | |||
2932 | } | 2935 | } |
2933 | } | 2936 | } |
2934 | 2937 | ||
@@ -3311,7 +3314,7 @@ static irqreturn_t __devinit sky2_test_intr(int irq, void *dev_id) | |||
3311 | return IRQ_NONE; | 3314 | return IRQ_NONE; |
3312 | 3315 | ||
3313 | if (status & Y2_IS_IRQ_SW) { | 3316 | if (status & Y2_IS_IRQ_SW) { |
3314 | hw->msi_detected = 1; | 3317 | hw->msi = 1; |
3315 | wake_up(&hw->msi_wait); | 3318 | wake_up(&hw->msi_wait); |
3316 | sky2_write8(hw, B0_CTST, CS_CL_SW_IRQ); | 3319 | sky2_write8(hw, B0_CTST, CS_CL_SW_IRQ); |
3317 | } | 3320 | } |
@@ -3330,7 +3333,7 @@ static int __devinit sky2_test_msi(struct sky2_hw *hw) | |||
3330 | 3333 | ||
3331 | sky2_write32(hw, B0_IMSK, Y2_IS_IRQ_SW); | 3334 | sky2_write32(hw, B0_IMSK, Y2_IS_IRQ_SW); |
3332 | 3335 | ||
3333 | err = request_irq(pdev->irq, sky2_test_intr, IRQF_SHARED, DRV_NAME, hw); | 3336 | err = request_irq(pdev->irq, sky2_test_intr, 0, DRV_NAME, hw); |
3334 | if (err) { | 3337 | if (err) { |
3335 | printk(KERN_ERR PFX "%s: cannot assign irq %d\n", | 3338 | printk(KERN_ERR PFX "%s: cannot assign irq %d\n", |
3336 | pci_name(pdev), pdev->irq); | 3339 | pci_name(pdev), pdev->irq); |
@@ -3340,9 +3343,9 @@ static int __devinit sky2_test_msi(struct sky2_hw *hw) | |||
3340 | sky2_write8(hw, B0_CTST, CS_ST_SW_IRQ); | 3343 | sky2_write8(hw, B0_CTST, CS_ST_SW_IRQ); |
3341 | sky2_read8(hw, B0_CTST); | 3344 | sky2_read8(hw, B0_CTST); |
3342 | 3345 | ||
3343 | wait_event_timeout(hw->msi_wait, hw->msi_detected, HZ/10); | 3346 | wait_event_timeout(hw->msi_wait, hw->msi, HZ/10); |
3344 | 3347 | ||
3345 | if (!hw->msi_detected) { | 3348 | if (!hw->msi) { |
3346 | /* MSI test failed, go back to INTx mode */ | 3349 | /* MSI test failed, go back to INTx mode */ |
3347 | printk(KERN_INFO PFX "%s: No interrupt generated using MSI, " | 3350 | printk(KERN_INFO PFX "%s: No interrupt generated using MSI, " |
3348 | "switching to INTx mode.\n", | 3351 | "switching to INTx mode.\n", |
@@ -3475,7 +3478,8 @@ static int __devinit sky2_probe(struct pci_dev *pdev, | |||
3475 | goto err_out_free_netdev; | 3478 | goto err_out_free_netdev; |
3476 | } | 3479 | } |
3477 | 3480 | ||
3478 | err = request_irq(pdev->irq, sky2_intr, IRQF_SHARED, dev->name, hw); | 3481 | err = request_irq(pdev->irq, sky2_intr, hw->msi ? 0 : IRQF_SHARED, |
3482 | dev->name, hw); | ||
3479 | if (err) { | 3483 | if (err) { |
3480 | printk(KERN_ERR PFX "%s: cannot assign irq %d\n", | 3484 | printk(KERN_ERR PFX "%s: cannot assign irq %d\n", |
3481 | pci_name(pdev), pdev->irq); | 3485 | pci_name(pdev), pdev->irq); |
@@ -3505,7 +3509,8 @@ static int __devinit sky2_probe(struct pci_dev *pdev, | |||
3505 | return 0; | 3509 | return 0; |
3506 | 3510 | ||
3507 | err_out_unregister: | 3511 | err_out_unregister: |
3508 | pci_disable_msi(pdev); | 3512 | if (hw->msi) |
3513 | pci_disable_msi(pdev); | ||
3509 | unregister_netdev(dev); | 3514 | unregister_netdev(dev); |
3510 | err_out_free_netdev: | 3515 | err_out_free_netdev: |
3511 | free_netdev(dev); | 3516 | free_netdev(dev); |
@@ -3548,7 +3553,8 @@ static void __devexit sky2_remove(struct pci_dev *pdev) | |||
3548 | sky2_read8(hw, B0_CTST); | 3553 | sky2_read8(hw, B0_CTST); |
3549 | 3554 | ||
3550 | free_irq(pdev->irq, hw); | 3555 | free_irq(pdev->irq, hw); |
3551 | pci_disable_msi(pdev); | 3556 | if (hw->msi) |
3557 | pci_disable_msi(pdev); | ||
3552 | pci_free_consistent(pdev, STATUS_LE_BYTES, hw->st_le, hw->st_dma); | 3558 | pci_free_consistent(pdev, STATUS_LE_BYTES, hw->st_le, hw->st_dma); |
3553 | pci_release_regions(pdev); | 3559 | pci_release_regions(pdev); |
3554 | pci_disable_device(pdev); | 3560 | pci_disable_device(pdev); |