diff options
Diffstat (limited to 'drivers/net/sky2.c')
-rw-r--r-- | drivers/net/sky2.c | 42 |
1 files changed, 35 insertions, 7 deletions
diff --git a/drivers/net/sky2.c b/drivers/net/sky2.c index 37f486b65f63..d760650c5c04 100644 --- a/drivers/net/sky2.c +++ b/drivers/net/sky2.c | |||
@@ -644,6 +644,7 @@ static void sky2_phy_power_up(struct sky2_hw *hw, unsigned port) | |||
644 | { | 644 | { |
645 | u32 reg1; | 645 | u32 reg1; |
646 | 646 | ||
647 | sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON); | ||
647 | reg1 = sky2_pci_read32(hw, PCI_DEV_REG1); | 648 | reg1 = sky2_pci_read32(hw, PCI_DEV_REG1); |
648 | reg1 &= ~phy_power[port]; | 649 | reg1 &= ~phy_power[port]; |
649 | 650 | ||
@@ -651,6 +652,7 @@ static void sky2_phy_power_up(struct sky2_hw *hw, unsigned port) | |||
651 | reg1 |= coma_mode[port]; | 652 | reg1 |= coma_mode[port]; |
652 | 653 | ||
653 | sky2_pci_write32(hw, PCI_DEV_REG1, reg1); | 654 | sky2_pci_write32(hw, PCI_DEV_REG1, reg1); |
655 | sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF); | ||
654 | sky2_pci_read32(hw, PCI_DEV_REG1); | 656 | sky2_pci_read32(hw, PCI_DEV_REG1); |
655 | 657 | ||
656 | if (hw->chip_id == CHIP_ID_YUKON_FE) | 658 | if (hw->chip_id == CHIP_ID_YUKON_FE) |
@@ -707,9 +709,11 @@ static void sky2_phy_power_down(struct sky2_hw *hw, unsigned port) | |||
707 | gm_phy_write(hw, port, PHY_MARV_CTRL, PHY_CT_PDOWN); | 709 | gm_phy_write(hw, port, PHY_MARV_CTRL, PHY_CT_PDOWN); |
708 | } | 710 | } |
709 | 711 | ||
712 | sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON); | ||
710 | reg1 = sky2_pci_read32(hw, PCI_DEV_REG1); | 713 | reg1 = sky2_pci_read32(hw, PCI_DEV_REG1); |
711 | reg1 |= phy_power[port]; /* set PHY to PowerDown/COMA Mode */ | 714 | reg1 |= phy_power[port]; /* set PHY to PowerDown/COMA Mode */ |
712 | sky2_pci_write32(hw, PCI_DEV_REG1, reg1); | 715 | sky2_pci_write32(hw, PCI_DEV_REG1, reg1); |
716 | sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF); | ||
713 | } | 717 | } |
714 | 718 | ||
715 | /* Force a renegotiation */ | 719 | /* Force a renegotiation */ |
@@ -2149,7 +2153,9 @@ static void sky2_qlink_intr(struct sky2_hw *hw) | |||
2149 | 2153 | ||
2150 | /* reset PHY Link Detect */ | 2154 | /* reset PHY Link Detect */ |
2151 | phy = sky2_pci_read16(hw, PSM_CONFIG_REG4); | 2155 | phy = sky2_pci_read16(hw, PSM_CONFIG_REG4); |
2156 | sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON); | ||
2152 | sky2_pci_write16(hw, PSM_CONFIG_REG4, phy | 1); | 2157 | sky2_pci_write16(hw, PSM_CONFIG_REG4, phy | 1); |
2158 | sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF); | ||
2153 | 2159 | ||
2154 | sky2_link_up(sky2); | 2160 | sky2_link_up(sky2); |
2155 | } | 2161 | } |
@@ -2640,6 +2646,7 @@ static void sky2_hw_intr(struct sky2_hw *hw) | |||
2640 | if (status & (Y2_IS_MST_ERR | Y2_IS_IRQ_STAT)) { | 2646 | if (status & (Y2_IS_MST_ERR | Y2_IS_IRQ_STAT)) { |
2641 | u16 pci_err; | 2647 | u16 pci_err; |
2642 | 2648 | ||
2649 | sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON); | ||
2643 | pci_err = sky2_pci_read16(hw, PCI_STATUS); | 2650 | pci_err = sky2_pci_read16(hw, PCI_STATUS); |
2644 | if (net_ratelimit()) | 2651 | if (net_ratelimit()) |
2645 | dev_err(&pdev->dev, "PCI hardware error (0x%x)\n", | 2652 | dev_err(&pdev->dev, "PCI hardware error (0x%x)\n", |
@@ -2647,12 +2654,14 @@ static void sky2_hw_intr(struct sky2_hw *hw) | |||
2647 | 2654 | ||
2648 | sky2_pci_write16(hw, PCI_STATUS, | 2655 | sky2_pci_write16(hw, PCI_STATUS, |
2649 | pci_err | PCI_STATUS_ERROR_BITS); | 2656 | pci_err | PCI_STATUS_ERROR_BITS); |
2657 | sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF); | ||
2650 | } | 2658 | } |
2651 | 2659 | ||
2652 | if (status & Y2_IS_PCI_EXP) { | 2660 | if (status & Y2_IS_PCI_EXP) { |
2653 | /* PCI-Express uncorrectable Error occurred */ | 2661 | /* PCI-Express uncorrectable Error occurred */ |
2654 | u32 err; | 2662 | u32 err; |
2655 | 2663 | ||
2664 | sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON); | ||
2656 | err = sky2_read32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS); | 2665 | err = sky2_read32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS); |
2657 | sky2_write32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS, | 2666 | sky2_write32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS, |
2658 | 0xfffffffful); | 2667 | 0xfffffffful); |
@@ -2660,6 +2669,7 @@ static void sky2_hw_intr(struct sky2_hw *hw) | |||
2660 | dev_err(&pdev->dev, "PCI Express error (0x%x)\n", err); | 2669 | dev_err(&pdev->dev, "PCI Express error (0x%x)\n", err); |
2661 | 2670 | ||
2662 | sky2_read32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS); | 2671 | sky2_read32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS); |
2672 | sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF); | ||
2663 | } | 2673 | } |
2664 | 2674 | ||
2665 | if (status & Y2_HWE_L1_MASK) | 2675 | if (status & Y2_HWE_L1_MASK) |
@@ -3038,6 +3048,7 @@ static void sky2_reset(struct sky2_hw *hw) | |||
3038 | } | 3048 | } |
3039 | 3049 | ||
3040 | sky2_power_on(hw); | 3050 | sky2_power_on(hw); |
3051 | sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF); | ||
3041 | 3052 | ||
3042 | for (i = 0; i < hw->ports; i++) { | 3053 | for (i = 0; i < hw->ports; i++) { |
3043 | sky2_write8(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_SET); | 3054 | sky2_write8(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_SET); |
@@ -3074,6 +3085,7 @@ static void sky2_reset(struct sky2_hw *hw) | |||
3074 | reg <<= PSM_CONFIG_REG4_TIMER_PHY_LINK_DETECT_BASE; | 3085 | reg <<= PSM_CONFIG_REG4_TIMER_PHY_LINK_DETECT_BASE; |
3075 | 3086 | ||
3076 | /* reset PHY Link Detect */ | 3087 | /* reset PHY Link Detect */ |
3088 | sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON); | ||
3077 | sky2_pci_write16(hw, PSM_CONFIG_REG4, | 3089 | sky2_pci_write16(hw, PSM_CONFIG_REG4, |
3078 | reg | PSM_CONFIG_REG4_RST_PHY_LINK_DETECT); | 3090 | reg | PSM_CONFIG_REG4_RST_PHY_LINK_DETECT); |
3079 | sky2_pci_write16(hw, PSM_CONFIG_REG4, reg); | 3091 | sky2_pci_write16(hw, PSM_CONFIG_REG4, reg); |
@@ -3091,6 +3103,7 @@ static void sky2_reset(struct sky2_hw *hw) | |||
3091 | /* restore the PCIe Link Control register */ | 3103 | /* restore the PCIe Link Control register */ |
3092 | sky2_pci_write16(hw, cap + PCI_EXP_LNKCTL, reg); | 3104 | sky2_pci_write16(hw, cap + PCI_EXP_LNKCTL, reg); |
3093 | } | 3105 | } |
3106 | sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF); | ||
3094 | 3107 | ||
3095 | /* re-enable PEX PM in PEX PHY debug reg. 8 (clear bit 12) */ | 3108 | /* re-enable PEX PM in PEX PHY debug reg. 8 (clear bit 12) */ |
3096 | sky2_write32(hw, Y2_PEX_PHY_DATA, PEX_DB_ACCESS | (0x08UL << 16)); | 3109 | sky2_write32(hw, Y2_PEX_PHY_DATA, PEX_DB_ACCESS | (0x08UL << 16)); |
@@ -3228,6 +3241,27 @@ static inline u8 sky2_wol_supported(const struct sky2_hw *hw) | |||
3228 | return sky2_is_copper(hw) ? (WAKE_PHY | WAKE_MAGIC) : 0; | 3241 | return sky2_is_copper(hw) ? (WAKE_PHY | WAKE_MAGIC) : 0; |
3229 | } | 3242 | } |
3230 | 3243 | ||
3244 | static void sky2_hw_set_wol(struct sky2_hw *hw) | ||
3245 | { | ||
3246 | int wol = 0; | ||
3247 | int i; | ||
3248 | |||
3249 | for (i = 0; i < hw->ports; i++) { | ||
3250 | struct net_device *dev = hw->dev[i]; | ||
3251 | struct sky2_port *sky2 = netdev_priv(dev); | ||
3252 | |||
3253 | if (sky2->wol) | ||
3254 | wol = 1; | ||
3255 | } | ||
3256 | |||
3257 | if (hw->chip_id == CHIP_ID_YUKON_EC_U || | ||
3258 | hw->chip_id == CHIP_ID_YUKON_EX || | ||
3259 | hw->chip_id == CHIP_ID_YUKON_FE_P) | ||
3260 | sky2_write32(hw, B0_CTST, wol ? Y2_HW_WOL_ON : Y2_HW_WOL_OFF); | ||
3261 | |||
3262 | device_set_wakeup_enable(&hw->pdev->dev, wol); | ||
3263 | } | ||
3264 | |||
3231 | static void sky2_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol) | 3265 | static void sky2_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol) |
3232 | { | 3266 | { |
3233 | const struct sky2_port *sky2 = netdev_priv(dev); | 3267 | const struct sky2_port *sky2 = netdev_priv(dev); |
@@ -3247,13 +3281,7 @@ static int sky2_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol) | |||
3247 | 3281 | ||
3248 | sky2->wol = wol->wolopts; | 3282 | sky2->wol = wol->wolopts; |
3249 | 3283 | ||
3250 | if (hw->chip_id == CHIP_ID_YUKON_EC_U || | 3284 | sky2_hw_set_wol(hw); |
3251 | hw->chip_id == CHIP_ID_YUKON_EX || | ||
3252 | hw->chip_id == CHIP_ID_YUKON_FE_P) | ||
3253 | sky2_write32(hw, B0_CTST, sky2->wol | ||
3254 | ? Y2_HW_WOL_ON : Y2_HW_WOL_OFF); | ||
3255 | |||
3256 | device_set_wakeup_enable(&hw->pdev->dev, sky2->wol); | ||
3257 | 3285 | ||
3258 | if (!netif_running(dev)) | 3286 | if (!netif_running(dev)) |
3259 | sky2_wol_init(sky2); | 3287 | sky2_wol_init(sky2); |