diff options
Diffstat (limited to 'drivers/net/skge.c')
-rw-r--r-- | drivers/net/skge.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/net/skge.c b/drivers/net/skge.c index 572f121b1f4e..fe806dbc1914 100644 --- a/drivers/net/skge.c +++ b/drivers/net/skge.c | |||
@@ -2893,6 +2893,7 @@ static const char *skge_board_name(const struct skge_hw *hw) | |||
2893 | */ | 2893 | */ |
2894 | static int skge_reset(struct skge_hw *hw) | 2894 | static int skge_reset(struct skge_hw *hw) |
2895 | { | 2895 | { |
2896 | u32 reg; | ||
2896 | u16 ctst; | 2897 | u16 ctst; |
2897 | u8 t8, mac_cfg, pmd_type, phy_type; | 2898 | u8 t8, mac_cfg, pmd_type, phy_type; |
2898 | int i; | 2899 | int i; |
@@ -2971,6 +2972,7 @@ static int skge_reset(struct skge_hw *hw) | |||
2971 | /* switch power to VCC (WA for VAUX problem) */ | 2972 | /* switch power to VCC (WA for VAUX problem) */ |
2972 | skge_write8(hw, B0_POWER_CTRL, | 2973 | skge_write8(hw, B0_POWER_CTRL, |
2973 | PC_VAUX_ENA | PC_VCC_ENA | PC_VAUX_OFF | PC_VCC_ON); | 2974 | PC_VAUX_ENA | PC_VCC_ENA | PC_VAUX_OFF | PC_VCC_ON); |
2975 | |||
2974 | /* avoid boards with stuck Hardware error bits */ | 2976 | /* avoid boards with stuck Hardware error bits */ |
2975 | if ((skge_read32(hw, B0_ISRC) & IS_HW_ERR) && | 2977 | if ((skge_read32(hw, B0_ISRC) & IS_HW_ERR) && |
2976 | (skge_read32(hw, B0_HWE_ISRC) & IS_IRQ_SENSOR)) { | 2978 | (skge_read32(hw, B0_HWE_ISRC) & IS_IRQ_SENSOR)) { |
@@ -2978,6 +2980,14 @@ static int skge_reset(struct skge_hw *hw) | |||
2978 | hw->intr_mask &= ~IS_HW_ERR; | 2980 | hw->intr_mask &= ~IS_HW_ERR; |
2979 | } | 2981 | } |
2980 | 2982 | ||
2983 | /* Clear PHY COMA */ | ||
2984 | skge_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON); | ||
2985 | pci_read_config_dword(hw->pdev, PCI_DEV_REG1, ®); | ||
2986 | reg &= ~PCI_PHY_COMA; | ||
2987 | pci_write_config_dword(hw->pdev, PCI_DEV_REG1, reg); | ||
2988 | skge_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF); | ||
2989 | |||
2990 | |||
2981 | for (i = 0; i < hw->ports; i++) { | 2991 | for (i = 0; i < hw->ports; i++) { |
2982 | skge_write16(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_SET); | 2992 | skge_write16(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_SET); |
2983 | skge_write16(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_CLR); | 2993 | skge_write16(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_CLR); |