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path: root/drivers/net/skge.c
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Diffstat (limited to 'drivers/net/skge.c')
-rw-r--r--drivers/net/skge.c17
1 files changed, 10 insertions, 7 deletions
diff --git a/drivers/net/skge.c b/drivers/net/skge.c
index 6b04b89cbb4f..f50405b4fba2 100644
--- a/drivers/net/skge.c
+++ b/drivers/net/skge.c
@@ -1818,8 +1818,8 @@ static void yukon_stop(struct skge_port *skge)
1818 gma_read16(hw, port, GM_GP_CTRL); 1818 gma_read16(hw, port, GM_GP_CTRL);
1819 1819
1820 /* set GPHY Control reset */ 1820 /* set GPHY Control reset */
1821 gma_write32(hw, port, GPHY_CTRL, GPC_RST_SET); 1821 skge_write32(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET);
1822 gma_write32(hw, port, GMAC_CTRL, GMC_RST_SET); 1822 skge_write32(hw, SK_REG(port, GMAC_CTRL), GMC_RST_SET);
1823} 1823}
1824 1824
1825static void yukon_get_stats(struct skge_port *skge, u64 *data) 1825static void yukon_get_stats(struct skge_port *skge, u64 *data)
@@ -1850,11 +1850,12 @@ static void yukon_mac_intr(struct skge_hw *hw, int port)
1850 1850
1851 if (status & GM_IS_RX_FF_OR) { 1851 if (status & GM_IS_RX_FF_OR) {
1852 ++skge->net_stats.rx_fifo_errors; 1852 ++skge->net_stats.rx_fifo_errors;
1853 gma_write8(hw, port, RX_GMF_CTRL_T, GMF_CLI_RX_FO); 1853 skge_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_CLI_RX_FO);
1854 } 1854 }
1855
1855 if (status & GM_IS_TX_FF_UR) { 1856 if (status & GM_IS_TX_FF_UR) {
1856 ++skge->net_stats.tx_fifo_errors; 1857 ++skge->net_stats.tx_fifo_errors;
1857 gma_write8(hw, port, TX_GMF_CTRL_T, GMF_CLI_TX_FU); 1858 skge_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_CLI_TX_FU);
1858 } 1859 }
1859 1860
1860} 1861}
@@ -1898,12 +1899,14 @@ static void yukon_link_down(struct skge_port *skge)
1898{ 1899{
1899 struct skge_hw *hw = skge->hw; 1900 struct skge_hw *hw = skge->hw;
1900 int port = skge->port; 1901 int port = skge->port;
1902 u16 ctrl;
1901 1903
1902 pr_debug("yukon_link_down\n"); 1904 pr_debug("yukon_link_down\n");
1903 gm_phy_write(hw, port, PHY_MARV_INT_MASK, 0); 1905 gm_phy_write(hw, port, PHY_MARV_INT_MASK, 0);
1904 gm_phy_write(hw, port, GM_GP_CTRL, 1906
1905 gm_phy_read(hw, port, GM_GP_CTRL) 1907 ctrl = gma_read16(hw, port, GM_GP_CTRL);
1906 & ~(GM_GPCR_RX_ENA | GM_GPCR_TX_ENA)); 1908 ctrl &= ~(GM_GPCR_RX_ENA | GM_GPCR_TX_ENA);
1909 gma_write16(hw, port, GM_GP_CTRL, ctrl);
1907 1910
1908 if (skge->flow_control == FLOW_MODE_REM_SEND) { 1911 if (skge->flow_control == FLOW_MODE_REM_SEND) {
1909 /* restore Asymmetric Pause bit */ 1912 /* restore Asymmetric Pause bit */