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-rw-r--r--drivers/net/sfc/xfp_phy.c132
1 files changed, 132 insertions, 0 deletions
diff --git a/drivers/net/sfc/xfp_phy.c b/drivers/net/sfc/xfp_phy.c
new file mode 100644
index 000000000000..66dd5bf1eaa9
--- /dev/null
+++ b/drivers/net/sfc/xfp_phy.c
@@ -0,0 +1,132 @@
1/****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2006-2008 Solarflare Communications Inc.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published
7 * by the Free Software Foundation, incorporated herein by reference.
8 */
9/*
10 * Driver for XFP optical PHYs (plus some support specific to the Quake 2032)
11 * See www.amcc.com for details (search for qt2032)
12 */
13
14#include <linux/timer.h>
15#include <linux/delay.h>
16#include "efx.h"
17#include "gmii.h"
18#include "mdio_10g.h"
19#include "xenpack.h"
20#include "phy.h"
21#include "mac.h"
22
23#define XFP_REQUIRED_DEVS (MDIO_MMDREG_DEVS0_PCS | \
24 MDIO_MMDREG_DEVS0_PMAPMD | \
25 MDIO_MMDREG_DEVS0_PHYXS)
26
27/****************************************************************************/
28/* Quake-specific MDIO registers */
29#define MDIO_QUAKE_LED0_REG (0xD006)
30
31void xfp_set_led(struct efx_nic *p, int led, int mode)
32{
33 int addr = MDIO_QUAKE_LED0_REG + led;
34 mdio_clause45_write(p, p->mii.phy_id, MDIO_MMD_PMAPMD, addr,
35 mode);
36}
37
38#define XFP_MAX_RESET_TIME 500
39#define XFP_RESET_WAIT 10
40
41/* Reset the PHYXS MMD. This is documented (for the Quake PHY) as doing
42 * a complete soft reset.
43 */
44static int xfp_reset_phy(struct efx_nic *efx)
45{
46 int rc;
47
48 rc = mdio_clause45_reset_mmd(efx, MDIO_MMD_PHYXS,
49 XFP_MAX_RESET_TIME / XFP_RESET_WAIT,
50 XFP_RESET_WAIT);
51 if (rc < 0)
52 goto fail;
53
54 /* Wait 250ms for the PHY to complete bootup */
55 msleep(250);
56
57 /* Check that all the MMDs we expect are present and responding. We
58 * expect faults on some if the link is down, but not on the PHY XS */
59 rc = mdio_clause45_check_mmds(efx, XFP_REQUIRED_DEVS,
60 MDIO_MMDREG_DEVS0_PHYXS);
61 if (rc < 0)
62 goto fail;
63
64 efx->board_info.init_leds(efx);
65
66 return rc;
67
68 fail:
69 EFX_ERR(efx, "XFP: reset timed out!\n");
70 return rc;
71}
72
73static int xfp_phy_init(struct efx_nic *efx)
74{
75 u32 devid = mdio_clause45_read_id(efx, MDIO_MMD_PHYXS);
76 int rc;
77
78 EFX_INFO(efx, "XFP: PHY ID reg %x (OUI %x model %x revision"
79 " %x)\n", devid, MDIO_ID_OUI(devid), MDIO_ID_MODEL(devid),
80 MDIO_ID_REV(devid));
81
82 rc = xfp_reset_phy(efx);
83
84 EFX_INFO(efx, "XFP: PHY init %s.\n",
85 rc ? "failed" : "successful");
86
87 return rc;
88}
89
90static void xfp_phy_clear_interrupt(struct efx_nic *efx)
91{
92 xenpack_clear_lasi_irqs(efx);
93}
94
95static int xfp_link_ok(struct efx_nic *efx)
96{
97 return mdio_clause45_links_ok(efx, XFP_REQUIRED_DEVS);
98}
99
100static int xfp_phy_check_hw(struct efx_nic *efx)
101{
102 int rc = 0;
103 int link_up = xfp_link_ok(efx);
104 /* Simulate a PHY event if link state has changed */
105 if (link_up != efx->link_up)
106 falcon_xmac_sim_phy_event(efx);
107
108 return rc;
109}
110
111static void xfp_phy_reconfigure(struct efx_nic *efx)
112{
113 efx->link_up = xfp_link_ok(efx);
114 efx->link_options = GM_LPA_10000FULL;
115}
116
117
118static void xfp_phy_fini(struct efx_nic *efx)
119{
120 /* Clobber the LED if it was blinking */
121 efx->board_info.blink(efx, 0);
122}
123
124struct efx_phy_operations falcon_xfp_phy_ops = {
125 .init = xfp_phy_init,
126 .reconfigure = xfp_phy_reconfigure,
127 .check_hw = xfp_phy_check_hw,
128 .fini = xfp_phy_fini,
129 .clear_interrupt = xfp_phy_clear_interrupt,
130 .reset_xaui = efx_port_dummy_op_void,
131 .mmds = XFP_REQUIRED_DEVS,
132};