aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/net/sfc/mtd.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/net/sfc/mtd.c')
-rw-r--r--drivers/net/sfc/mtd.c559
1 files changed, 471 insertions, 88 deletions
diff --git a/drivers/net/sfc/mtd.c b/drivers/net/sfc/mtd.c
index 820c233c3ea0..3a464529a46b 100644
--- a/drivers/net/sfc/mtd.c
+++ b/drivers/net/sfc/mtd.c
@@ -1,36 +1,80 @@
1/**************************************************************************** 1/****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards 2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd. 3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2006-2008 Solarflare Communications Inc. 4 * Copyright 2006-2009 Solarflare Communications Inc.
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify it 6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published 7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference. 8 * by the Free Software Foundation, incorporated herein by reference.
9 */ 9 */
10 10
11#include <linux/bitops.h>
11#include <linux/module.h> 12#include <linux/module.h>
12#include <linux/mtd/mtd.h> 13#include <linux/mtd/mtd.h>
13#include <linux/delay.h> 14#include <linux/delay.h>
15#include <linux/rtnetlink.h>
14 16
15#define EFX_DRIVER_NAME "sfc_mtd" 17#define EFX_DRIVER_NAME "sfc_mtd"
16#include "net_driver.h" 18#include "net_driver.h"
17#include "spi.h" 19#include "spi.h"
18#include "efx.h" 20#include "efx.h"
21#include "nic.h"
22#include "mcdi.h"
23#include "mcdi_pcol.h"
19 24
20#define EFX_SPI_VERIFY_BUF_LEN 16 25#define EFX_SPI_VERIFY_BUF_LEN 16
26#define EFX_MCDI_CHUNK_LEN 128
21 27
22struct efx_mtd { 28struct efx_mtd_partition {
23 const struct efx_spi_device *spi;
24 struct mtd_info mtd; 29 struct mtd_info mtd;
30 union {
31 struct {
32 bool updating;
33 u8 nvram_type;
34 u16 fw_subtype;
35 } mcdi;
36 size_t offset;
37 };
38 const char *type_name;
25 char name[IFNAMSIZ + 20]; 39 char name[IFNAMSIZ + 20];
26}; 40};
27 41
42struct efx_mtd_ops {
43 int (*read)(struct mtd_info *mtd, loff_t start, size_t len,
44 size_t *retlen, u8 *buffer);
45 int (*erase)(struct mtd_info *mtd, loff_t start, size_t len);
46 int (*write)(struct mtd_info *mtd, loff_t start, size_t len,
47 size_t *retlen, const u8 *buffer);
48 int (*sync)(struct mtd_info *mtd);
49};
50
51struct efx_mtd {
52 struct list_head node;
53 struct efx_nic *efx;
54 const struct efx_spi_device *spi;
55 const char *name;
56 const struct efx_mtd_ops *ops;
57 size_t n_parts;
58 struct efx_mtd_partition part[0];
59};
60
61#define efx_for_each_partition(part, efx_mtd) \
62 for ((part) = &(efx_mtd)->part[0]; \
63 (part) != &(efx_mtd)->part[(efx_mtd)->n_parts]; \
64 (part)++)
65
66#define to_efx_mtd_partition(mtd) \
67 container_of(mtd, struct efx_mtd_partition, mtd)
68
69static int falcon_mtd_probe(struct efx_nic *efx);
70static int siena_mtd_probe(struct efx_nic *efx);
71
28/* SPI utilities */ 72/* SPI utilities */
29 73
30static int efx_spi_slow_wait(struct efx_mtd *efx_mtd, bool uninterruptible) 74static int efx_spi_slow_wait(struct efx_mtd *efx_mtd, bool uninterruptible)
31{ 75{
32 const struct efx_spi_device *spi = efx_mtd->spi; 76 const struct efx_spi_device *spi = efx_mtd->spi;
33 struct efx_nic *efx = spi->efx; 77 struct efx_nic *efx = efx_mtd->efx;
34 u8 status; 78 u8 status;
35 int rc, i; 79 int rc, i;
36 80
@@ -39,7 +83,7 @@ static int efx_spi_slow_wait(struct efx_mtd *efx_mtd, bool uninterruptible)
39 __set_current_state(uninterruptible ? 83 __set_current_state(uninterruptible ?
40 TASK_UNINTERRUPTIBLE : TASK_INTERRUPTIBLE); 84 TASK_UNINTERRUPTIBLE : TASK_INTERRUPTIBLE);
41 schedule_timeout(HZ / 10); 85 schedule_timeout(HZ / 10);
42 rc = falcon_spi_cmd(spi, SPI_RDSR, -1, NULL, 86 rc = falcon_spi_cmd(efx, spi, SPI_RDSR, -1, NULL,
43 &status, sizeof(status)); 87 &status, sizeof(status));
44 if (rc) 88 if (rc)
45 return rc; 89 return rc;
@@ -52,32 +96,35 @@ static int efx_spi_slow_wait(struct efx_mtd *efx_mtd, bool uninterruptible)
52 return -ETIMEDOUT; 96 return -ETIMEDOUT;
53} 97}
54 98
55static int efx_spi_unlock(const struct efx_spi_device *spi) 99static int
100efx_spi_unlock(struct efx_nic *efx, const struct efx_spi_device *spi)
56{ 101{
57 const u8 unlock_mask = (SPI_STATUS_BP2 | SPI_STATUS_BP1 | 102 const u8 unlock_mask = (SPI_STATUS_BP2 | SPI_STATUS_BP1 |
58 SPI_STATUS_BP0); 103 SPI_STATUS_BP0);
59 u8 status; 104 u8 status;
60 int rc; 105 int rc;
61 106
62 rc = falcon_spi_cmd(spi, SPI_RDSR, -1, NULL, &status, sizeof(status)); 107 rc = falcon_spi_cmd(efx, spi, SPI_RDSR, -1, NULL,
108 &status, sizeof(status));
63 if (rc) 109 if (rc)
64 return rc; 110 return rc;
65 111
66 if (!(status & unlock_mask)) 112 if (!(status & unlock_mask))
67 return 0; /* already unlocked */ 113 return 0; /* already unlocked */
68 114
69 rc = falcon_spi_cmd(spi, SPI_WREN, -1, NULL, NULL, 0); 115 rc = falcon_spi_cmd(efx, spi, SPI_WREN, -1, NULL, NULL, 0);
70 if (rc) 116 if (rc)
71 return rc; 117 return rc;
72 rc = falcon_spi_cmd(spi, SPI_SST_EWSR, -1, NULL, NULL, 0); 118 rc = falcon_spi_cmd(efx, spi, SPI_SST_EWSR, -1, NULL, NULL, 0);
73 if (rc) 119 if (rc)
74 return rc; 120 return rc;
75 121
76 status &= ~unlock_mask; 122 status &= ~unlock_mask;
77 rc = falcon_spi_cmd(spi, SPI_WRSR, -1, &status, NULL, sizeof(status)); 123 rc = falcon_spi_cmd(efx, spi, SPI_WRSR, -1, &status,
124 NULL, sizeof(status));
78 if (rc) 125 if (rc)
79 return rc; 126 return rc;
80 rc = falcon_spi_wait_write(spi); 127 rc = falcon_spi_wait_write(efx, spi);
81 if (rc) 128 if (rc)
82 return rc; 129 return rc;
83 130
@@ -87,6 +134,7 @@ static int efx_spi_unlock(const struct efx_spi_device *spi)
87static int efx_spi_erase(struct efx_mtd *efx_mtd, loff_t start, size_t len) 134static int efx_spi_erase(struct efx_mtd *efx_mtd, loff_t start, size_t len)
88{ 135{
89 const struct efx_spi_device *spi = efx_mtd->spi; 136 const struct efx_spi_device *spi = efx_mtd->spi;
137 struct efx_nic *efx = efx_mtd->efx;
90 unsigned pos, block_len; 138 unsigned pos, block_len;
91 u8 empty[EFX_SPI_VERIFY_BUF_LEN]; 139 u8 empty[EFX_SPI_VERIFY_BUF_LEN];
92 u8 buffer[EFX_SPI_VERIFY_BUF_LEN]; 140 u8 buffer[EFX_SPI_VERIFY_BUF_LEN];
@@ -98,13 +146,14 @@ static int efx_spi_erase(struct efx_mtd *efx_mtd, loff_t start, size_t len)
98 if (spi->erase_command == 0) 146 if (spi->erase_command == 0)
99 return -EOPNOTSUPP; 147 return -EOPNOTSUPP;
100 148
101 rc = efx_spi_unlock(spi); 149 rc = efx_spi_unlock(efx, spi);
102 if (rc) 150 if (rc)
103 return rc; 151 return rc;
104 rc = falcon_spi_cmd(spi, SPI_WREN, -1, NULL, NULL, 0); 152 rc = falcon_spi_cmd(efx, spi, SPI_WREN, -1, NULL, NULL, 0);
105 if (rc) 153 if (rc)
106 return rc; 154 return rc;
107 rc = falcon_spi_cmd(spi, spi->erase_command, start, NULL, NULL, 0); 155 rc = falcon_spi_cmd(efx, spi, spi->erase_command, start, NULL,
156 NULL, 0);
108 if (rc) 157 if (rc)
109 return rc; 158 return rc;
110 rc = efx_spi_slow_wait(efx_mtd, false); 159 rc = efx_spi_slow_wait(efx_mtd, false);
@@ -113,7 +162,8 @@ static int efx_spi_erase(struct efx_mtd *efx_mtd, loff_t start, size_t len)
113 memset(empty, 0xff, sizeof(empty)); 162 memset(empty, 0xff, sizeof(empty));
114 for (pos = 0; pos < len; pos += block_len) { 163 for (pos = 0; pos < len; pos += block_len) {
115 block_len = min(len - pos, sizeof(buffer)); 164 block_len = min(len - pos, sizeof(buffer));
116 rc = falcon_spi_read(spi, start + pos, block_len, NULL, buffer); 165 rc = falcon_spi_read(efx, spi, start + pos, block_len,
166 NULL, buffer);
117 if (rc) 167 if (rc)
118 return rc; 168 return rc;
119 if (memcmp(empty, buffer, block_len)) 169 if (memcmp(empty, buffer, block_len))
@@ -130,140 +180,473 @@ static int efx_spi_erase(struct efx_mtd *efx_mtd, loff_t start, size_t len)
130 180
131/* MTD interface */ 181/* MTD interface */
132 182
133static int efx_mtd_read(struct mtd_info *mtd, loff_t start, size_t len, 183static int efx_mtd_erase(struct mtd_info *mtd, struct erase_info *erase)
134 size_t *retlen, u8 *buffer)
135{ 184{
136 struct efx_mtd *efx_mtd = mtd->priv; 185 struct efx_mtd *efx_mtd = mtd->priv;
186 int rc;
187
188 rc = efx_mtd->ops->erase(mtd, erase->addr, erase->len);
189 if (rc == 0) {
190 erase->state = MTD_ERASE_DONE;
191 } else {
192 erase->state = MTD_ERASE_FAILED;
193 erase->fail_addr = 0xffffffff;
194 }
195 mtd_erase_callback(erase);
196 return rc;
197}
198
199static void efx_mtd_sync(struct mtd_info *mtd)
200{
201 struct efx_mtd *efx_mtd = mtd->priv;
202 struct efx_nic *efx = efx_mtd->efx;
203 int rc;
204
205 rc = efx_mtd->ops->sync(mtd);
206 if (rc)
207 EFX_ERR(efx, "%s sync failed (%d)\n", efx_mtd->name, rc);
208}
209
210static void efx_mtd_remove_partition(struct efx_mtd_partition *part)
211{
212 int rc;
213
214 for (;;) {
215 rc = del_mtd_device(&part->mtd);
216 if (rc != -EBUSY)
217 break;
218 ssleep(1);
219 }
220 WARN_ON(rc);
221}
222
223static void efx_mtd_remove_device(struct efx_mtd *efx_mtd)
224{
225 struct efx_mtd_partition *part;
226
227 efx_for_each_partition(part, efx_mtd)
228 efx_mtd_remove_partition(part);
229 list_del(&efx_mtd->node);
230 kfree(efx_mtd);
231}
232
233static void efx_mtd_rename_device(struct efx_mtd *efx_mtd)
234{
235 struct efx_mtd_partition *part;
236
237 efx_for_each_partition(part, efx_mtd)
238 if (efx_nic_rev(efx_mtd->efx) >= EFX_REV_SIENA_A0)
239 snprintf(part->name, sizeof(part->name),
240 "%s %s:%02x", efx_mtd->efx->name,
241 part->type_name, part->mcdi.fw_subtype);
242 else
243 snprintf(part->name, sizeof(part->name),
244 "%s %s", efx_mtd->efx->name,
245 part->type_name);
246}
247
248static int efx_mtd_probe_device(struct efx_nic *efx, struct efx_mtd *efx_mtd)
249{
250 struct efx_mtd_partition *part;
251
252 efx_mtd->efx = efx;
253
254 efx_mtd_rename_device(efx_mtd);
255
256 efx_for_each_partition(part, efx_mtd) {
257 part->mtd.writesize = 1;
258
259 part->mtd.owner = THIS_MODULE;
260 part->mtd.priv = efx_mtd;
261 part->mtd.name = part->name;
262 part->mtd.erase = efx_mtd_erase;
263 part->mtd.read = efx_mtd->ops->read;
264 part->mtd.write = efx_mtd->ops->write;
265 part->mtd.sync = efx_mtd_sync;
266
267 if (add_mtd_device(&part->mtd))
268 goto fail;
269 }
270
271 list_add(&efx_mtd->node, &efx->mtd_list);
272 return 0;
273
274fail:
275 while (part != &efx_mtd->part[0]) {
276 --part;
277 efx_mtd_remove_partition(part);
278 }
279 /* add_mtd_device() returns 1 if the MTD table is full */
280 return -ENOMEM;
281}
282
283void efx_mtd_remove(struct efx_nic *efx)
284{
285 struct efx_mtd *efx_mtd, *next;
286
287 WARN_ON(efx_dev_registered(efx));
288
289 list_for_each_entry_safe(efx_mtd, next, &efx->mtd_list, node)
290 efx_mtd_remove_device(efx_mtd);
291}
292
293void efx_mtd_rename(struct efx_nic *efx)
294{
295 struct efx_mtd *efx_mtd;
296
297 ASSERT_RTNL();
298
299 list_for_each_entry(efx_mtd, &efx->mtd_list, node)
300 efx_mtd_rename_device(efx_mtd);
301}
302
303int efx_mtd_probe(struct efx_nic *efx)
304{
305 if (efx_nic_rev(efx) >= EFX_REV_SIENA_A0)
306 return siena_mtd_probe(efx);
307 else
308 return falcon_mtd_probe(efx);
309}
310
311/* Implementation of MTD operations for Falcon */
312
313static int falcon_mtd_read(struct mtd_info *mtd, loff_t start,
314 size_t len, size_t *retlen, u8 *buffer)
315{
316 struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
317 struct efx_mtd *efx_mtd = mtd->priv;
137 const struct efx_spi_device *spi = efx_mtd->spi; 318 const struct efx_spi_device *spi = efx_mtd->spi;
138 struct efx_nic *efx = spi->efx; 319 struct efx_nic *efx = efx_mtd->efx;
139 int rc; 320 int rc;
140 321
141 rc = mutex_lock_interruptible(&efx->spi_lock); 322 rc = mutex_lock_interruptible(&efx->spi_lock);
142 if (rc) 323 if (rc)
143 return rc; 324 return rc;
144 rc = falcon_spi_read(spi, FALCON_FLASH_BOOTCODE_START + start, 325 rc = falcon_spi_read(efx, spi, part->offset + start, len,
145 len, retlen, buffer); 326 retlen, buffer);
146 mutex_unlock(&efx->spi_lock); 327 mutex_unlock(&efx->spi_lock);
147 return rc; 328 return rc;
148} 329}
149 330
150static int efx_mtd_erase(struct mtd_info *mtd, struct erase_info *erase) 331static int falcon_mtd_erase(struct mtd_info *mtd, loff_t start, size_t len)
151{ 332{
333 struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
152 struct efx_mtd *efx_mtd = mtd->priv; 334 struct efx_mtd *efx_mtd = mtd->priv;
153 struct efx_nic *efx = efx_mtd->spi->efx; 335 struct efx_nic *efx = efx_mtd->efx;
154 int rc; 336 int rc;
155 337
156 rc = mutex_lock_interruptible(&efx->spi_lock); 338 rc = mutex_lock_interruptible(&efx->spi_lock);
157 if (rc) 339 if (rc)
158 return rc; 340 return rc;
159 rc = efx_spi_erase(efx_mtd, FALCON_FLASH_BOOTCODE_START + erase->addr, 341 rc = efx_spi_erase(efx_mtd, part->offset + start, len);
160 erase->len);
161 mutex_unlock(&efx->spi_lock); 342 mutex_unlock(&efx->spi_lock);
162
163 if (rc == 0) {
164 erase->state = MTD_ERASE_DONE;
165 } else {
166 erase->state = MTD_ERASE_FAILED;
167 erase->fail_addr = 0xffffffff;
168 }
169 mtd_erase_callback(erase);
170 return rc; 343 return rc;
171} 344}
172 345
173static int efx_mtd_write(struct mtd_info *mtd, loff_t start, 346static int falcon_mtd_write(struct mtd_info *mtd, loff_t start,
174 size_t len, size_t *retlen, const u8 *buffer) 347 size_t len, size_t *retlen, const u8 *buffer)
175{ 348{
349 struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
176 struct efx_mtd *efx_mtd = mtd->priv; 350 struct efx_mtd *efx_mtd = mtd->priv;
177 const struct efx_spi_device *spi = efx_mtd->spi; 351 const struct efx_spi_device *spi = efx_mtd->spi;
178 struct efx_nic *efx = spi->efx; 352 struct efx_nic *efx = efx_mtd->efx;
179 int rc; 353 int rc;
180 354
181 rc = mutex_lock_interruptible(&efx->spi_lock); 355 rc = mutex_lock_interruptible(&efx->spi_lock);
182 if (rc) 356 if (rc)
183 return rc; 357 return rc;
184 rc = falcon_spi_write(spi, FALCON_FLASH_BOOTCODE_START + start, 358 rc = falcon_spi_write(efx, spi, part->offset + start, len,
185 len, retlen, buffer); 359 retlen, buffer);
186 mutex_unlock(&efx->spi_lock); 360 mutex_unlock(&efx->spi_lock);
187 return rc; 361 return rc;
188} 362}
189 363
190static void efx_mtd_sync(struct mtd_info *mtd) 364static int falcon_mtd_sync(struct mtd_info *mtd)
191{ 365{
192 struct efx_mtd *efx_mtd = mtd->priv; 366 struct efx_mtd *efx_mtd = mtd->priv;
193 struct efx_nic *efx = efx_mtd->spi->efx; 367 struct efx_nic *efx = efx_mtd->efx;
194 int rc; 368 int rc;
195 369
196 mutex_lock(&efx->spi_lock); 370 mutex_lock(&efx->spi_lock);
197 rc = efx_spi_slow_wait(efx_mtd, true); 371 rc = efx_spi_slow_wait(efx_mtd, true);
198 mutex_unlock(&efx->spi_lock); 372 mutex_unlock(&efx->spi_lock);
373 return rc;
374}
375
376static struct efx_mtd_ops falcon_mtd_ops = {
377 .read = falcon_mtd_read,
378 .erase = falcon_mtd_erase,
379 .write = falcon_mtd_write,
380 .sync = falcon_mtd_sync,
381};
382
383static int falcon_mtd_probe(struct efx_nic *efx)
384{
385 struct efx_spi_device *spi = efx->spi_flash;
386 struct efx_mtd *efx_mtd;
387 int rc;
388
389 ASSERT_RTNL();
199 390
391 if (!spi || spi->size <= FALCON_FLASH_BOOTCODE_START)
392 return -ENODEV;
393
394 efx_mtd = kzalloc(sizeof(*efx_mtd) + sizeof(efx_mtd->part[0]),
395 GFP_KERNEL);
396 if (!efx_mtd)
397 return -ENOMEM;
398
399 efx_mtd->spi = spi;
400 efx_mtd->name = "flash";
401 efx_mtd->ops = &falcon_mtd_ops;
402
403 efx_mtd->n_parts = 1;
404 efx_mtd->part[0].mtd.type = MTD_NORFLASH;
405 efx_mtd->part[0].mtd.flags = MTD_CAP_NORFLASH;
406 efx_mtd->part[0].mtd.size = spi->size - FALCON_FLASH_BOOTCODE_START;
407 efx_mtd->part[0].mtd.erasesize = spi->erase_size;
408 efx_mtd->part[0].offset = FALCON_FLASH_BOOTCODE_START;
409 efx_mtd->part[0].type_name = "sfc_flash_bootrom";
410
411 rc = efx_mtd_probe_device(efx, efx_mtd);
200 if (rc) 412 if (rc)
201 EFX_ERR(efx, "%s sync failed (%d)\n", efx_mtd->name, rc); 413 kfree(efx_mtd);
202 return; 414 return rc;
203} 415}
204 416
205void efx_mtd_remove(struct efx_nic *efx) 417/* Implementation of MTD operations for Siena */
418
419static int siena_mtd_read(struct mtd_info *mtd, loff_t start,
420 size_t len, size_t *retlen, u8 *buffer)
206{ 421{
207 if (efx->spi_flash && efx->spi_flash->mtd) { 422 struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
208 struct efx_mtd *efx_mtd = efx->spi_flash->mtd; 423 struct efx_mtd *efx_mtd = mtd->priv;
209 int rc; 424 struct efx_nic *efx = efx_mtd->efx;
210 425 loff_t offset = start;
211 for (;;) { 426 loff_t end = min_t(loff_t, start + len, mtd->size);
212 rc = del_mtd_device(&efx_mtd->mtd); 427 size_t chunk;
213 if (rc != -EBUSY) 428 int rc = 0;
214 break; 429
215 ssleep(1); 430 while (offset < end) {
216 } 431 chunk = min_t(size_t, end - offset, EFX_MCDI_CHUNK_LEN);
217 WARN_ON(rc); 432 rc = efx_mcdi_nvram_read(efx, part->mcdi.nvram_type, offset,
218 kfree(efx_mtd); 433 buffer, chunk);
434 if (rc)
435 goto out;
436 offset += chunk;
437 buffer += chunk;
219 } 438 }
439out:
440 *retlen = offset - start;
441 return rc;
220} 442}
221 443
222void efx_mtd_rename(struct efx_nic *efx) 444static int siena_mtd_erase(struct mtd_info *mtd, loff_t start, size_t len)
223{ 445{
224 if (efx->spi_flash && efx->spi_flash->mtd) { 446 struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
225 struct efx_mtd *efx_mtd = efx->spi_flash->mtd; 447 struct efx_mtd *efx_mtd = mtd->priv;
226 snprintf(efx_mtd->name, sizeof(efx_mtd->name), 448 struct efx_nic *efx = efx_mtd->efx;
227 "%s sfc_flash_bootrom", efx->name); 449 loff_t offset = start & ~((loff_t)(mtd->erasesize - 1));
450 loff_t end = min_t(loff_t, start + len, mtd->size);
451 size_t chunk = part->mtd.erasesize;
452 int rc = 0;
453
454 if (!part->mcdi.updating) {
455 rc = efx_mcdi_nvram_update_start(efx, part->mcdi.nvram_type);
456 if (rc)
457 goto out;
458 part->mcdi.updating = 1;
459 }
460
461 /* The MCDI interface can in fact do multiple erase blocks at once;
462 * but erasing may be slow, so we make multiple calls here to avoid
463 * tripping the MCDI RPC timeout. */
464 while (offset < end) {
465 rc = efx_mcdi_nvram_erase(efx, part->mcdi.nvram_type, offset,
466 chunk);
467 if (rc)
468 goto out;
469 offset += chunk;
228 } 470 }
471out:
472 return rc;
229} 473}
230 474
231int efx_mtd_probe(struct efx_nic *efx) 475static int siena_mtd_write(struct mtd_info *mtd, loff_t start,
476 size_t len, size_t *retlen, const u8 *buffer)
232{ 477{
233 struct efx_spi_device *spi = efx->spi_flash; 478 struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
234 struct efx_mtd *efx_mtd; 479 struct efx_mtd *efx_mtd = mtd->priv;
480 struct efx_nic *efx = efx_mtd->efx;
481 loff_t offset = start;
482 loff_t end = min_t(loff_t, start + len, mtd->size);
483 size_t chunk;
484 int rc = 0;
485
486 if (!part->mcdi.updating) {
487 rc = efx_mcdi_nvram_update_start(efx, part->mcdi.nvram_type);
488 if (rc)
489 goto out;
490 part->mcdi.updating = 1;
491 }
235 492
236 if (!spi || spi->size <= FALCON_FLASH_BOOTCODE_START) 493 while (offset < end) {
494 chunk = min_t(size_t, end - offset, EFX_MCDI_CHUNK_LEN);
495 rc = efx_mcdi_nvram_write(efx, part->mcdi.nvram_type, offset,
496 buffer, chunk);
497 if (rc)
498 goto out;
499 offset += chunk;
500 buffer += chunk;
501 }
502out:
503 *retlen = offset - start;
504 return rc;
505}
506
507static int siena_mtd_sync(struct mtd_info *mtd)
508{
509 struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
510 struct efx_mtd *efx_mtd = mtd->priv;
511 struct efx_nic *efx = efx_mtd->efx;
512 int rc = 0;
513
514 if (part->mcdi.updating) {
515 part->mcdi.updating = 0;
516 rc = efx_mcdi_nvram_update_finish(efx, part->mcdi.nvram_type);
517 }
518
519 return rc;
520}
521
522static struct efx_mtd_ops siena_mtd_ops = {
523 .read = siena_mtd_read,
524 .erase = siena_mtd_erase,
525 .write = siena_mtd_write,
526 .sync = siena_mtd_sync,
527};
528
529struct siena_nvram_type_info {
530 int port;
531 const char *name;
532};
533
534static struct siena_nvram_type_info siena_nvram_types[] = {
535 [MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO] = { 0, "sfc_dummy_phy" },
536 [MC_CMD_NVRAM_TYPE_MC_FW] = { 0, "sfc_mcfw" },
537 [MC_CMD_NVRAM_TYPE_MC_FW_BACKUP] = { 0, "sfc_mcfw_backup" },
538 [MC_CMD_NVRAM_TYPE_STATIC_CFG_PORT0] = { 0, "sfc_static_cfg" },
539 [MC_CMD_NVRAM_TYPE_STATIC_CFG_PORT1] = { 1, "sfc_static_cfg" },
540 [MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT0] = { 0, "sfc_dynamic_cfg" },
541 [MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT1] = { 1, "sfc_dynamic_cfg" },
542 [MC_CMD_NVRAM_TYPE_EXP_ROM] = { 0, "sfc_exp_rom" },
543 [MC_CMD_NVRAM_TYPE_EXP_ROM_CFG_PORT0] = { 0, "sfc_exp_rom_cfg" },
544 [MC_CMD_NVRAM_TYPE_EXP_ROM_CFG_PORT1] = { 1, "sfc_exp_rom_cfg" },
545 [MC_CMD_NVRAM_TYPE_PHY_PORT0] = { 0, "sfc_phy_fw" },
546 [MC_CMD_NVRAM_TYPE_PHY_PORT1] = { 1, "sfc_phy_fw" },
547};
548
549static int siena_mtd_probe_partition(struct efx_nic *efx,
550 struct efx_mtd *efx_mtd,
551 unsigned int part_id,
552 unsigned int type)
553{
554 struct efx_mtd_partition *part = &efx_mtd->part[part_id];
555 struct siena_nvram_type_info *info;
556 size_t size, erase_size;
557 bool protected;
558 int rc;
559
560 if (type >= ARRAY_SIZE(siena_nvram_types))
237 return -ENODEV; 561 return -ENODEV;
238 562
239 efx_mtd = kzalloc(sizeof(*efx_mtd), GFP_KERNEL); 563 info = &siena_nvram_types[type];
564
565 if (info->port != efx_port_num(efx))
566 return -ENODEV;
567
568 rc = efx_mcdi_nvram_info(efx, type, &size, &erase_size, &protected);
569 if (rc)
570 return rc;
571 if (protected)
572 return -ENODEV; /* hide it */
573
574 part->mcdi.nvram_type = type;
575 part->type_name = info->name;
576
577 part->mtd.type = MTD_NORFLASH;
578 part->mtd.flags = MTD_CAP_NORFLASH;
579 part->mtd.size = size;
580 part->mtd.erasesize = erase_size;
581
582 return 0;
583}
584
585static int siena_mtd_get_fw_subtypes(struct efx_nic *efx,
586 struct efx_mtd *efx_mtd)
587{
588 struct efx_mtd_partition *part;
589 uint16_t fw_subtype_list[MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_LEN /
590 sizeof(uint16_t)];
591 int rc;
592
593 rc = efx_mcdi_get_board_cfg(efx, NULL, fw_subtype_list);
594 if (rc)
595 return rc;
596
597 efx_for_each_partition(part, efx_mtd)
598 part->mcdi.fw_subtype = fw_subtype_list[part->mcdi.nvram_type];
599
600 return 0;
601}
602
603static int siena_mtd_probe(struct efx_nic *efx)
604{
605 struct efx_mtd *efx_mtd;
606 int rc = -ENODEV;
607 u32 nvram_types;
608 unsigned int type;
609
610 ASSERT_RTNL();
611
612 rc = efx_mcdi_nvram_types(efx, &nvram_types);
613 if (rc)
614 return rc;
615
616 efx_mtd = kzalloc(sizeof(*efx_mtd) +
617 hweight32(nvram_types) * sizeof(efx_mtd->part[0]),
618 GFP_KERNEL);
240 if (!efx_mtd) 619 if (!efx_mtd)
241 return -ENOMEM; 620 return -ENOMEM;
242 621
243 efx_mtd->spi = spi; 622 efx_mtd->name = "Siena NVRAM manager";
244 spi->mtd = efx_mtd; 623
245 624 efx_mtd->ops = &siena_mtd_ops;
246 efx_mtd->mtd.type = MTD_NORFLASH; 625
247 efx_mtd->mtd.flags = MTD_CAP_NORFLASH; 626 type = 0;
248 efx_mtd->mtd.size = spi->size - FALCON_FLASH_BOOTCODE_START; 627 efx_mtd->n_parts = 0;
249 efx_mtd->mtd.erasesize = spi->erase_size; 628
250 efx_mtd->mtd.writesize = 1; 629 while (nvram_types != 0) {
251 efx_mtd_rename(efx); 630 if (nvram_types & 1) {
252 631 rc = siena_mtd_probe_partition(efx, efx_mtd,
253 efx_mtd->mtd.owner = THIS_MODULE; 632 efx_mtd->n_parts, type);
254 efx_mtd->mtd.priv = efx_mtd; 633 if (rc == 0)
255 efx_mtd->mtd.name = efx_mtd->name; 634 efx_mtd->n_parts++;
256 efx_mtd->mtd.erase = efx_mtd_erase; 635 else if (rc != -ENODEV)
257 efx_mtd->mtd.read = efx_mtd_read; 636 goto fail;
258 efx_mtd->mtd.write = efx_mtd_write; 637 }
259 efx_mtd->mtd.sync = efx_mtd_sync; 638 type++;
260 639 nvram_types >>= 1;
261 if (add_mtd_device(&efx_mtd->mtd)) {
262 kfree(efx_mtd);
263 spi->mtd = NULL;
264 /* add_mtd_device() returns 1 if the MTD table is full */
265 return -ENOMEM;
266 } 640 }
267 641
268 return 0; 642 rc = siena_mtd_get_fw_subtypes(efx, efx_mtd);
643 if (rc)
644 goto fail;
645
646 rc = efx_mtd_probe_device(efx, efx_mtd);
647fail:
648 if (rc)
649 kfree(efx_mtd);
650 return rc;
269} 651}
652