diff options
Diffstat (limited to 'drivers/net/sfc/falcon.c')
| -rw-r--r-- | drivers/net/sfc/falcon.c | 117 |
1 files changed, 18 insertions, 99 deletions
diff --git a/drivers/net/sfc/falcon.c b/drivers/net/sfc/falcon.c index b398a4198042..254a599935c1 100644 --- a/drivers/net/sfc/falcon.c +++ b/drivers/net/sfc/falcon.c | |||
| @@ -446,30 +446,19 @@ static void falcon_reset_macs(struct efx_nic *efx) | |||
| 446 | /* It's not safe to use GLB_CTL_REG to reset the | 446 | /* It's not safe to use GLB_CTL_REG to reset the |
| 447 | * macs, so instead use the internal MAC resets | 447 | * macs, so instead use the internal MAC resets |
| 448 | */ | 448 | */ |
| 449 | if (!EFX_IS10G(efx)) { | 449 | EFX_POPULATE_OWORD_1(reg, FRF_AB_XM_CORE_RST, 1); |
| 450 | EFX_POPULATE_OWORD_1(reg, FRF_AB_GM_SW_RST, 1); | 450 | efx_writeo(efx, ®, FR_AB_XM_GLB_CFG); |
| 451 | efx_writeo(efx, ®, FR_AB_GM_CFG1); | 451 | |
| 452 | udelay(1000); | 452 | for (count = 0; count < 10000; count++) { |
| 453 | 453 | efx_reado(efx, ®, FR_AB_XM_GLB_CFG); | |
| 454 | EFX_POPULATE_OWORD_1(reg, FRF_AB_GM_SW_RST, 0); | 454 | if (EFX_OWORD_FIELD(reg, FRF_AB_XM_CORE_RST) == |
| 455 | efx_writeo(efx, ®, FR_AB_GM_CFG1); | 455 | 0) |
| 456 | udelay(1000); | 456 | return; |
| 457 | return; | 457 | udelay(10); |
| 458 | } else { | ||
| 459 | EFX_POPULATE_OWORD_1(reg, FRF_AB_XM_CORE_RST, 1); | ||
| 460 | efx_writeo(efx, ®, FR_AB_XM_GLB_CFG); | ||
| 461 | |||
| 462 | for (count = 0; count < 10000; count++) { | ||
| 463 | efx_reado(efx, ®, FR_AB_XM_GLB_CFG); | ||
| 464 | if (EFX_OWORD_FIELD(reg, FRF_AB_XM_CORE_RST) == | ||
| 465 | 0) | ||
| 466 | return; | ||
| 467 | udelay(10); | ||
| 468 | } | ||
| 469 | |||
| 470 | netif_err(efx, hw, efx->net_dev, | ||
| 471 | "timed out waiting for XMAC core reset\n"); | ||
| 472 | } | 458 | } |
| 459 | |||
| 460 | netif_err(efx, hw, efx->net_dev, | ||
| 461 | "timed out waiting for XMAC core reset\n"); | ||
| 473 | } | 462 | } |
| 474 | 463 | ||
| 475 | /* Mac stats will fail whist the TX fifo is draining */ | 464 | /* Mac stats will fail whist the TX fifo is draining */ |
| @@ -508,7 +497,6 @@ static void falcon_reset_macs(struct efx_nic *efx) | |||
| 508 | * are re-enabled by the caller */ | 497 | * are re-enabled by the caller */ |
| 509 | efx_writeo(efx, &mac_ctrl, FR_AB_MAC_CTRL); | 498 | efx_writeo(efx, &mac_ctrl, FR_AB_MAC_CTRL); |
| 510 | 499 | ||
| 511 | /* This can run even when the GMAC is selected */ | ||
| 512 | falcon_setup_xaui(efx); | 500 | falcon_setup_xaui(efx); |
| 513 | } | 501 | } |
| 514 | 502 | ||
| @@ -646,8 +634,6 @@ static void falcon_stats_timer_func(unsigned long context) | |||
| 646 | spin_unlock(&efx->stats_lock); | 634 | spin_unlock(&efx->stats_lock); |
| 647 | } | 635 | } |
| 648 | 636 | ||
| 649 | static void falcon_switch_mac(struct efx_nic *efx); | ||
| 650 | |||
| 651 | static bool falcon_loopback_link_poll(struct efx_nic *efx) | 637 | static bool falcon_loopback_link_poll(struct efx_nic *efx) |
| 652 | { | 638 | { |
| 653 | struct efx_link_state old_state = efx->link_state; | 639 | struct efx_link_state old_state = efx->link_state; |
| @@ -658,11 +644,7 @@ static bool falcon_loopback_link_poll(struct efx_nic *efx) | |||
| 658 | efx->link_state.fd = true; | 644 | efx->link_state.fd = true; |
| 659 | efx->link_state.fc = efx->wanted_fc; | 645 | efx->link_state.fc = efx->wanted_fc; |
| 660 | efx->link_state.up = true; | 646 | efx->link_state.up = true; |
| 661 | 647 | efx->link_state.speed = 10000; | |
| 662 | if (efx->loopback_mode == LOOPBACK_GMAC) | ||
| 663 | efx->link_state.speed = 1000; | ||
| 664 | else | ||
| 665 | efx->link_state.speed = 10000; | ||
| 666 | 648 | ||
| 667 | return !efx_link_state_equal(&efx->link_state, &old_state); | 649 | return !efx_link_state_equal(&efx->link_state, &old_state); |
| 668 | } | 650 | } |
| @@ -685,7 +667,7 @@ static int falcon_reconfigure_port(struct efx_nic *efx) | |||
| 685 | falcon_stop_nic_stats(efx); | 667 | falcon_stop_nic_stats(efx); |
| 686 | falcon_deconfigure_mac_wrapper(efx); | 668 | falcon_deconfigure_mac_wrapper(efx); |
| 687 | 669 | ||
| 688 | falcon_switch_mac(efx); | 670 | falcon_reset_macs(efx); |
| 689 | 671 | ||
| 690 | efx->phy_op->reconfigure(efx); | 672 | efx->phy_op->reconfigure(efx); |
| 691 | rc = efx->mac_op->reconfigure(efx); | 673 | rc = efx->mac_op->reconfigure(efx); |
| @@ -835,69 +817,16 @@ out: | |||
| 835 | return rc; | 817 | return rc; |
| 836 | } | 818 | } |
| 837 | 819 | ||
| 838 | static void falcon_clock_mac(struct efx_nic *efx) | ||
| 839 | { | ||
| 840 | unsigned strap_val; | ||
| 841 | efx_oword_t nic_stat; | ||
| 842 | |||
| 843 | /* Configure the NIC generated MAC clock correctly */ | ||
| 844 | efx_reado(efx, &nic_stat, FR_AB_NIC_STAT); | ||
| 845 | strap_val = EFX_IS10G(efx) ? 5 : 3; | ||
| 846 | if (efx_nic_rev(efx) >= EFX_REV_FALCON_B0) { | ||
| 847 | EFX_SET_OWORD_FIELD(nic_stat, FRF_BB_EE_STRAP_EN, 1); | ||
| 848 | EFX_SET_OWORD_FIELD(nic_stat, FRF_BB_EE_STRAP, strap_val); | ||
| 849 | efx_writeo(efx, &nic_stat, FR_AB_NIC_STAT); | ||
| 850 | } else { | ||
| 851 | /* Falcon A1 does not support 1G/10G speed switching | ||
| 852 | * and must not be used with a PHY that does. */ | ||
| 853 | BUG_ON(EFX_OWORD_FIELD(nic_stat, FRF_AB_STRAP_PINS) != | ||
| 854 | strap_val); | ||
| 855 | } | ||
| 856 | } | ||
| 857 | |||
| 858 | static void falcon_switch_mac(struct efx_nic *efx) | ||
| 859 | { | ||
| 860 | struct efx_mac_operations *old_mac_op = efx->mac_op; | ||
| 861 | struct falcon_nic_data *nic_data = efx->nic_data; | ||
| 862 | unsigned int stats_done_offset; | ||
| 863 | |||
| 864 | WARN_ON(!mutex_is_locked(&efx->mac_lock)); | ||
| 865 | WARN_ON(nic_data->stats_disable_count == 0); | ||
| 866 | |||
| 867 | efx->mac_op = (EFX_IS10G(efx) ? | ||
| 868 | &falcon_xmac_operations : &falcon_gmac_operations); | ||
| 869 | |||
| 870 | if (EFX_IS10G(efx)) | ||
| 871 | stats_done_offset = XgDmaDone_offset; | ||
| 872 | else | ||
| 873 | stats_done_offset = GDmaDone_offset; | ||
| 874 | nic_data->stats_dma_done = efx->stats_buffer.addr + stats_done_offset; | ||
| 875 | |||
| 876 | if (old_mac_op == efx->mac_op) | ||
| 877 | return; | ||
| 878 | |||
| 879 | falcon_clock_mac(efx); | ||
| 880 | |||
| 881 | netif_dbg(efx, hw, efx->net_dev, "selected %cMAC\n", | ||
| 882 | EFX_IS10G(efx) ? 'X' : 'G'); | ||
| 883 | /* Not all macs support a mac-level link state */ | ||
| 884 | efx->xmac_poll_required = false; | ||
| 885 | falcon_reset_macs(efx); | ||
| 886 | } | ||
| 887 | |||
| 888 | /* This call is responsible for hooking in the MAC and PHY operations */ | 820 | /* This call is responsible for hooking in the MAC and PHY operations */ |
| 889 | static int falcon_probe_port(struct efx_nic *efx) | 821 | static int falcon_probe_port(struct efx_nic *efx) |
| 890 | { | 822 | { |
| 823 | struct falcon_nic_data *nic_data = efx->nic_data; | ||
| 891 | int rc; | 824 | int rc; |
| 892 | 825 | ||
| 893 | switch (efx->phy_type) { | 826 | switch (efx->phy_type) { |
| 894 | case PHY_TYPE_SFX7101: | 827 | case PHY_TYPE_SFX7101: |
| 895 | efx->phy_op = &falcon_sfx7101_phy_ops; | 828 | efx->phy_op = &falcon_sfx7101_phy_ops; |
| 896 | break; | 829 | break; |
| 897 | case PHY_TYPE_SFT9001A: | ||
| 898 | case PHY_TYPE_SFT9001B: | ||
| 899 | efx->phy_op = &falcon_sft9001_phy_ops; | ||
| 900 | break; | ||
| 901 | case PHY_TYPE_QT2022C2: | 830 | case PHY_TYPE_QT2022C2: |
| 902 | case PHY_TYPE_QT2025C: | 831 | case PHY_TYPE_QT2025C: |
| 903 | efx->phy_op = &falcon_qt202x_phy_ops; | 832 | efx->phy_op = &falcon_qt202x_phy_ops; |
| @@ -937,6 +866,7 @@ static int falcon_probe_port(struct efx_nic *efx) | |||
| 937 | (u64)efx->stats_buffer.dma_addr, | 866 | (u64)efx->stats_buffer.dma_addr, |
| 938 | efx->stats_buffer.addr, | 867 | efx->stats_buffer.addr, |
| 939 | (u64)virt_to_phys(efx->stats_buffer.addr)); | 868 | (u64)virt_to_phys(efx->stats_buffer.addr)); |
| 869 | nic_data->stats_dma_done = efx->stats_buffer.addr + XgDmaDone_offset; | ||
| 940 | 870 | ||
| 941 | return 0; | 871 | return 0; |
| 942 | } | 872 | } |
| @@ -1201,7 +1131,7 @@ static void falcon_monitor(struct efx_nic *efx) | |||
| 1201 | falcon_stop_nic_stats(efx); | 1131 | falcon_stop_nic_stats(efx); |
| 1202 | falcon_deconfigure_mac_wrapper(efx); | 1132 | falcon_deconfigure_mac_wrapper(efx); |
| 1203 | 1133 | ||
| 1204 | falcon_switch_mac(efx); | 1134 | falcon_reset_macs(efx); |
| 1205 | rc = efx->mac_op->reconfigure(efx); | 1135 | rc = efx->mac_op->reconfigure(efx); |
| 1206 | BUG_ON(rc); | 1136 | BUG_ON(rc); |
| 1207 | 1137 | ||
| @@ -1210,8 +1140,7 @@ static void falcon_monitor(struct efx_nic *efx) | |||
| 1210 | efx_link_status_changed(efx); | 1140 | efx_link_status_changed(efx); |
| 1211 | } | 1141 | } |
| 1212 | 1142 | ||
| 1213 | if (EFX_IS10G(efx)) | 1143 | falcon_poll_xmac(efx); |
| 1214 | falcon_poll_xmac(efx); | ||
| 1215 | } | 1144 | } |
| 1216 | 1145 | ||
| 1217 | /* Zeroes out the SRAM contents. This routine must be called in | 1146 | /* Zeroes out the SRAM contents. This routine must be called in |
| @@ -1604,16 +1533,6 @@ static int falcon_init_nic(struct efx_nic *efx) | |||
| 1604 | EFX_SET_OWORD_FIELD(temp, FRF_AB_ONCHIP_SRAM, 1); | 1533 | EFX_SET_OWORD_FIELD(temp, FRF_AB_ONCHIP_SRAM, 1); |
| 1605 | efx_writeo(efx, &temp, FR_AB_NIC_STAT); | 1534 | efx_writeo(efx, &temp, FR_AB_NIC_STAT); |
| 1606 | 1535 | ||
| 1607 | /* Set the source of the GMAC clock */ | ||
| 1608 | if (efx_nic_rev(efx) == EFX_REV_FALCON_B0) { | ||
| 1609 | efx_reado(efx, &temp, FR_AB_GPIO_CTL); | ||
| 1610 | EFX_SET_OWORD_FIELD(temp, FRF_AB_USE_NIC_CLK, true); | ||
| 1611 | efx_writeo(efx, &temp, FR_AB_GPIO_CTL); | ||
| 1612 | } | ||
| 1613 | |||
| 1614 | /* Select the correct MAC */ | ||
| 1615 | falcon_clock_mac(efx); | ||
| 1616 | |||
| 1617 | rc = falcon_reset_sram(efx); | 1536 | rc = falcon_reset_sram(efx); |
| 1618 | if (rc) | 1537 | if (rc) |
| 1619 | return rc; | 1538 | return rc; |
