diff options
Diffstat (limited to 'drivers/net/s2io.h')
-rw-r--r-- | drivers/net/s2io.h | 91 |
1 files changed, 47 insertions, 44 deletions
diff --git a/drivers/net/s2io.h b/drivers/net/s2io.h index 1cc24b56760e..419aad7f10e7 100644 --- a/drivers/net/s2io.h +++ b/drivers/net/s2io.h | |||
@@ -418,7 +418,7 @@ typedef struct list_info_hold { | |||
418 | void *list_virt_addr; | 418 | void *list_virt_addr; |
419 | } list_info_hold_t; | 419 | } list_info_hold_t; |
420 | 420 | ||
421 | /* Rx descriptor structure */ | 421 | /* Rx descriptor structure for 1 buffer mode */ |
422 | typedef struct _RxD_t { | 422 | typedef struct _RxD_t { |
423 | u64 Host_Control; /* reserved for host */ | 423 | u64 Host_Control; /* reserved for host */ |
424 | u64 Control_1; | 424 | u64 Control_1; |
@@ -439,49 +439,54 @@ typedef struct _RxD_t { | |||
439 | #define SET_RXD_MARKER vBIT(THE_RXD_MARK, 0, 2) | 439 | #define SET_RXD_MARKER vBIT(THE_RXD_MARK, 0, 2) |
440 | #define GET_RXD_MARKER(ctrl) ((ctrl & SET_RXD_MARKER) >> 62) | 440 | #define GET_RXD_MARKER(ctrl) ((ctrl & SET_RXD_MARKER) >> 62) |
441 | 441 | ||
442 | #ifndef CONFIG_2BUFF_MODE | ||
443 | #define MASK_BUFFER0_SIZE vBIT(0x3FFF,2,14) | ||
444 | #define SET_BUFFER0_SIZE(val) vBIT(val,2,14) | ||
445 | #else | ||
446 | #define MASK_BUFFER0_SIZE vBIT(0xFF,2,14) | ||
447 | #define MASK_BUFFER1_SIZE vBIT(0xFFFF,16,16) | ||
448 | #define MASK_BUFFER2_SIZE vBIT(0xFFFF,32,16) | ||
449 | #define SET_BUFFER0_SIZE(val) vBIT(val,8,8) | ||
450 | #define SET_BUFFER1_SIZE(val) vBIT(val,16,16) | ||
451 | #define SET_BUFFER2_SIZE(val) vBIT(val,32,16) | ||
452 | #endif | ||
453 | |||
454 | #define MASK_VLAN_TAG vBIT(0xFFFF,48,16) | 442 | #define MASK_VLAN_TAG vBIT(0xFFFF,48,16) |
455 | #define SET_VLAN_TAG(val) vBIT(val,48,16) | 443 | #define SET_VLAN_TAG(val) vBIT(val,48,16) |
456 | #define SET_NUM_TAG(val) vBIT(val,16,32) | 444 | #define SET_NUM_TAG(val) vBIT(val,16,32) |
457 | 445 | ||
458 | #ifndef CONFIG_2BUFF_MODE | 446 | |
459 | #define RXD_GET_BUFFER0_SIZE(Control_2) (u64)((Control_2 & vBIT(0x3FFF,2,14))) | 447 | } RxD_t; |
460 | #else | 448 | /* Rx descriptor structure for 1 buffer mode */ |
461 | #define RXD_GET_BUFFER0_SIZE(Control_2) (u8)((Control_2 & MASK_BUFFER0_SIZE) \ | 449 | typedef struct _RxD1_t { |
462 | >> 48) | 450 | struct _RxD_t h; |
463 | #define RXD_GET_BUFFER1_SIZE(Control_2) (u16)((Control_2 & MASK_BUFFER1_SIZE) \ | 451 | |
464 | >> 32) | 452 | #define MASK_BUFFER0_SIZE_1 vBIT(0x3FFF,2,14) |
465 | #define RXD_GET_BUFFER2_SIZE(Control_2) (u16)((Control_2 & MASK_BUFFER2_SIZE) \ | 453 | #define SET_BUFFER0_SIZE_1(val) vBIT(val,2,14) |
466 | >> 16) | 454 | #define RXD_GET_BUFFER0_SIZE_1(_Control_2) \ |
455 | (u16)((_Control_2 & MASK_BUFFER0_SIZE_1) >> 48) | ||
456 | u64 Buffer0_ptr; | ||
457 | } RxD1_t; | ||
458 | /* Rx descriptor structure for 3 or 2 buffer mode */ | ||
459 | |||
460 | typedef struct _RxD3_t { | ||
461 | struct _RxD_t h; | ||
462 | |||
463 | #define MASK_BUFFER0_SIZE_3 vBIT(0xFF,2,14) | ||
464 | #define MASK_BUFFER1_SIZE_3 vBIT(0xFFFF,16,16) | ||
465 | #define MASK_BUFFER2_SIZE_3 vBIT(0xFFFF,32,16) | ||
466 | #define SET_BUFFER0_SIZE_3(val) vBIT(val,8,8) | ||
467 | #define SET_BUFFER1_SIZE_3(val) vBIT(val,16,16) | ||
468 | #define SET_BUFFER2_SIZE_3(val) vBIT(val,32,16) | ||
469 | #define RXD_GET_BUFFER0_SIZE_3(Control_2) \ | ||
470 | (u8)((Control_2 & MASK_BUFFER0_SIZE_3) >> 48) | ||
471 | #define RXD_GET_BUFFER1_SIZE_3(Control_2) \ | ||
472 | (u16)((Control_2 & MASK_BUFFER1_SIZE_3) >> 32) | ||
473 | #define RXD_GET_BUFFER2_SIZE_3(Control_2) \ | ||
474 | (u16)((Control_2 & MASK_BUFFER2_SIZE_3) >> 16) | ||
467 | #define BUF0_LEN 40 | 475 | #define BUF0_LEN 40 |
468 | #define BUF1_LEN 1 | 476 | #define BUF1_LEN 1 |
469 | #endif | ||
470 | 477 | ||
471 | u64 Buffer0_ptr; | 478 | u64 Buffer0_ptr; |
472 | #ifdef CONFIG_2BUFF_MODE | ||
473 | u64 Buffer1_ptr; | 479 | u64 Buffer1_ptr; |
474 | u64 Buffer2_ptr; | 480 | u64 Buffer2_ptr; |
475 | #endif | 481 | } RxD3_t; |
476 | } RxD_t; | 482 | |
477 | 483 | ||
478 | /* Structure that represents the Rx descriptor block which contains | 484 | /* Structure that represents the Rx descriptor block which contains |
479 | * 128 Rx descriptors. | 485 | * 128 Rx descriptors. |
480 | */ | 486 | */ |
481 | #ifndef CONFIG_2BUFF_MODE | ||
482 | typedef struct _RxD_block { | 487 | typedef struct _RxD_block { |
483 | #define MAX_RXDS_PER_BLOCK 127 | 488 | #define MAX_RXDS_PER_BLOCK_1 127 |
484 | RxD_t rxd[MAX_RXDS_PER_BLOCK]; | 489 | RxD1_t rxd[MAX_RXDS_PER_BLOCK_1]; |
485 | 490 | ||
486 | u64 reserved_0; | 491 | u64 reserved_0; |
487 | #define END_OF_BLOCK 0xFEFFFFFFFFFFFFFFULL | 492 | #define END_OF_BLOCK 0xFEFFFFFFFFFFFFFFULL |
@@ -492,18 +497,13 @@ typedef struct _RxD_block { | |||
492 | * the upper 32 bits should | 497 | * the upper 32 bits should |
493 | * be 0 */ | 498 | * be 0 */ |
494 | } RxD_block_t; | 499 | } RxD_block_t; |
495 | #else | ||
496 | typedef struct _RxD_block { | ||
497 | #define MAX_RXDS_PER_BLOCK 85 | ||
498 | RxD_t rxd[MAX_RXDS_PER_BLOCK]; | ||
499 | 500 | ||
500 | #define END_OF_BLOCK 0xFEFFFFFFFFFFFFFFULL | ||
501 | u64 reserved_1; /* 0xFEFFFFFFFFFFFFFF to mark last Rxd | ||
502 | * in this blk */ | ||
503 | u64 pNext_RxD_Blk_physical; /* Phy ponter to next blk. */ | ||
504 | } RxD_block_t; | ||
505 | #define SIZE_OF_BLOCK 4096 | 501 | #define SIZE_OF_BLOCK 4096 |
506 | 502 | ||
503 | #define RXD_MODE_1 0 | ||
504 | #define RXD_MODE_3A 1 | ||
505 | #define RXD_MODE_3B 2 | ||
506 | |||
507 | /* Structure to hold virtual addresses of Buf0 and Buf1 in | 507 | /* Structure to hold virtual addresses of Buf0 and Buf1 in |
508 | * 2buf mode. */ | 508 | * 2buf mode. */ |
509 | typedef struct bufAdd { | 509 | typedef struct bufAdd { |
@@ -512,7 +512,6 @@ typedef struct bufAdd { | |||
512 | void *ba_0; | 512 | void *ba_0; |
513 | void *ba_1; | 513 | void *ba_1; |
514 | } buffAdd_t; | 514 | } buffAdd_t; |
515 | #endif | ||
516 | 515 | ||
517 | /* Structure which stores all the MAC control parameters */ | 516 | /* Structure which stores all the MAC control parameters */ |
518 | 517 | ||
@@ -539,10 +538,17 @@ typedef struct { | |||
539 | 538 | ||
540 | typedef tx_curr_get_info_t tx_curr_put_info_t; | 539 | typedef tx_curr_get_info_t tx_curr_put_info_t; |
541 | 540 | ||
541 | |||
542 | typedef struct rxd_info { | ||
543 | void *virt_addr; | ||
544 | dma_addr_t dma_addr; | ||
545 | }rxd_info_t; | ||
546 | |||
542 | /* Structure that holds the Phy and virt addresses of the Blocks */ | 547 | /* Structure that holds the Phy and virt addresses of the Blocks */ |
543 | typedef struct rx_block_info { | 548 | typedef struct rx_block_info { |
544 | RxD_t *block_virt_addr; | 549 | void *block_virt_addr; |
545 | dma_addr_t block_dma_addr; | 550 | dma_addr_t block_dma_addr; |
551 | rxd_info_t *rxds; | ||
546 | } rx_block_info_t; | 552 | } rx_block_info_t; |
547 | 553 | ||
548 | /* pre declaration of the nic structure */ | 554 | /* pre declaration of the nic structure */ |
@@ -578,10 +584,8 @@ typedef struct ring_info { | |||
578 | int put_pos; | 584 | int put_pos; |
579 | #endif | 585 | #endif |
580 | 586 | ||
581 | #ifdef CONFIG_2BUFF_MODE | ||
582 | /* Buffer Address store. */ | 587 | /* Buffer Address store. */ |
583 | buffAdd_t **ba; | 588 | buffAdd_t **ba; |
584 | #endif | ||
585 | nic_t *nic; | 589 | nic_t *nic; |
586 | } ring_info_t; | 590 | } ring_info_t; |
587 | 591 | ||
@@ -647,8 +651,6 @@ typedef struct { | |||
647 | 651 | ||
648 | /* Default Tunable parameters of the NIC. */ | 652 | /* Default Tunable parameters of the NIC. */ |
649 | #define DEFAULT_FIFO_LEN 4096 | 653 | #define DEFAULT_FIFO_LEN 4096 |
650 | #define SMALL_RXD_CNT 30 * (MAX_RXDS_PER_BLOCK+1) | ||
651 | #define LARGE_RXD_CNT 100 * (MAX_RXDS_PER_BLOCK+1) | ||
652 | #define SMALL_BLK_CNT 30 | 654 | #define SMALL_BLK_CNT 30 |
653 | #define LARGE_BLK_CNT 100 | 655 | #define LARGE_BLK_CNT 100 |
654 | 656 | ||
@@ -678,6 +680,7 @@ struct msix_info_st { | |||
678 | 680 | ||
679 | /* Structure representing one instance of the NIC */ | 681 | /* Structure representing one instance of the NIC */ |
680 | struct s2io_nic { | 682 | struct s2io_nic { |
683 | int rxd_mode; | ||
681 | #ifdef CONFIG_S2IO_NAPI | 684 | #ifdef CONFIG_S2IO_NAPI |
682 | /* | 685 | /* |
683 | * Count of packets to be processed in a given iteration, it will be indicated | 686 | * Count of packets to be processed in a given iteration, it will be indicated |