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path: root/drivers/net/s2io-regs.h
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Diffstat (limited to 'drivers/net/s2io-regs.h')
-rw-r--r--drivers/net/s2io-regs.h7
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/net/s2io-regs.h b/drivers/net/s2io-regs.h
index 8746740e6efd..826deb0eb03a 100644
--- a/drivers/net/s2io-regs.h
+++ b/drivers/net/s2io-regs.h
@@ -62,6 +62,7 @@ typedef struct _XENA_dev_config {
62#define ADAPTER_STATUS_RMAC_REMOTE_FAULT BIT(6) 62#define ADAPTER_STATUS_RMAC_REMOTE_FAULT BIT(6)
63#define ADAPTER_STATUS_RMAC_LOCAL_FAULT BIT(7) 63#define ADAPTER_STATUS_RMAC_LOCAL_FAULT BIT(7)
64#define ADAPTER_STATUS_RMAC_PCC_IDLE vBIT(0xFF,8,8) 64#define ADAPTER_STATUS_RMAC_PCC_IDLE vBIT(0xFF,8,8)
65#define ADAPTER_STATUS_RMAC_PCC_FOUR_IDLE vBIT(0x0F,8,8)
65#define ADAPTER_STATUS_RC_PRC_QUIESCENT vBIT(0xFF,16,8) 66#define ADAPTER_STATUS_RC_PRC_QUIESCENT vBIT(0xFF,16,8)
66#define ADAPTER_STATUS_MC_DRAM_READY BIT(24) 67#define ADAPTER_STATUS_MC_DRAM_READY BIT(24)
67#define ADAPTER_STATUS_MC_QUEUES_READY BIT(25) 68#define ADAPTER_STATUS_MC_QUEUES_READY BIT(25)
@@ -245,6 +246,7 @@ typedef struct _XENA_dev_config {
245#define STAT_TRSF_PER(n) TBD 246#define STAT_TRSF_PER(n) TBD
246#define PER_SEC 0x208d5 247#define PER_SEC 0x208d5
247#define SET_UPDT_PERIOD(n) vBIT((PER_SEC*n),32,32) 248#define SET_UPDT_PERIOD(n) vBIT((PER_SEC*n),32,32)
249#define SET_UPDT_CLICKS(val) vBIT(val, 32, 32)
248 250
249 u64 stat_addr; 251 u64 stat_addr;
250 252
@@ -289,6 +291,7 @@ typedef struct _XENA_dev_config {
289 291
290 u64 pcc_err_reg; 292 u64 pcc_err_reg;
291#define PCC_FB_ECC_DB_ERR vBIT(0xFF, 16, 8) 293#define PCC_FB_ECC_DB_ERR vBIT(0xFF, 16, 8)
294#define PCC_ENABLE_FOUR vBIT(0x0F,0,8)
292 295
293 u64 pcc_err_mask; 296 u64 pcc_err_mask;
294 u64 pcc_err_alarm; 297 u64 pcc_err_alarm;
@@ -690,6 +693,10 @@ typedef struct _XENA_dev_config {
690#define MC_ERR_REG_MIRI_CRI_ERR_0 BIT(22) 693#define MC_ERR_REG_MIRI_CRI_ERR_0 BIT(22)
691#define MC_ERR_REG_MIRI_CRI_ERR_1 BIT(23) 694#define MC_ERR_REG_MIRI_CRI_ERR_1 BIT(23)
692#define MC_ERR_REG_SM_ERR BIT(31) 695#define MC_ERR_REG_SM_ERR BIT(31)
696#define MC_ERR_REG_ECC_ALL_SNG (BIT(6) | \
697 BIT(7) | BIT(17) | BIT(19))
698#define MC_ERR_REG_ECC_ALL_DBL (BIT(14) | \
699 BIT(15) | BIT(18) | BIT(20))
693 u64 mc_err_mask; 700 u64 mc_err_mask;
694 u64 mc_err_alarm; 701 u64 mc_err_alarm;
695 702