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path: root/drivers/net/r8169.c
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Diffstat (limited to 'drivers/net/r8169.c')
-rw-r--r--drivers/net/r8169.c22
1 files changed, 14 insertions, 8 deletions
diff --git a/drivers/net/r8169.c b/drivers/net/r8169.c
index 312446234509..33c3fbf227f4 100644
--- a/drivers/net/r8169.c
+++ b/drivers/net/r8169.c
@@ -67,7 +67,6 @@ static const int multicast_filter_limit = 32;
67#define RX_FIFO_THRESH 7 /* 7 means NO threshold, Rx buffer level before first PCI xfer. */ 67#define RX_FIFO_THRESH 7 /* 7 means NO threshold, Rx buffer level before first PCI xfer. */
68#define RX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */ 68#define RX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */
69#define TX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */ 69#define TX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */
70#define EarlyTxThld 0x3F /* 0x3F means NO early transmit */
71#define SafeMtu 0x1c20 /* ... actually life sucks beyond ~7k */ 70#define SafeMtu 0x1c20 /* ... actually life sucks beyond ~7k */
72#define InterFrameGap 0x03 /* 3 means InterFrameGap = the shortest one */ 71#define InterFrameGap 0x03 /* 3 means InterFrameGap = the shortest one */
73 72
@@ -231,7 +230,14 @@ enum rtl_registers {
231 IntrMitigate = 0xe2, 230 IntrMitigate = 0xe2,
232 RxDescAddrLow = 0xe4, 231 RxDescAddrLow = 0xe4,
233 RxDescAddrHigh = 0xe8, 232 RxDescAddrHigh = 0xe8,
234 EarlyTxThres = 0xec, 233 EarlyTxThres = 0xec, /* 8169. Unit of 32 bytes. */
234
235#define NoEarlyTx 0x3f /* Max value : no early transmit. */
236
237 MaxTxPacketSize = 0xec, /* 8101/8168. Unit of 128 bytes. */
238
239#define TxPacketMax (8064 >> 7)
240
235 FuncEvent = 0xf0, 241 FuncEvent = 0xf0,
236 FuncEventMask = 0xf4, 242 FuncEventMask = 0xf4,
237 FuncPresetState = 0xf8, 243 FuncPresetState = 0xf8,
@@ -2901,7 +2907,7 @@ static void rtl_hw_start_8169(struct net_device *dev)
2901 (tp->mac_version == RTL_GIGA_MAC_VER_04)) 2907 (tp->mac_version == RTL_GIGA_MAC_VER_04))
2902 RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb); 2908 RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);
2903 2909
2904 RTL_W8(EarlyTxThres, EarlyTxThld); 2910 RTL_W8(EarlyTxThres, NoEarlyTx);
2905 2911
2906 rtl_set_rx_max_size(ioaddr, rx_buf_sz); 2912 rtl_set_rx_max_size(ioaddr, rx_buf_sz);
2907 2913
@@ -3036,7 +3042,7 @@ static void rtl_hw_start_8168bef(void __iomem *ioaddr, struct pci_dev *pdev)
3036{ 3042{
3037 rtl_hw_start_8168bb(ioaddr, pdev); 3043 rtl_hw_start_8168bb(ioaddr, pdev);
3038 3044
3039 RTL_W8(EarlyTxThres, EarlyTxThld); 3045 RTL_W8(MaxTxPacketSize, TxPacketMax);
3040 3046
3041 RTL_W8(Config4, RTL_R8(Config4) & ~(1 << 0)); 3047 RTL_W8(Config4, RTL_R8(Config4) & ~(1 << 0));
3042} 3048}
@@ -3091,7 +3097,7 @@ static void rtl_hw_start_8168cp_3(void __iomem *ioaddr, struct pci_dev *pdev)
3091 /* Magic. */ 3097 /* Magic. */
3092 RTL_W8(DBG_REG, 0x20); 3098 RTL_W8(DBG_REG, 0x20);
3093 3099
3094 RTL_W8(EarlyTxThres, EarlyTxThld); 3100 RTL_W8(MaxTxPacketSize, TxPacketMax);
3095 3101
3096 rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT); 3102 rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);
3097 3103
@@ -3147,7 +3153,7 @@ static void rtl_hw_start_8168d(void __iomem *ioaddr, struct pci_dev *pdev)
3147 3153
3148 rtl_disable_clock_request(pdev); 3154 rtl_disable_clock_request(pdev);
3149 3155
3150 RTL_W8(EarlyTxThres, EarlyTxThld); 3156 RTL_W8(MaxTxPacketSize, TxPacketMax);
3151 3157
3152 rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT); 3158 rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);
3153 3159
@@ -3162,7 +3168,7 @@ static void rtl_hw_start_8168(struct net_device *dev)
3162 3168
3163 RTL_W8(Cfg9346, Cfg9346_Unlock); 3169 RTL_W8(Cfg9346, Cfg9346_Unlock);
3164 3170
3165 RTL_W8(EarlyTxThres, EarlyTxThld); 3171 RTL_W8(MaxTxPacketSize, TxPacketMax);
3166 3172
3167 rtl_set_rx_max_size(ioaddr, rx_buf_sz); 3173 rtl_set_rx_max_size(ioaddr, rx_buf_sz);
3168 3174
@@ -3342,7 +3348,7 @@ static void rtl_hw_start_8101(struct net_device *dev)
3342 3348
3343 RTL_W8(Cfg9346, Cfg9346_Unlock); 3349 RTL_W8(Cfg9346, Cfg9346_Unlock);
3344 3350
3345 RTL_W8(EarlyTxThres, EarlyTxThld); 3351 RTL_W8(MaxTxPacketSize, TxPacketMax);
3346 3352
3347 rtl_set_rx_max_size(ioaddr, rx_buf_sz); 3353 rtl_set_rx_max_size(ioaddr, rx_buf_sz);
3348 3354