diff options
Diffstat (limited to 'drivers/net/qlge')
-rw-r--r-- | drivers/net/qlge/qlge.h | 31 | ||||
-rw-r--r-- | drivers/net/qlge/qlge_ethtool.c | 6 | ||||
-rw-r--r-- | drivers/net/qlge/qlge_main.c | 134 | ||||
-rw-r--r-- | drivers/net/qlge/qlge_mpi.c | 58 |
4 files changed, 200 insertions, 29 deletions
diff --git a/drivers/net/qlge/qlge.h b/drivers/net/qlge/qlge.h index fcb159e4df54..156e02e8905d 100644 --- a/drivers/net/qlge/qlge.h +++ b/drivers/net/qlge/qlge.h | |||
@@ -27,6 +27,8 @@ | |||
27 | "%s: " fmt, __func__, ##args); \ | 27 | "%s: " fmt, __func__, ##args); \ |
28 | } while (0) | 28 | } while (0) |
29 | 29 | ||
30 | #define WQ_ADDR_ALIGN 0x3 /* 4 byte alignment */ | ||
31 | |||
30 | #define QLGE_VENDOR_ID 0x1077 | 32 | #define QLGE_VENDOR_ID 0x1077 |
31 | #define QLGE_DEVICE_ID_8012 0x8012 | 33 | #define QLGE_DEVICE_ID_8012 0x8012 |
32 | #define QLGE_DEVICE_ID_8000 0x8000 | 34 | #define QLGE_DEVICE_ID_8000 0x8000 |
@@ -39,7 +41,18 @@ | |||
39 | 41 | ||
40 | #define NUM_SMALL_BUFFERS 512 | 42 | #define NUM_SMALL_BUFFERS 512 |
41 | #define NUM_LARGE_BUFFERS 512 | 43 | #define NUM_LARGE_BUFFERS 512 |
44 | #define DB_PAGE_SIZE 4096 | ||
45 | |||
46 | /* Calculate the number of (4k) pages required to | ||
47 | * contain a buffer queue of the given length. | ||
48 | */ | ||
49 | #define MAX_DB_PAGES_PER_BQ(x) \ | ||
50 | (((x * sizeof(u64)) / DB_PAGE_SIZE) + \ | ||
51 | (((x * sizeof(u64)) % DB_PAGE_SIZE) ? 1 : 0)) | ||
42 | 52 | ||
53 | #define RX_RING_SHADOW_SPACE (sizeof(u64) + \ | ||
54 | MAX_DB_PAGES_PER_BQ(NUM_SMALL_BUFFERS) * sizeof(u64) + \ | ||
55 | MAX_DB_PAGES_PER_BQ(NUM_LARGE_BUFFERS) * sizeof(u64)) | ||
43 | #define SMALL_BUFFER_SIZE 256 | 56 | #define SMALL_BUFFER_SIZE 256 |
44 | #define LARGE_BUFFER_SIZE PAGE_SIZE | 57 | #define LARGE_BUFFER_SIZE PAGE_SIZE |
45 | #define MAX_SPLIT_SIZE 1023 | 58 | #define MAX_SPLIT_SIZE 1023 |
@@ -50,7 +63,7 @@ | |||
50 | #define MAX_INTER_FRAME_WAIT 10 /* 10 usec max interframe-wait for coalescing */ | 63 | #define MAX_INTER_FRAME_WAIT 10 /* 10 usec max interframe-wait for coalescing */ |
51 | #define DFLT_INTER_FRAME_WAIT (MAX_INTER_FRAME_WAIT/2) | 64 | #define DFLT_INTER_FRAME_WAIT (MAX_INTER_FRAME_WAIT/2) |
52 | #define UDELAY_COUNT 3 | 65 | #define UDELAY_COUNT 3 |
53 | #define UDELAY_DELAY 10 | 66 | #define UDELAY_DELAY 100 |
54 | 67 | ||
55 | 68 | ||
56 | #define TX_DESC_PER_IOCB 8 | 69 | #define TX_DESC_PER_IOCB 8 |
@@ -63,7 +76,16 @@ | |||
63 | #define TX_DESC_PER_OAL 0 | 76 | #define TX_DESC_PER_OAL 0 |
64 | #endif | 77 | #endif |
65 | 78 | ||
66 | #define DB_PAGE_SIZE 4096 | 79 | /* MPI test register definitions. This register |
80 | * is used for determining alternate NIC function's | ||
81 | * PCI->func number. | ||
82 | */ | ||
83 | enum { | ||
84 | MPI_TEST_FUNC_PORT_CFG = 0x1002, | ||
85 | MPI_TEST_NIC1_FUNC_SHIFT = 1, | ||
86 | MPI_TEST_NIC2_FUNC_SHIFT = 5, | ||
87 | MPI_TEST_NIC_FUNC_MASK = 0x00000007, | ||
88 | }; | ||
67 | 89 | ||
68 | /* | 90 | /* |
69 | * Processor Address Register (PROC_ADDR) bit definitions. | 91 | * Processor Address Register (PROC_ADDR) bit definitions. |
@@ -1430,7 +1452,10 @@ struct ql_adapter { | |||
1430 | 1452 | ||
1431 | /* Hardware information */ | 1453 | /* Hardware information */ |
1432 | u32 chip_rev_id; | 1454 | u32 chip_rev_id; |
1455 | u32 fw_rev_id; | ||
1433 | u32 func; /* PCI function for this adapter */ | 1456 | u32 func; /* PCI function for this adapter */ |
1457 | u32 alt_func; /* PCI function for alternate adapter */ | ||
1458 | u32 port; /* Port number this adapter */ | ||
1434 | 1459 | ||
1435 | spinlock_t adapter_lock; | 1460 | spinlock_t adapter_lock; |
1436 | spinlock_t hw_lock; | 1461 | spinlock_t hw_lock; |
@@ -1580,6 +1605,8 @@ void ql_mpi_idc_work(struct work_struct *work); | |||
1580 | void ql_mpi_port_cfg_work(struct work_struct *work); | 1605 | void ql_mpi_port_cfg_work(struct work_struct *work); |
1581 | int ql_mb_get_fw_state(struct ql_adapter *qdev); | 1606 | int ql_mb_get_fw_state(struct ql_adapter *qdev); |
1582 | int ql_cam_route_initialize(struct ql_adapter *qdev); | 1607 | int ql_cam_route_initialize(struct ql_adapter *qdev); |
1608 | int ql_read_mpi_reg(struct ql_adapter *qdev, u32 reg, u32 *data); | ||
1609 | int ql_mb_about_fw(struct ql_adapter *qdev); | ||
1583 | 1610 | ||
1584 | #if 1 | 1611 | #if 1 |
1585 | #define QL_ALL_DUMP | 1612 | #define QL_ALL_DUMP |
diff --git a/drivers/net/qlge/qlge_ethtool.c b/drivers/net/qlge/qlge_ethtool.c index 913b2a5fafc9..37c99fe79770 100644 --- a/drivers/net/qlge/qlge_ethtool.c +++ b/drivers/net/qlge/qlge_ethtool.c | |||
@@ -293,7 +293,10 @@ static void ql_get_drvinfo(struct net_device *ndev, | |||
293 | struct ql_adapter *qdev = netdev_priv(ndev); | 293 | struct ql_adapter *qdev = netdev_priv(ndev); |
294 | strncpy(drvinfo->driver, qlge_driver_name, 32); | 294 | strncpy(drvinfo->driver, qlge_driver_name, 32); |
295 | strncpy(drvinfo->version, qlge_driver_version, 32); | 295 | strncpy(drvinfo->version, qlge_driver_version, 32); |
296 | strncpy(drvinfo->fw_version, "N/A", 32); | 296 | snprintf(drvinfo->fw_version, 32, "v%d.%d.%d", |
297 | (qdev->fw_rev_id & 0x00ff0000) >> 16, | ||
298 | (qdev->fw_rev_id & 0x0000ff00) >> 8, | ||
299 | (qdev->fw_rev_id & 0x000000ff)); | ||
297 | strncpy(drvinfo->bus_info, pci_name(qdev->pdev), 32); | 300 | strncpy(drvinfo->bus_info, pci_name(qdev->pdev), 32); |
298 | drvinfo->n_stats = 0; | 301 | drvinfo->n_stats = 0; |
299 | drvinfo->testinfo_len = 0; | 302 | drvinfo->testinfo_len = 0; |
@@ -401,6 +404,7 @@ const struct ethtool_ops qlge_ethtool_ops = { | |||
401 | .get_rx_csum = ql_get_rx_csum, | 404 | .get_rx_csum = ql_get_rx_csum, |
402 | .set_rx_csum = ql_set_rx_csum, | 405 | .set_rx_csum = ql_set_rx_csum, |
403 | .get_tx_csum = ethtool_op_get_tx_csum, | 406 | .get_tx_csum = ethtool_op_get_tx_csum, |
407 | .set_tx_csum = ethtool_op_set_tx_csum, | ||
404 | .get_sg = ethtool_op_get_sg, | 408 | .get_sg = ethtool_op_get_sg, |
405 | .set_sg = ethtool_op_set_sg, | 409 | .set_sg = ethtool_op_set_sg, |
406 | .get_tso = ethtool_op_get_tso, | 410 | .get_tso = ethtool_op_get_tso, |
diff --git a/drivers/net/qlge/qlge_main.c b/drivers/net/qlge/qlge_main.c index c92ced247947..b9a5f59d6c9b 100644 --- a/drivers/net/qlge/qlge_main.c +++ b/drivers/net/qlge/qlge_main.c | |||
@@ -675,11 +675,12 @@ static int ql_get_8000_flash_params(struct ql_adapter *qdev) | |||
675 | int status; | 675 | int status; |
676 | __le32 *p = (__le32 *)&qdev->flash; | 676 | __le32 *p = (__le32 *)&qdev->flash; |
677 | u32 offset; | 677 | u32 offset; |
678 | u8 mac_addr[6]; | ||
678 | 679 | ||
679 | /* Get flash offset for function and adjust | 680 | /* Get flash offset for function and adjust |
680 | * for dword access. | 681 | * for dword access. |
681 | */ | 682 | */ |
682 | if (!qdev->func) | 683 | if (!qdev->port) |
683 | offset = FUNC0_FLASH_OFFSET / sizeof(u32); | 684 | offset = FUNC0_FLASH_OFFSET / sizeof(u32); |
684 | else | 685 | else |
685 | offset = FUNC1_FLASH_OFFSET / sizeof(u32); | 686 | offset = FUNC1_FLASH_OFFSET / sizeof(u32); |
@@ -705,14 +706,26 @@ static int ql_get_8000_flash_params(struct ql_adapter *qdev) | |||
705 | goto exit; | 706 | goto exit; |
706 | } | 707 | } |
707 | 708 | ||
708 | if (!is_valid_ether_addr(qdev->flash.flash_params_8000.mac_addr)) { | 709 | /* Extract either manufacturer or BOFM modified |
710 | * MAC address. | ||
711 | */ | ||
712 | if (qdev->flash.flash_params_8000.data_type1 == 2) | ||
713 | memcpy(mac_addr, | ||
714 | qdev->flash.flash_params_8000.mac_addr1, | ||
715 | qdev->ndev->addr_len); | ||
716 | else | ||
717 | memcpy(mac_addr, | ||
718 | qdev->flash.flash_params_8000.mac_addr, | ||
719 | qdev->ndev->addr_len); | ||
720 | |||
721 | if (!is_valid_ether_addr(mac_addr)) { | ||
709 | QPRINTK(qdev, IFUP, ERR, "Invalid MAC address.\n"); | 722 | QPRINTK(qdev, IFUP, ERR, "Invalid MAC address.\n"); |
710 | status = -EINVAL; | 723 | status = -EINVAL; |
711 | goto exit; | 724 | goto exit; |
712 | } | 725 | } |
713 | 726 | ||
714 | memcpy(qdev->ndev->dev_addr, | 727 | memcpy(qdev->ndev->dev_addr, |
715 | qdev->flash.flash_params_8000.mac_addr, | 728 | mac_addr, |
716 | qdev->ndev->addr_len); | 729 | qdev->ndev->addr_len); |
717 | 730 | ||
718 | exit: | 731 | exit: |
@@ -731,7 +744,7 @@ static int ql_get_8012_flash_params(struct ql_adapter *qdev) | |||
731 | /* Second function's parameters follow the first | 744 | /* Second function's parameters follow the first |
732 | * function's. | 745 | * function's. |
733 | */ | 746 | */ |
734 | if (qdev->func) | 747 | if (qdev->port) |
735 | offset = size; | 748 | offset = size; |
736 | 749 | ||
737 | if (ql_sem_spinlock(qdev, SEM_FLASH_MASK)) | 750 | if (ql_sem_spinlock(qdev, SEM_FLASH_MASK)) |
@@ -837,6 +850,13 @@ exit: | |||
837 | static int ql_8000_port_initialize(struct ql_adapter *qdev) | 850 | static int ql_8000_port_initialize(struct ql_adapter *qdev) |
838 | { | 851 | { |
839 | int status; | 852 | int status; |
853 | /* | ||
854 | * Get MPI firmware version for driver banner | ||
855 | * and ethool info. | ||
856 | */ | ||
857 | status = ql_mb_about_fw(qdev); | ||
858 | if (status) | ||
859 | goto exit; | ||
840 | status = ql_mb_get_fw_state(qdev); | 860 | status = ql_mb_get_fw_state(qdev); |
841 | if (status) | 861 | if (status) |
842 | goto exit; | 862 | goto exit; |
@@ -1518,6 +1538,22 @@ static void ql_process_mac_rx_intr(struct ql_adapter *qdev, | |||
1518 | return; | 1538 | return; |
1519 | } | 1539 | } |
1520 | 1540 | ||
1541 | /* Frame error, so drop the packet. */ | ||
1542 | if (ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_ERR_MASK) { | ||
1543 | QPRINTK(qdev, DRV, ERR, "Receive error, flags2 = 0x%x\n", | ||
1544 | ib_mac_rsp->flags2); | ||
1545 | dev_kfree_skb_any(skb); | ||
1546 | return; | ||
1547 | } | ||
1548 | |||
1549 | /* The max framesize filter on this chip is set higher than | ||
1550 | * MTU since FCoE uses 2k frames. | ||
1551 | */ | ||
1552 | if (skb->len > ndev->mtu + ETH_HLEN) { | ||
1553 | dev_kfree_skb_any(skb); | ||
1554 | return; | ||
1555 | } | ||
1556 | |||
1521 | prefetch(skb->data); | 1557 | prefetch(skb->data); |
1522 | skb->dev = ndev; | 1558 | skb->dev = ndev; |
1523 | if (ib_mac_rsp->flags1 & IB_MAC_IOCB_RSP_M_MASK) { | 1559 | if (ib_mac_rsp->flags1 & IB_MAC_IOCB_RSP_M_MASK) { |
@@ -1540,7 +1576,6 @@ static void ql_process_mac_rx_intr(struct ql_adapter *qdev, | |||
1540 | * csum or frame errors. | 1576 | * csum or frame errors. |
1541 | */ | 1577 | */ |
1542 | if (qdev->rx_csum && | 1578 | if (qdev->rx_csum && |
1543 | !(ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_ERR_MASK) && | ||
1544 | !(ib_mac_rsp->flags1 & IB_MAC_CSUM_ERR_MASK)) { | 1579 | !(ib_mac_rsp->flags1 & IB_MAC_CSUM_ERR_MASK)) { |
1545 | /* TCP frame. */ | 1580 | /* TCP frame. */ |
1546 | if (ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_T) { | 1581 | if (ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_T) { |
@@ -2108,7 +2143,6 @@ static int qlge_send(struct sk_buff *skb, struct net_device *ndev) | |||
2108 | wmb(); | 2143 | wmb(); |
2109 | 2144 | ||
2110 | ql_write_db_reg(tx_ring->prod_idx, tx_ring->prod_idx_db_reg); | 2145 | ql_write_db_reg(tx_ring->prod_idx, tx_ring->prod_idx_db_reg); |
2111 | ndev->trans_start = jiffies; | ||
2112 | QPRINTK(qdev, TX_QUEUED, DEBUG, "tx queued, slot %d, len %d\n", | 2146 | QPRINTK(qdev, TX_QUEUED, DEBUG, "tx queued, slot %d, len %d\n", |
2113 | tx_ring->prod_idx, skb->len); | 2147 | tx_ring->prod_idx, skb->len); |
2114 | 2148 | ||
@@ -2203,7 +2237,7 @@ static int ql_alloc_tx_resources(struct ql_adapter *qdev, | |||
2203 | &tx_ring->wq_base_dma); | 2237 | &tx_ring->wq_base_dma); |
2204 | 2238 | ||
2205 | if ((tx_ring->wq_base == NULL) | 2239 | if ((tx_ring->wq_base == NULL) |
2206 | || tx_ring->wq_base_dma & (tx_ring->wq_size - 1)) { | 2240 | || tx_ring->wq_base_dma & WQ_ADDR_ALIGN) { |
2207 | QPRINTK(qdev, IFUP, ERR, "tx_ring alloc failed.\n"); | 2241 | QPRINTK(qdev, IFUP, ERR, "tx_ring alloc failed.\n"); |
2208 | return -ENOMEM; | 2242 | return -ENOMEM; |
2209 | } | 2243 | } |
@@ -2518,14 +2552,16 @@ static int ql_start_rx_ring(struct ql_adapter *qdev, struct rx_ring *rx_ring) | |||
2518 | { | 2552 | { |
2519 | struct cqicb *cqicb = &rx_ring->cqicb; | 2553 | struct cqicb *cqicb = &rx_ring->cqicb; |
2520 | void *shadow_reg = qdev->rx_ring_shadow_reg_area + | 2554 | void *shadow_reg = qdev->rx_ring_shadow_reg_area + |
2521 | (rx_ring->cq_id * sizeof(u64) * 4); | 2555 | (rx_ring->cq_id * RX_RING_SHADOW_SPACE); |
2522 | u64 shadow_reg_dma = qdev->rx_ring_shadow_reg_dma + | 2556 | u64 shadow_reg_dma = qdev->rx_ring_shadow_reg_dma + |
2523 | (rx_ring->cq_id * sizeof(u64) * 4); | 2557 | (rx_ring->cq_id * RX_RING_SHADOW_SPACE); |
2524 | void __iomem *doorbell_area = | 2558 | void __iomem *doorbell_area = |
2525 | qdev->doorbell_area + (DB_PAGE_SIZE * (128 + rx_ring->cq_id)); | 2559 | qdev->doorbell_area + (DB_PAGE_SIZE * (128 + rx_ring->cq_id)); |
2526 | int err = 0; | 2560 | int err = 0; |
2527 | u16 bq_len; | 2561 | u16 bq_len; |
2528 | u64 tmp; | 2562 | u64 tmp; |
2563 | __le64 *base_indirect_ptr; | ||
2564 | int page_entries; | ||
2529 | 2565 | ||
2530 | /* Set up the shadow registers for this ring. */ | 2566 | /* Set up the shadow registers for this ring. */ |
2531 | rx_ring->prod_idx_sh_reg = shadow_reg; | 2567 | rx_ring->prod_idx_sh_reg = shadow_reg; |
@@ -2534,8 +2570,8 @@ static int ql_start_rx_ring(struct ql_adapter *qdev, struct rx_ring *rx_ring) | |||
2534 | shadow_reg_dma += sizeof(u64); | 2570 | shadow_reg_dma += sizeof(u64); |
2535 | rx_ring->lbq_base_indirect = shadow_reg; | 2571 | rx_ring->lbq_base_indirect = shadow_reg; |
2536 | rx_ring->lbq_base_indirect_dma = shadow_reg_dma; | 2572 | rx_ring->lbq_base_indirect_dma = shadow_reg_dma; |
2537 | shadow_reg += sizeof(u64); | 2573 | shadow_reg += (sizeof(u64) * MAX_DB_PAGES_PER_BQ(rx_ring->lbq_len)); |
2538 | shadow_reg_dma += sizeof(u64); | 2574 | shadow_reg_dma += (sizeof(u64) * MAX_DB_PAGES_PER_BQ(rx_ring->lbq_len)); |
2539 | rx_ring->sbq_base_indirect = shadow_reg; | 2575 | rx_ring->sbq_base_indirect = shadow_reg; |
2540 | rx_ring->sbq_base_indirect_dma = shadow_reg_dma; | 2576 | rx_ring->sbq_base_indirect_dma = shadow_reg_dma; |
2541 | 2577 | ||
@@ -2572,7 +2608,14 @@ static int ql_start_rx_ring(struct ql_adapter *qdev, struct rx_ring *rx_ring) | |||
2572 | if (rx_ring->lbq_len) { | 2608 | if (rx_ring->lbq_len) { |
2573 | cqicb->flags |= FLAGS_LL; /* Load lbq values */ | 2609 | cqicb->flags |= FLAGS_LL; /* Load lbq values */ |
2574 | tmp = (u64)rx_ring->lbq_base_dma;; | 2610 | tmp = (u64)rx_ring->lbq_base_dma;; |
2575 | *((__le64 *) rx_ring->lbq_base_indirect) = cpu_to_le64(tmp); | 2611 | base_indirect_ptr = (__le64 *) rx_ring->lbq_base_indirect; |
2612 | page_entries = 0; | ||
2613 | do { | ||
2614 | *base_indirect_ptr = cpu_to_le64(tmp); | ||
2615 | tmp += DB_PAGE_SIZE; | ||
2616 | base_indirect_ptr++; | ||
2617 | page_entries++; | ||
2618 | } while (page_entries < MAX_DB_PAGES_PER_BQ(rx_ring->lbq_len)); | ||
2576 | cqicb->lbq_addr = | 2619 | cqicb->lbq_addr = |
2577 | cpu_to_le64(rx_ring->lbq_base_indirect_dma); | 2620 | cpu_to_le64(rx_ring->lbq_base_indirect_dma); |
2578 | bq_len = (rx_ring->lbq_buf_size == 65536) ? 0 : | 2621 | bq_len = (rx_ring->lbq_buf_size == 65536) ? 0 : |
@@ -2589,7 +2632,14 @@ static int ql_start_rx_ring(struct ql_adapter *qdev, struct rx_ring *rx_ring) | |||
2589 | if (rx_ring->sbq_len) { | 2632 | if (rx_ring->sbq_len) { |
2590 | cqicb->flags |= FLAGS_LS; /* Load sbq values */ | 2633 | cqicb->flags |= FLAGS_LS; /* Load sbq values */ |
2591 | tmp = (u64)rx_ring->sbq_base_dma;; | 2634 | tmp = (u64)rx_ring->sbq_base_dma;; |
2592 | *((__le64 *) rx_ring->sbq_base_indirect) = cpu_to_le64(tmp); | 2635 | base_indirect_ptr = (__le64 *) rx_ring->sbq_base_indirect; |
2636 | page_entries = 0; | ||
2637 | do { | ||
2638 | *base_indirect_ptr = cpu_to_le64(tmp); | ||
2639 | tmp += DB_PAGE_SIZE; | ||
2640 | base_indirect_ptr++; | ||
2641 | page_entries++; | ||
2642 | } while (page_entries < MAX_DB_PAGES_PER_BQ(rx_ring->sbq_len)); | ||
2593 | cqicb->sbq_addr = | 2643 | cqicb->sbq_addr = |
2594 | cpu_to_le64(rx_ring->sbq_base_indirect_dma); | 2644 | cpu_to_le64(rx_ring->sbq_base_indirect_dma); |
2595 | cqicb->sbq_buf_size = | 2645 | cqicb->sbq_buf_size = |
@@ -3186,9 +3236,10 @@ static void ql_display_dev_info(struct net_device *ndev) | |||
3186 | struct ql_adapter *qdev = (struct ql_adapter *)netdev_priv(ndev); | 3236 | struct ql_adapter *qdev = (struct ql_adapter *)netdev_priv(ndev); |
3187 | 3237 | ||
3188 | QPRINTK(qdev, PROBE, INFO, | 3238 | QPRINTK(qdev, PROBE, INFO, |
3189 | "Function #%d, NIC Roll %d, NIC Rev = %d, " | 3239 | "Function #%d, Port %d, NIC Roll %d, NIC Rev = %d, " |
3190 | "XG Roll = %d, XG Rev = %d.\n", | 3240 | "XG Roll = %d, XG Rev = %d.\n", |
3191 | qdev->func, | 3241 | qdev->func, |
3242 | qdev->port, | ||
3192 | qdev->chip_rev_id & 0x0000000f, | 3243 | qdev->chip_rev_id & 0x0000000f, |
3193 | qdev->chip_rev_id >> 4 & 0x0000000f, | 3244 | qdev->chip_rev_id >> 4 & 0x0000000f, |
3194 | qdev->chip_rev_id >> 8 & 0x0000000f, | 3245 | qdev->chip_rev_id >> 8 & 0x0000000f, |
@@ -3264,7 +3315,6 @@ static int ql_adapter_up(struct ql_adapter *qdev) | |||
3264 | err = ql_adapter_initialize(qdev); | 3315 | err = ql_adapter_initialize(qdev); |
3265 | if (err) { | 3316 | if (err) { |
3266 | QPRINTK(qdev, IFUP, INFO, "Unable to initialize adapter.\n"); | 3317 | QPRINTK(qdev, IFUP, INFO, "Unable to initialize adapter.\n"); |
3267 | spin_unlock(&qdev->hw_lock); | ||
3268 | goto err_init; | 3318 | goto err_init; |
3269 | } | 3319 | } |
3270 | set_bit(QL_ADAPTER_UP, &qdev->flags); | 3320 | set_bit(QL_ADAPTER_UP, &qdev->flags); |
@@ -3361,7 +3411,6 @@ static int ql_configure_rings(struct ql_adapter *qdev) | |||
3361 | * completion handler rx_rings. | 3411 | * completion handler rx_rings. |
3362 | */ | 3412 | */ |
3363 | qdev->rx_ring_count = qdev->tx_ring_count + qdev->rss_ring_count + 1; | 3413 | qdev->rx_ring_count = qdev->tx_ring_count + qdev->rss_ring_count + 1; |
3364 | netif_set_gso_max_size(qdev->ndev, 65536); | ||
3365 | 3414 | ||
3366 | for (i = 0; i < qdev->tx_ring_count; i++) { | 3415 | for (i = 0; i < qdev->tx_ring_count; i++) { |
3367 | tx_ring = &qdev->tx_ring[i]; | 3416 | tx_ring = &qdev->tx_ring[i]; |
@@ -3644,12 +3693,53 @@ static struct nic_operations qla8000_nic_ops = { | |||
3644 | .port_initialize = ql_8000_port_initialize, | 3693 | .port_initialize = ql_8000_port_initialize, |
3645 | }; | 3694 | }; |
3646 | 3695 | ||
3696 | /* Find the pcie function number for the other NIC | ||
3697 | * on this chip. Since both NIC functions share a | ||
3698 | * common firmware we have the lowest enabled function | ||
3699 | * do any common work. Examples would be resetting | ||
3700 | * after a fatal firmware error, or doing a firmware | ||
3701 | * coredump. | ||
3702 | */ | ||
3703 | static int ql_get_alt_pcie_func(struct ql_adapter *qdev) | ||
3704 | { | ||
3705 | int status = 0; | ||
3706 | u32 temp; | ||
3707 | u32 nic_func1, nic_func2; | ||
3708 | |||
3709 | status = ql_read_mpi_reg(qdev, MPI_TEST_FUNC_PORT_CFG, | ||
3710 | &temp); | ||
3711 | if (status) | ||
3712 | return status; | ||
3713 | |||
3714 | nic_func1 = ((temp >> MPI_TEST_NIC1_FUNC_SHIFT) & | ||
3715 | MPI_TEST_NIC_FUNC_MASK); | ||
3716 | nic_func2 = ((temp >> MPI_TEST_NIC2_FUNC_SHIFT) & | ||
3717 | MPI_TEST_NIC_FUNC_MASK); | ||
3718 | |||
3719 | if (qdev->func == nic_func1) | ||
3720 | qdev->alt_func = nic_func2; | ||
3721 | else if (qdev->func == nic_func2) | ||
3722 | qdev->alt_func = nic_func1; | ||
3723 | else | ||
3724 | status = -EIO; | ||
3725 | |||
3726 | return status; | ||
3727 | } | ||
3647 | 3728 | ||
3648 | static void ql_get_board_info(struct ql_adapter *qdev) | 3729 | static int ql_get_board_info(struct ql_adapter *qdev) |
3649 | { | 3730 | { |
3731 | int status; | ||
3650 | qdev->func = | 3732 | qdev->func = |
3651 | (ql_read32(qdev, STS) & STS_FUNC_ID_MASK) >> STS_FUNC_ID_SHIFT; | 3733 | (ql_read32(qdev, STS) & STS_FUNC_ID_MASK) >> STS_FUNC_ID_SHIFT; |
3652 | if (qdev->func) { | 3734 | if (qdev->func > 3) |
3735 | return -EIO; | ||
3736 | |||
3737 | status = ql_get_alt_pcie_func(qdev); | ||
3738 | if (status) | ||
3739 | return status; | ||
3740 | |||
3741 | qdev->port = (qdev->func < qdev->alt_func) ? 0 : 1; | ||
3742 | if (qdev->port) { | ||
3653 | qdev->xg_sem_mask = SEM_XGMAC1_MASK; | 3743 | qdev->xg_sem_mask = SEM_XGMAC1_MASK; |
3654 | qdev->port_link_up = STS_PL1; | 3744 | qdev->port_link_up = STS_PL1; |
3655 | qdev->port_init = STS_PI1; | 3745 | qdev->port_init = STS_PI1; |
@@ -3668,6 +3758,7 @@ static void ql_get_board_info(struct ql_adapter *qdev) | |||
3668 | qdev->nic_ops = &qla8012_nic_ops; | 3758 | qdev->nic_ops = &qla8012_nic_ops; |
3669 | else if (qdev->device_id == QLGE_DEVICE_ID_8000) | 3759 | else if (qdev->device_id == QLGE_DEVICE_ID_8000) |
3670 | qdev->nic_ops = &qla8000_nic_ops; | 3760 | qdev->nic_ops = &qla8000_nic_ops; |
3761 | return status; | ||
3671 | } | 3762 | } |
3672 | 3763 | ||
3673 | static void ql_release_all(struct pci_dev *pdev) | 3764 | static void ql_release_all(struct pci_dev *pdev) |
@@ -3762,7 +3853,12 @@ static int __devinit ql_init_device(struct pci_dev *pdev, | |||
3762 | 3853 | ||
3763 | qdev->ndev = ndev; | 3854 | qdev->ndev = ndev; |
3764 | qdev->pdev = pdev; | 3855 | qdev->pdev = pdev; |
3765 | ql_get_board_info(qdev); | 3856 | err = ql_get_board_info(qdev); |
3857 | if (err) { | ||
3858 | dev_err(&pdev->dev, "Register access failed.\n"); | ||
3859 | err = -EIO; | ||
3860 | goto err_out; | ||
3861 | } | ||
3766 | qdev->msg_enable = netif_msg_init(debug, default_msg); | 3862 | qdev->msg_enable = netif_msg_init(debug, default_msg); |
3767 | spin_lock_init(&qdev->hw_lock); | 3863 | spin_lock_init(&qdev->hw_lock); |
3768 | spin_lock_init(&qdev->stats_lock); | 3864 | spin_lock_init(&qdev->stats_lock); |
diff --git a/drivers/net/qlge/qlge_mpi.c b/drivers/net/qlge/qlge_mpi.c index 9f81b797f10b..a67c14a7befd 100644 --- a/drivers/net/qlge/qlge_mpi.c +++ b/drivers/net/qlge/qlge_mpi.c | |||
@@ -90,14 +90,14 @@ static int ql_get_mb_sts(struct ql_adapter *qdev, struct mbox_params *mbcp) | |||
90 | */ | 90 | */ |
91 | static int ql_wait_mbx_cmd_cmplt(struct ql_adapter *qdev) | 91 | static int ql_wait_mbx_cmd_cmplt(struct ql_adapter *qdev) |
92 | { | 92 | { |
93 | int count = 50; /* TODO: arbitrary for now. */ | 93 | int count = 100; |
94 | u32 value; | 94 | u32 value; |
95 | 95 | ||
96 | do { | 96 | do { |
97 | value = ql_read32(qdev, STS); | 97 | value = ql_read32(qdev, STS); |
98 | if (value & STS_PI) | 98 | if (value & STS_PI) |
99 | return 0; | 99 | return 0; |
100 | udelay(UDELAY_DELAY); /* 10us */ | 100 | mdelay(UDELAY_DELAY); /* 100ms */ |
101 | } while (--count); | 101 | } while (--count); |
102 | return -ETIMEDOUT; | 102 | return -ETIMEDOUT; |
103 | } | 103 | } |
@@ -453,6 +453,13 @@ static int ql_mpi_handler(struct ql_adapter *qdev, struct mbox_params *mbcp) | |||
453 | } | 453 | } |
454 | end: | 454 | end: |
455 | ql_write32(qdev, CSR, CSR_CMD_CLR_R2PCI_INT); | 455 | ql_write32(qdev, CSR, CSR_CMD_CLR_R2PCI_INT); |
456 | /* Restore the original mailbox count to | ||
457 | * what the caller asked for. This can get | ||
458 | * changed when a mailbox command is waiting | ||
459 | * for a response and an AEN arrives and | ||
460 | * is handled. | ||
461 | * */ | ||
462 | mbcp->out_count = orig_count; | ||
456 | return status; | 463 | return status; |
457 | } | 464 | } |
458 | 465 | ||
@@ -540,6 +547,40 @@ end: | |||
540 | return status; | 547 | return status; |
541 | } | 548 | } |
542 | 549 | ||
550 | |||
551 | /* Get MPI firmware version. This will be used for | ||
552 | * driver banner and for ethtool info. | ||
553 | * Returns zero on success. | ||
554 | */ | ||
555 | int ql_mb_about_fw(struct ql_adapter *qdev) | ||
556 | { | ||
557 | struct mbox_params mbc; | ||
558 | struct mbox_params *mbcp = &mbc; | ||
559 | int status = 0; | ||
560 | |||
561 | memset(mbcp, 0, sizeof(struct mbox_params)); | ||
562 | |||
563 | mbcp->in_count = 1; | ||
564 | mbcp->out_count = 3; | ||
565 | |||
566 | mbcp->mbox_in[0] = MB_CMD_ABOUT_FW; | ||
567 | |||
568 | status = ql_mailbox_command(qdev, mbcp); | ||
569 | if (status) | ||
570 | return status; | ||
571 | |||
572 | if (mbcp->mbox_out[0] != MB_CMD_STS_GOOD) { | ||
573 | QPRINTK(qdev, DRV, ERR, | ||
574 | "Failed about firmware command\n"); | ||
575 | status = -EIO; | ||
576 | } | ||
577 | |||
578 | /* Store the firmware version */ | ||
579 | qdev->fw_rev_id = mbcp->mbox_out[1]; | ||
580 | |||
581 | return status; | ||
582 | } | ||
583 | |||
543 | /* Get functional state for MPI firmware. | 584 | /* Get functional state for MPI firmware. |
544 | * Returns zero on success. | 585 | * Returns zero on success. |
545 | */ | 586 | */ |
@@ -754,7 +795,6 @@ void ql_mpi_port_cfg_work(struct work_struct *work) | |||
754 | { | 795 | { |
755 | struct ql_adapter *qdev = | 796 | struct ql_adapter *qdev = |
756 | container_of(work, struct ql_adapter, mpi_port_cfg_work.work); | 797 | container_of(work, struct ql_adapter, mpi_port_cfg_work.work); |
757 | struct net_device *ndev = qdev->ndev; | ||
758 | int status; | 798 | int status; |
759 | 799 | ||
760 | status = ql_mb_get_port_cfg(qdev); | 800 | status = ql_mb_get_port_cfg(qdev); |
@@ -764,9 +804,7 @@ void ql_mpi_port_cfg_work(struct work_struct *work) | |||
764 | goto err; | 804 | goto err; |
765 | } | 805 | } |
766 | 806 | ||
767 | if (ndev->mtu <= 2500) | 807 | if (qdev->link_config & CFG_JUMBO_FRAME_SIZE && |
768 | goto end; | ||
769 | else if (qdev->link_config & CFG_JUMBO_FRAME_SIZE && | ||
770 | qdev->max_frame_size == | 808 | qdev->max_frame_size == |
771 | CFG_DEFAULT_MAX_FRAME_SIZE) | 809 | CFG_DEFAULT_MAX_FRAME_SIZE) |
772 | goto end; | 810 | goto end; |
@@ -831,13 +869,19 @@ void ql_mpi_work(struct work_struct *work) | |||
831 | container_of(work, struct ql_adapter, mpi_work.work); | 869 | container_of(work, struct ql_adapter, mpi_work.work); |
832 | struct mbox_params mbc; | 870 | struct mbox_params mbc; |
833 | struct mbox_params *mbcp = &mbc; | 871 | struct mbox_params *mbcp = &mbc; |
872 | int err = 0; | ||
834 | 873 | ||
835 | mutex_lock(&qdev->mpi_mutex); | 874 | mutex_lock(&qdev->mpi_mutex); |
836 | 875 | ||
837 | while (ql_read32(qdev, STS) & STS_PI) { | 876 | while (ql_read32(qdev, STS) & STS_PI) { |
838 | memset(mbcp, 0, sizeof(struct mbox_params)); | 877 | memset(mbcp, 0, sizeof(struct mbox_params)); |
839 | mbcp->out_count = 1; | 878 | mbcp->out_count = 1; |
840 | ql_mpi_handler(qdev, mbcp); | 879 | /* Don't continue if an async event |
880 | * did not complete properly. | ||
881 | */ | ||
882 | err = ql_mpi_handler(qdev, mbcp); | ||
883 | if (err) | ||
884 | break; | ||
841 | } | 885 | } |
842 | 886 | ||
843 | mutex_unlock(&qdev->mpi_mutex); | 887 | mutex_unlock(&qdev->mpi_mutex); |