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Diffstat (limited to 'drivers/net/ps3_gelic_net.h')
-rw-r--r--drivers/net/ps3_gelic_net.h24
1 files changed, 8 insertions, 16 deletions
diff --git a/drivers/net/ps3_gelic_net.h b/drivers/net/ps3_gelic_net.h
index 5e1c28654e16..a9c4c4fc2547 100644
--- a/drivers/net/ps3_gelic_net.h
+++ b/drivers/net/ps3_gelic_net.h
@@ -28,21 +28,12 @@
28#ifndef _GELIC_NET_H 28#ifndef _GELIC_NET_H
29#define _GELIC_NET_H 29#define _GELIC_NET_H
30 30
31#define GELIC_NET_DRV_NAME "Gelic Network Driver"
32#define GELIC_NET_DRV_VERSION "1.0"
33
34#define GELIC_NET_ETHTOOL /* use ethtool */
35
36/* ioctl */
37#define GELIC_NET_GET_MODE (SIOCDEVPRIVATE + 0)
38#define GELIC_NET_SET_MODE (SIOCDEVPRIVATE + 1)
39
40/* descriptors */ 31/* descriptors */
41#define GELIC_NET_RX_DESCRIPTORS 128 /* num of descriptors */ 32#define GELIC_NET_RX_DESCRIPTORS 128 /* num of descriptors */
42#define GELIC_NET_TX_DESCRIPTORS 128 /* num of descriptors */ 33#define GELIC_NET_TX_DESCRIPTORS 128 /* num of descriptors */
43 34
44#define GELIC_NET_MAX_MTU 2308 35#define GELIC_NET_MAX_MTU VLAN_ETH_FRAME_LEN
45#define GELIC_NET_MIN_MTU 64 36#define GELIC_NET_MIN_MTU VLAN_ETH_ZLEN
46#define GELIC_NET_RXBUF_ALIGN 128 37#define GELIC_NET_RXBUF_ALIGN 128
47#define GELIC_NET_RX_CSUM_DEFAULT 1 /* hw chksum */ 38#define GELIC_NET_RX_CSUM_DEFAULT 1 /* hw chksum */
48#define GELIC_NET_WATCHDOG_TIMEOUT 5*HZ 39#define GELIC_NET_WATCHDOG_TIMEOUT 5*HZ
@@ -90,7 +81,8 @@ enum gelic_net_int1_status {
90 */ 81 */
91#define GELIC_NET_RXVLNPKT 0x00200000 /* VLAN packet */ 82#define GELIC_NET_RXVLNPKT 0x00200000 /* VLAN packet */
92/* bit 20..16 reserved */ 83/* bit 20..16 reserved */
93#define GELIC_NET_RXRECNUM 0x0000ff00 /* reception receipt number */ 84#define GELIC_NET_RXRRECNUM 0x0000ff00 /* reception receipt number */
85#define GELIC_NET_RXRRECNUM_SHIFT 8
94/* bit 7..0 reserved */ 86/* bit 7..0 reserved */
95 87
96#define GELIC_NET_TXDESC_TAIL 0 88#define GELIC_NET_TXDESC_TAIL 0
@@ -133,19 +125,19 @@ enum gelic_net_int1_status {
133 * interrupt status */ 125 * interrupt status */
134 126
135#define GELIC_NET_DMAC_CMDSTAT_CHAIN_END 0x00000002 /* RXDCEIS:DMA stopped */ 127#define GELIC_NET_DMAC_CMDSTAT_CHAIN_END 0x00000002 /* RXDCEIS:DMA stopped */
136#define GELIC_NET_DMAC_CMDSTAT_NOT_IN_USE 0xb0000000
137#define GELIC_NET_DESCR_IND_PROC_SHIFT 28 128#define GELIC_NET_DESCR_IND_PROC_SHIFT 28
138#define GELIC_NET_DESCR_IND_PROC_MASKO 0x0fffffff 129#define GELIC_NET_DESCR_IND_PROC_MASKO 0x0fffffff
139 130
140 131
141enum gelic_net_descr_status { 132enum gelic_net_descr_status {
142 GELIC_NET_DESCR_COMPLETE = 0x00, /* used in rx and tx */ 133 GELIC_NET_DESCR_COMPLETE = 0x00, /* used in tx */
134 GELIC_NET_DESCR_BUFFER_FULL = 0x00, /* used in rx */
143 GELIC_NET_DESCR_RESPONSE_ERROR = 0x01, /* used in rx and tx */ 135 GELIC_NET_DESCR_RESPONSE_ERROR = 0x01, /* used in rx and tx */
144 GELIC_NET_DESCR_PROTECTION_ERROR = 0x02, /* used in rx and tx */ 136 GELIC_NET_DESCR_PROTECTION_ERROR = 0x02, /* used in rx and tx */
145 GELIC_NET_DESCR_FRAME_END = 0x04, /* used in rx */ 137 GELIC_NET_DESCR_FRAME_END = 0x04, /* used in rx */
146 GELIC_NET_DESCR_FORCE_END = 0x05, /* used in rx and tx */ 138 GELIC_NET_DESCR_FORCE_END = 0x05, /* used in rx and tx */
147 GELIC_NET_DESCR_CARDOWNED = 0x0a, /* used in rx and tx */ 139 GELIC_NET_DESCR_CARDOWNED = 0x0a, /* used in rx and tx */
148 GELIC_NET_DESCR_NOT_IN_USE /* any other value */ 140 GELIC_NET_DESCR_NOT_IN_USE = 0x0b /* any other value */
149}; 141};
150/* for lv1_net_control */ 142/* for lv1_net_control */
151#define GELIC_NET_GET_MAC_ADDRESS 0x0000000000000001 143#define GELIC_NET_GET_MAC_ADDRESS 0x0000000000000001
@@ -216,10 +208,10 @@ struct gelic_net_card {
216 208
217 struct gelic_net_descr_chain tx_chain; 209 struct gelic_net_descr_chain tx_chain;
218 struct gelic_net_descr_chain rx_chain; 210 struct gelic_net_descr_chain rx_chain;
211 int rx_dma_restart_required;
219 /* gurad dmac descriptor chain*/ 212 /* gurad dmac descriptor chain*/
220 spinlock_t chain_lock; 213 spinlock_t chain_lock;
221 214
222 struct net_device_stats netdev_stats;
223 int rx_csum; 215 int rx_csum;
224 /* guard tx_dma_progress */ 216 /* guard tx_dma_progress */
225 spinlock_t tx_dma_lock; 217 spinlock_t tx_dma_lock;