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path: root/drivers/net/netxen/netxen_nic_isr.c
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Diffstat (limited to 'drivers/net/netxen/netxen_nic_isr.c')
-rw-r--r--drivers/net/netxen/netxen_nic_isr.c54
1 files changed, 24 insertions, 30 deletions
diff --git a/drivers/net/netxen/netxen_nic_isr.c b/drivers/net/netxen/netxen_nic_isr.c
index f1c3e5af03a9..ae180fee8008 100644
--- a/drivers/net/netxen/netxen_nic_isr.c
+++ b/drivers/net/netxen/netxen_nic_isr.c
@@ -149,47 +149,41 @@ void netxen_handle_port_int(struct netxen_adapter *adapter, u32 portno,
149 149
150void netxen_nic_isr_other(struct netxen_adapter *adapter) 150void netxen_nic_isr_other(struct netxen_adapter *adapter)
151{ 151{
152 u32 enable, portno; 152 u32 portno;
153 u32 i2qhi; 153 u32 val, linkup, qg_linksup;
154
155 /*
156 * bit 3 is for i2qInt, if high its enabled
157 * check for phy interrupts
158 * read vector and check for bit 45 for phy
159 * clear int by writing the same value into ISR_INT_VECTOR REG
160 */
161
162 DPRINTK(INFO, "I2Q is the source of INT \n");
163 154
164 /* verify the offset */ 155 /* verify the offset */
165 i2qhi = readl(NETXEN_CRB_NORMALIZE(adapter, NETXEN_I2Q_CLR_PCI_HI)); 156 val = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_XG_STATE));
166 157 if (val == adapter->ahw.qg_linksup)
167 DPRINTK(INFO, "isr NETXEN_I2Q_CLR_PCI_HI = 0x%x \n", i2qhi); 158 return;
168 159
169 if (i2qhi & 0x4000) { 160 qg_linksup = adapter->ahw.qg_linksup;
170 for (portno = 0; portno < NETXEN_NIU_MAX_GBE_PORTS; portno++) { 161 adapter->ahw.qg_linksup = val;
171 DPRINTK(INFO, "External PHY interrupt ON PORT %d\n", 162 DPRINTK(1, INFO, "%s: link update 0x%08x\n", netxen_nic_driver_name,
172 portno); 163 val);
164 for (portno = 0; portno < NETXEN_NIU_MAX_GBE_PORTS; portno++) {
165 linkup = val & 1;
166 if (linkup != (qg_linksup & 1)) {
167 printk(KERN_INFO "%s: PORT %d link %s\n",
168 netxen_nic_driver_name, portno,
169 ((linkup == 0) ? "down" : "up"));
170 netxen_indicate_link_status(adapter, portno, linkup);
171 if (linkup)
172 netxen_nic_set_link_parameters(adapter->
173 port[portno]);
173 174
174 enable = 1;
175 netxen_handle_port_int(adapter, portno, enable);
176 } 175 }
176 val = val >> 1;
177 qg_linksup = qg_linksup >> 1;
178 }
177 179
178 /* Clear the interrupt on I2Q */ 180 adapter->stats.otherints++;
179 writel((u32) i2qhi,
180 NETXEN_CRB_NORMALIZE(adapter, NETXEN_I2Q_CLR_PCI_HI));
181 181
182 }
183} 182}
184 183
185void netxen_nic_gbe_handle_phy_intr(struct netxen_adapter *adapter) 184void netxen_nic_gbe_handle_phy_intr(struct netxen_adapter *adapter)
186{ 185{
187 u32 val; 186 netxen_nic_isr_other(adapter);
188 val = readl(NETXEN_CRB_NORMALIZE(adapter, ISR_INT_VECTOR));
189 if (val & 0x4) {
190 adapter->stats.otherints++;
191 netxen_nic_isr_other(adapter);
192 }
193} 187}
194 188
195void netxen_nic_xgbe_handle_phy_intr(struct netxen_adapter *adapter) 189void netxen_nic_xgbe_handle_phy_intr(struct netxen_adapter *adapter)