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path: root/drivers/net/netxen/netxen_nic_init.c
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Diffstat (limited to 'drivers/net/netxen/netxen_nic_init.c')
-rw-r--r--drivers/net/netxen/netxen_nic_init.c806
1 files changed, 487 insertions, 319 deletions
diff --git a/drivers/net/netxen/netxen_nic_init.c b/drivers/net/netxen/netxen_nic_init.c
index 70d1b22ced22..01ab31b34a85 100644
--- a/drivers/net/netxen/netxen_nic_init.c
+++ b/drivers/net/netxen/netxen_nic_init.c
@@ -42,8 +42,6 @@ struct crb_addr_pair {
42 u32 data; 42 u32 data;
43}; 43};
44 44
45unsigned long last_schedule_time;
46
47#define NETXEN_MAX_CRB_XFORM 60 45#define NETXEN_MAX_CRB_XFORM 60
48static unsigned int crb_addr_xform[NETXEN_MAX_CRB_XFORM]; 46static unsigned int crb_addr_xform[NETXEN_MAX_CRB_XFORM];
49#define NETXEN_ADDR_ERROR (0xffffffff) 47#define NETXEN_ADDR_ERROR (0xffffffff)
@@ -117,6 +115,8 @@ static void crb_addr_transform_setup(void)
117 crb_addr_transform(C2C1); 115 crb_addr_transform(C2C1);
118 crb_addr_transform(C2C0); 116 crb_addr_transform(C2C0);
119 crb_addr_transform(SMB); 117 crb_addr_transform(SMB);
118 crb_addr_transform(OCM0);
119 crb_addr_transform(I2C0);
120} 120}
121 121
122int netxen_init_firmware(struct netxen_adapter *adapter) 122int netxen_init_firmware(struct netxen_adapter *adapter)
@@ -124,15 +124,15 @@ int netxen_init_firmware(struct netxen_adapter *adapter)
124 u32 state = 0, loops = 0, err = 0; 124 u32 state = 0, loops = 0, err = 0;
125 125
126 /* Window 1 call */ 126 /* Window 1 call */
127 state = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE)); 127 state = adapter->pci_read_normalize(adapter, CRB_CMDPEG_STATE);
128 128
129 if (state == PHAN_INITIALIZE_ACK) 129 if (state == PHAN_INITIALIZE_ACK)
130 return 0; 130 return 0;
131 131
132 while (state != PHAN_INITIALIZE_COMPLETE && loops < 2000) { 132 while (state != PHAN_INITIALIZE_COMPLETE && loops < 2000) {
133 udelay(100); 133 msleep(1);
134 /* Window 1 call */ 134 /* Window 1 call */
135 state = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE)); 135 state = adapter->pci_read_normalize(adapter, CRB_CMDPEG_STATE);
136 136
137 loops++; 137 loops++;
138 } 138 }
@@ -143,64 +143,193 @@ int netxen_init_firmware(struct netxen_adapter *adapter)
143 return err; 143 return err;
144 } 144 }
145 /* Window 1 call */ 145 /* Window 1 call */
146 writel(INTR_SCHEME_PERPORT, 146 adapter->pci_write_normalize(adapter,
147 NETXEN_CRB_NORMALIZE(adapter, CRB_NIC_CAPABILITIES_HOST)); 147 CRB_NIC_CAPABILITIES_HOST, INTR_SCHEME_PERPORT);
148 writel(MSI_MODE_MULTIFUNC, 148 adapter->pci_write_normalize(adapter,
149 NETXEN_CRB_NORMALIZE(adapter, CRB_NIC_MSI_MODE_HOST)); 149 CRB_NIC_MSI_MODE_HOST, MSI_MODE_MULTIFUNC);
150 writel(MPORT_MULTI_FUNCTION_MODE, 150 adapter->pci_write_normalize(adapter,
151 NETXEN_CRB_NORMALIZE(adapter, CRB_MPORT_MODE)); 151 CRB_MPORT_MODE, MPORT_MULTI_FUNCTION_MODE);
152 writel(PHAN_INITIALIZE_ACK, 152 adapter->pci_write_normalize(adapter,
153 NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE)); 153 CRB_CMDPEG_STATE, PHAN_INITIALIZE_ACK);
154 154
155 return err; 155 return err;
156} 156}
157 157
158#define NETXEN_ADDR_LIMIT 0xffffffffULL 158void netxen_release_rx_buffers(struct netxen_adapter *adapter)
159{
160 struct netxen_recv_context *recv_ctx;
161 struct nx_host_rds_ring *rds_ring;
162 struct netxen_rx_buffer *rx_buf;
163 int i, ctxid, ring;
164
165 for (ctxid = 0; ctxid < MAX_RCV_CTX; ++ctxid) {
166 recv_ctx = &adapter->recv_ctx[ctxid];
167 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
168 rds_ring = &recv_ctx->rds_rings[ring];
169 for (i = 0; i < rds_ring->max_rx_desc_count; ++i) {
170 rx_buf = &(rds_ring->rx_buf_arr[i]);
171 if (rx_buf->state == NETXEN_BUFFER_FREE)
172 continue;
173 pci_unmap_single(adapter->pdev,
174 rx_buf->dma,
175 rds_ring->dma_size,
176 PCI_DMA_FROMDEVICE);
177 if (rx_buf->skb != NULL)
178 dev_kfree_skb_any(rx_buf->skb);
179 }
180 }
181 }
182}
159 183
160void *netxen_alloc(struct pci_dev *pdev, size_t sz, dma_addr_t * ptr, 184void netxen_release_tx_buffers(struct netxen_adapter *adapter)
161 struct pci_dev **used_dev)
162{ 185{
163 void *addr; 186 struct netxen_cmd_buffer *cmd_buf;
187 struct netxen_skb_frag *buffrag;
188 int i, j;
189
190 cmd_buf = adapter->cmd_buf_arr;
191 for (i = 0; i < adapter->max_tx_desc_count; i++) {
192 buffrag = cmd_buf->frag_array;
193 if (buffrag->dma) {
194 pci_unmap_single(adapter->pdev, buffrag->dma,
195 buffrag->length, PCI_DMA_TODEVICE);
196 buffrag->dma = 0ULL;
197 }
198 for (j = 0; j < cmd_buf->frag_count; j++) {
199 buffrag++;
200 if (buffrag->dma) {
201 pci_unmap_page(adapter->pdev, buffrag->dma,
202 buffrag->length,
203 PCI_DMA_TODEVICE);
204 buffrag->dma = 0ULL;
205 }
206 }
207 /* Free the skb we received in netxen_nic_xmit_frame */
208 if (cmd_buf->skb) {
209 dev_kfree_skb_any(cmd_buf->skb);
210 cmd_buf->skb = NULL;
211 }
212 cmd_buf++;
213 }
214}
164 215
165 addr = pci_alloc_consistent(pdev, sz, ptr); 216void netxen_free_sw_resources(struct netxen_adapter *adapter)
166 if ((unsigned long long)(*ptr) < NETXEN_ADDR_LIMIT) { 217{
167 *used_dev = pdev; 218 struct netxen_recv_context *recv_ctx;
168 return addr; 219 struct nx_host_rds_ring *rds_ring;
220 int ctx, ring;
221
222 for (ctx = 0; ctx < MAX_RCV_CTX; ctx++) {
223 recv_ctx = &adapter->recv_ctx[ctx];
224 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
225 rds_ring = &recv_ctx->rds_rings[ring];
226 if (rds_ring->rx_buf_arr) {
227 vfree(rds_ring->rx_buf_arr);
228 rds_ring->rx_buf_arr = NULL;
229 }
230 }
169 } 231 }
170 pci_free_consistent(pdev, sz, addr, *ptr); 232 if (adapter->cmd_buf_arr)
171 addr = pci_alloc_consistent(NULL, sz, ptr); 233 vfree(adapter->cmd_buf_arr);
172 *used_dev = NULL; 234 return;
173 return addr;
174} 235}
175 236
176void netxen_initialize_adapter_sw(struct netxen_adapter *adapter) 237int netxen_alloc_sw_resources(struct netxen_adapter *adapter)
177{ 238{
178 int ctxid, ring; 239 struct netxen_recv_context *recv_ctx;
179 u32 i; 240 struct nx_host_rds_ring *rds_ring;
180 u32 num_rx_bufs = 0; 241 struct netxen_rx_buffer *rx_buf;
181 struct netxen_rcv_desc_ctx *rcv_desc; 242 int ctx, ring, i, num_rx_bufs;
182 243
183 DPRINTK(INFO, "initializing some queues: %p\n", adapter); 244 struct netxen_cmd_buffer *cmd_buf_arr;
184 for (ctxid = 0; ctxid < MAX_RCV_CTX; ++ctxid) { 245 struct net_device *netdev = adapter->netdev;
185 for (ring = 0; ring < NUM_RCV_DESC_RINGS; ring++) { 246
186 struct netxen_rx_buffer *rx_buf; 247 cmd_buf_arr = (struct netxen_cmd_buffer *)vmalloc(TX_RINGSIZE);
187 rcv_desc = &adapter->recv_ctx[ctxid].rcv_desc[ring]; 248 if (cmd_buf_arr == NULL) {
188 rcv_desc->begin_alloc = 0; 249 printk(KERN_ERR "%s: Failed to allocate cmd buffer ring\n",
189 rx_buf = rcv_desc->rx_buf_arr; 250 netdev->name);
190 num_rx_bufs = rcv_desc->max_rx_desc_count; 251 return -ENOMEM;
252 }
253 memset(cmd_buf_arr, 0, TX_RINGSIZE);
254 adapter->cmd_buf_arr = cmd_buf_arr;
255
256 for (ctx = 0; ctx < MAX_RCV_CTX; ctx++) {
257 recv_ctx = &adapter->recv_ctx[ctx];
258 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
259 rds_ring = &recv_ctx->rds_rings[ring];
260 switch (RCV_DESC_TYPE(ring)) {
261 case RCV_DESC_NORMAL:
262 rds_ring->max_rx_desc_count =
263 adapter->max_rx_desc_count;
264 rds_ring->flags = RCV_DESC_NORMAL;
265 if (adapter->ahw.cut_through) {
266 rds_ring->dma_size =
267 NX_CT_DEFAULT_RX_BUF_LEN;
268 rds_ring->skb_size =
269 NX_CT_DEFAULT_RX_BUF_LEN;
270 } else {
271 rds_ring->dma_size = RX_DMA_MAP_LEN;
272 rds_ring->skb_size =
273 MAX_RX_BUFFER_LENGTH;
274 }
275 break;
276
277 case RCV_DESC_JUMBO:
278 rds_ring->max_rx_desc_count =
279 adapter->max_jumbo_rx_desc_count;
280 rds_ring->flags = RCV_DESC_JUMBO;
281 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
282 rds_ring->dma_size =
283 NX_P3_RX_JUMBO_BUF_MAX_LEN;
284 else
285 rds_ring->dma_size =
286 NX_P2_RX_JUMBO_BUF_MAX_LEN;
287 rds_ring->skb_size =
288 rds_ring->dma_size + NET_IP_ALIGN;
289 break;
290
291 case RCV_RING_LRO:
292 rds_ring->max_rx_desc_count =
293 adapter->max_lro_rx_desc_count;
294 rds_ring->flags = RCV_DESC_LRO;
295 rds_ring->dma_size = RX_LRO_DMA_MAP_LEN;
296 rds_ring->skb_size = MAX_RX_LRO_BUFFER_LENGTH;
297 break;
298
299 }
300 rds_ring->rx_buf_arr = (struct netxen_rx_buffer *)
301 vmalloc(RCV_BUFFSIZE);
302 if (rds_ring->rx_buf_arr == NULL) {
303 printk(KERN_ERR "%s: Failed to allocate "
304 "rx buffer ring %d\n",
305 netdev->name, ring);
306 /* free whatever was already allocated */
307 goto err_out;
308 }
309 memset(rds_ring->rx_buf_arr, 0, RCV_BUFFSIZE);
310 INIT_LIST_HEAD(&rds_ring->free_list);
311 rds_ring->begin_alloc = 0;
191 /* 312 /*
192 * Now go through all of them, set reference handles 313 * Now go through all of them, set reference handles
193 * and put them in the queues. 314 * and put them in the queues.
194 */ 315 */
316 num_rx_bufs = rds_ring->max_rx_desc_count;
317 rx_buf = rds_ring->rx_buf_arr;
195 for (i = 0; i < num_rx_bufs; i++) { 318 for (i = 0; i < num_rx_bufs; i++) {
319 list_add_tail(&rx_buf->list,
320 &rds_ring->free_list);
196 rx_buf->ref_handle = i; 321 rx_buf->ref_handle = i;
197 rx_buf->state = NETXEN_BUFFER_FREE; 322 rx_buf->state = NETXEN_BUFFER_FREE;
198 DPRINTK(INFO, "Rx buf:ctx%d i(%d) rx_buf:"
199 "%p\n", ctxid, i, rx_buf);
200 rx_buf++; 323 rx_buf++;
201 } 324 }
202 } 325 }
203 } 326 }
327
328 return 0;
329
330err_out:
331 netxen_free_sw_resources(adapter);
332 return -ENOMEM;
204} 333}
205 334
206void netxen_initialize_adapter_ops(struct netxen_adapter *adapter) 335void netxen_initialize_adapter_ops(struct netxen_adapter *adapter)
@@ -211,14 +340,12 @@ void netxen_initialize_adapter_ops(struct netxen_adapter *adapter)
211 netxen_niu_gbe_enable_phy_interrupts; 340 netxen_niu_gbe_enable_phy_interrupts;
212 adapter->disable_phy_interrupts = 341 adapter->disable_phy_interrupts =
213 netxen_niu_gbe_disable_phy_interrupts; 342 netxen_niu_gbe_disable_phy_interrupts;
214 adapter->handle_phy_intr = netxen_nic_gbe_handle_phy_intr;
215 adapter->macaddr_set = netxen_niu_macaddr_set; 343 adapter->macaddr_set = netxen_niu_macaddr_set;
216 adapter->set_mtu = netxen_nic_set_mtu_gb; 344 adapter->set_mtu = netxen_nic_set_mtu_gb;
217 adapter->set_promisc = netxen_niu_set_promiscuous_mode; 345 adapter->set_promisc = netxen_niu_set_promiscuous_mode;
218 adapter->unset_promisc = netxen_niu_set_promiscuous_mode;
219 adapter->phy_read = netxen_niu_gbe_phy_read; 346 adapter->phy_read = netxen_niu_gbe_phy_read;
220 adapter->phy_write = netxen_niu_gbe_phy_write; 347 adapter->phy_write = netxen_niu_gbe_phy_write;
221 adapter->init_niu = netxen_nic_init_niu_gb; 348 adapter->init_port = netxen_niu_gbe_init_port;
222 adapter->stop_port = netxen_niu_disable_gbe_port; 349 adapter->stop_port = netxen_niu_disable_gbe_port;
223 break; 350 break;
224 351
@@ -227,12 +354,10 @@ void netxen_initialize_adapter_ops(struct netxen_adapter *adapter)
227 netxen_niu_xgbe_enable_phy_interrupts; 354 netxen_niu_xgbe_enable_phy_interrupts;
228 adapter->disable_phy_interrupts = 355 adapter->disable_phy_interrupts =
229 netxen_niu_xgbe_disable_phy_interrupts; 356 netxen_niu_xgbe_disable_phy_interrupts;
230 adapter->handle_phy_intr = netxen_nic_xgbe_handle_phy_intr;
231 adapter->macaddr_set = netxen_niu_xg_macaddr_set; 357 adapter->macaddr_set = netxen_niu_xg_macaddr_set;
232 adapter->set_mtu = netxen_nic_set_mtu_xgb; 358 adapter->set_mtu = netxen_nic_set_mtu_xgb;
233 adapter->init_port = netxen_niu_xg_init_port; 359 adapter->init_port = netxen_niu_xg_init_port;
234 adapter->set_promisc = netxen_niu_xg_set_promiscuous_mode; 360 adapter->set_promisc = netxen_niu_xg_set_promiscuous_mode;
235 adapter->unset_promisc = netxen_niu_xg_set_promiscuous_mode;
236 adapter->stop_port = netxen_niu_disable_xg_port; 361 adapter->stop_port = netxen_niu_disable_xg_port;
237 break; 362 break;
238 363
@@ -270,7 +395,9 @@ static u32 netxen_decode_crb_addr(u32 addr)
270 395
271static long rom_max_timeout = 100; 396static long rom_max_timeout = 100;
272static long rom_lock_timeout = 10000; 397static long rom_lock_timeout = 10000;
398#if 0
273static long rom_write_timeout = 700; 399static long rom_write_timeout = 700;
400#endif
274 401
275static int rom_lock(struct netxen_adapter *adapter) 402static int rom_lock(struct netxen_adapter *adapter)
276{ 403{
@@ -319,6 +446,7 @@ static int netxen_wait_rom_done(struct netxen_adapter *adapter)
319 return 0; 446 return 0;
320} 447}
321 448
449#if 0
322static int netxen_rom_wren(struct netxen_adapter *adapter) 450static int netxen_rom_wren(struct netxen_adapter *adapter)
323{ 451{
324 /* Set write enable latch in ROM status register */ 452 /* Set write enable latch in ROM status register */
@@ -348,6 +476,7 @@ static int netxen_do_rom_rdsr(struct netxen_adapter *adapter)
348 } 476 }
349 return netxen_rdcrbreg(adapter, NETXEN_ROMUSB_ROM_RDATA); 477 return netxen_rdcrbreg(adapter, NETXEN_ROMUSB_ROM_RDATA);
350} 478}
479#endif
351 480
352static void netxen_rom_unlock(struct netxen_adapter *adapter) 481static void netxen_rom_unlock(struct netxen_adapter *adapter)
353{ 482{
@@ -358,6 +487,7 @@ static void netxen_rom_unlock(struct netxen_adapter *adapter)
358 487
359} 488}
360 489
490#if 0
361static int netxen_rom_wip_poll(struct netxen_adapter *adapter) 491static int netxen_rom_wip_poll(struct netxen_adapter *adapter)
362{ 492{
363 long timeout = 0; 493 long timeout = 0;
@@ -393,6 +523,7 @@ static int do_rom_fast_write(struct netxen_adapter *adapter, int addr,
393 523
394 return netxen_rom_wip_poll(adapter); 524 return netxen_rom_wip_poll(adapter);
395} 525}
526#endif
396 527
397static int do_rom_fast_read(struct netxen_adapter *adapter, 528static int do_rom_fast_read(struct netxen_adapter *adapter,
398 int addr, int *valp) 529 int addr, int *valp)
@@ -475,7 +606,6 @@ int netxen_rom_fast_write(struct netxen_adapter *adapter, int addr, int data)
475 netxen_rom_unlock(adapter); 606 netxen_rom_unlock(adapter);
476 return ret; 607 return ret;
477} 608}
478#endif /* 0 */
479 609
480static int do_rom_fast_write_words(struct netxen_adapter *adapter, 610static int do_rom_fast_write_words(struct netxen_adapter *adapter,
481 int addr, u8 *bytes, size_t size) 611 int addr, u8 *bytes, size_t size)
@@ -740,28 +870,25 @@ int netxen_flash_unlock(struct netxen_adapter *adapter)
740 870
741 return ret; 871 return ret;
742} 872}
873#endif /* 0 */
743 874
744#define NETXEN_BOARDTYPE 0x4008 875#define NETXEN_BOARDTYPE 0x4008
745#define NETXEN_BOARDNUM 0x400c 876#define NETXEN_BOARDNUM 0x400c
746#define NETXEN_CHIPNUM 0x4010 877#define NETXEN_CHIPNUM 0x4010
747#define NETXEN_ROMBUS_RESET 0xFFFFFFFF
748#define NETXEN_ROM_FIRST_BARRIER 0x800000000ULL
749#define NETXEN_ROM_FOUND_INIT 0x400
750 878
751int netxen_pinit_from_rom(struct netxen_adapter *adapter, int verbose) 879int netxen_pinit_from_rom(struct netxen_adapter *adapter, int verbose)
752{ 880{
753 int addr, val; 881 int addr, val;
754 int n, i; 882 int i, init_delay = 0;
755 int init_delay = 0;
756 struct crb_addr_pair *buf; 883 struct crb_addr_pair *buf;
884 unsigned offset, n;
757 u32 off; 885 u32 off;
758 886
759 /* resetall */ 887 /* resetall */
760 netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_GLB_SW_RESET, 888 netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_GLB_SW_RESET,
761 NETXEN_ROMBUS_RESET); 889 0xffffffff);
762 890
763 if (verbose) { 891 if (verbose) {
764 int val;
765 if (netxen_rom_fast_read(adapter, NETXEN_BOARDTYPE, &val) == 0) 892 if (netxen_rom_fast_read(adapter, NETXEN_BOARDTYPE, &val) == 0)
766 printk("P2 ROM board type: 0x%08x\n", val); 893 printk("P2 ROM board type: 0x%08x\n", val);
767 else 894 else
@@ -776,117 +903,141 @@ int netxen_pinit_from_rom(struct netxen_adapter *adapter, int verbose)
776 printk("Could not read chip number\n"); 903 printk("Could not read chip number\n");
777 } 904 }
778 905
779 if (netxen_rom_fast_read(adapter, 0, &n) == 0 906 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
780 && (n & NETXEN_ROM_FIRST_BARRIER)) { 907 if (netxen_rom_fast_read(adapter, 0, &n) != 0 ||
781 n &= ~NETXEN_ROM_ROUNDUP; 908 (n != 0xcafecafeUL) ||
782 if (n < NETXEN_ROM_FOUND_INIT) { 909 netxen_rom_fast_read(adapter, 4, &n) != 0) {
783 if (verbose) 910 printk(KERN_ERR "%s: ERROR Reading crb_init area: "
784 printk("%s: %d CRB init values found" 911 "n: %08x\n", netxen_nic_driver_name, n);
785 " in ROM.\n", netxen_nic_driver_name, n);
786 } else {
787 printk("%s:n=0x%x Error! NetXen card flash not"
788 " initialized.\n", __FUNCTION__, n);
789 return -EIO; 912 return -EIO;
790 } 913 }
791 buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL); 914 offset = n & 0xffffU;
792 if (buf == NULL) { 915 n = (n >> 16) & 0xffffU;
793 printk("%s: netxen_pinit_from_rom: Unable to calloc " 916 } else {
794 "memory.\n", netxen_nic_driver_name); 917 if (netxen_rom_fast_read(adapter, 0, &n) != 0 ||
795 return -ENOMEM; 918 !(n & 0x80000000)) {
796 } 919 printk(KERN_ERR "%s: ERROR Reading crb_init area: "
797 for (i = 0; i < n; i++) { 920 "n: %08x\n", netxen_nic_driver_name, n);
798 if (netxen_rom_fast_read(adapter, 8 * i + 4, &val) != 0 921 return -EIO;
799 || netxen_rom_fast_read(adapter, 8 * i + 8,
800 &addr) != 0)
801 return -EIO;
802
803 buf[i].addr = addr;
804 buf[i].data = val;
805
806 if (verbose)
807 printk("%s: PCI: 0x%08x == 0x%08x\n",
808 netxen_nic_driver_name, (unsigned int)
809 netxen_decode_crb_addr(addr), val);
810 } 922 }
811 for (i = 0; i < n; i++) { 923 offset = 1;
924 n &= ~0x80000000;
925 }
926
927 if (n < 1024) {
928 if (verbose)
929 printk(KERN_DEBUG "%s: %d CRB init values found"
930 " in ROM.\n", netxen_nic_driver_name, n);
931 } else {
932 printk(KERN_ERR "%s:n=0x%x Error! NetXen card flash not"
933 " initialized.\n", __func__, n);
934 return -EIO;
935 }
936
937 buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL);
938 if (buf == NULL) {
939 printk("%s: netxen_pinit_from_rom: Unable to calloc memory.\n",
940 netxen_nic_driver_name);
941 return -ENOMEM;
942 }
943 for (i = 0; i < n; i++) {
944 if (netxen_rom_fast_read(adapter, 8*i + 4*offset, &val) != 0 ||
945 netxen_rom_fast_read(adapter, 8*i + 4*offset + 4, &addr) != 0)
946 return -EIO;
947
948 buf[i].addr = addr;
949 buf[i].data = val;
812 950
813 off = netxen_decode_crb_addr(buf[i].addr); 951 if (verbose)
814 if (off == NETXEN_ADDR_ERROR) { 952 printk(KERN_DEBUG "%s: PCI: 0x%08x == 0x%08x\n",
815 printk(KERN_ERR"CRB init value out of range %x\n", 953 netxen_nic_driver_name,
954 (u32)netxen_decode_crb_addr(addr), val);
955 }
956 for (i = 0; i < n; i++) {
957
958 off = netxen_decode_crb_addr(buf[i].addr);
959 if (off == NETXEN_ADDR_ERROR) {
960 printk(KERN_ERR"CRB init value out of range %x\n",
816 buf[i].addr); 961 buf[i].addr);
962 continue;
963 }
964 off += NETXEN_PCI_CRBSPACE;
965 /* skipping cold reboot MAGIC */
966 if (off == NETXEN_CAM_RAM(0x1fc))
967 continue;
968
969 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
970 /* do not reset PCI */
971 if (off == (ROMUSB_GLB + 0xbc))
817 continue; 972 continue;
818 } 973 if (off == (NETXEN_CRB_PEG_NET_1 + 0x18))
819 off += NETXEN_PCI_CRBSPACE; 974 buf[i].data = 0x1020;
820 /* skipping cold reboot MAGIC */ 975 /* skip the function enable register */
821 if (off == NETXEN_CAM_RAM(0x1fc)) 976 if (off == NETXEN_PCIE_REG(PCIE_SETUP_FUNCTION))
977 continue;
978 if (off == NETXEN_PCIE_REG(PCIE_SETUP_FUNCTION2))
822 continue; 979 continue;
980 if ((off & 0x0ff00000) == NETXEN_CRB_SMB)
981 continue;
982 }
823 983
824 /* After writing this register, HW needs time for CRB */ 984 if (off == NETXEN_ADDR_ERROR) {
825 /* to quiet down (else crb_window returns 0xffffffff) */ 985 printk(KERN_ERR "%s: Err: Unknown addr: 0x%08x\n",
826 if (off == NETXEN_ROMUSB_GLB_SW_RESET) { 986 netxen_nic_driver_name, buf[i].addr);
827 init_delay = 1; 987 continue;
988 }
989
990 /* After writing this register, HW needs time for CRB */
991 /* to quiet down (else crb_window returns 0xffffffff) */
992 if (off == NETXEN_ROMUSB_GLB_SW_RESET) {
993 init_delay = 1;
994 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
828 /* hold xdma in reset also */ 995 /* hold xdma in reset also */
829 buf[i].data = NETXEN_NIC_XDMA_RESET; 996 buf[i].data = NETXEN_NIC_XDMA_RESET;
830 } 997 }
998 }
831 999
832 if (ADDR_IN_WINDOW1(off)) { 1000 adapter->hw_write_wx(adapter, off, &buf[i].data, 4);
833 writel(buf[i].data,
834 NETXEN_CRB_NORMALIZE(adapter, off));
835 } else {
836 netxen_nic_pci_change_crbwindow(adapter, 0);
837 writel(buf[i].data,
838 pci_base_offset(adapter, off));
839 1001
840 netxen_nic_pci_change_crbwindow(adapter, 1); 1002 if (init_delay == 1) {
841 } 1003 msleep(1000);
842 if (init_delay == 1) { 1004 init_delay = 0;
843 msleep(1000);
844 init_delay = 0;
845 }
846 msleep(1);
847 } 1005 }
848 kfree(buf); 1006 msleep(1);
1007 }
1008 kfree(buf);
849 1009
850 /* disable_peg_cache_all */ 1010 /* disable_peg_cache_all */
851 1011
852 /* unreset_net_cache */ 1012 /* unreset_net_cache */
853 netxen_nic_hw_read_wx(adapter, NETXEN_ROMUSB_GLB_SW_RESET, &val, 1013 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
854 4); 1014 adapter->hw_read_wx(adapter,
855 netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_GLB_SW_RESET, 1015 NETXEN_ROMUSB_GLB_SW_RESET, &val, 4);
856 (val & 0xffffff0f));
857 /* p2dn replyCount */
858 netxen_crb_writelit_adapter(adapter,
859 NETXEN_CRB_PEG_NET_D + 0xec, 0x1e);
860 /* disable_peg_cache 0 */
861 netxen_crb_writelit_adapter(adapter, 1016 netxen_crb_writelit_adapter(adapter,
862 NETXEN_CRB_PEG_NET_D + 0x4c, 8); 1017 NETXEN_ROMUSB_GLB_SW_RESET, (val & 0xffffff0f));
863 /* disable_peg_cache 1 */
864 netxen_crb_writelit_adapter(adapter,
865 NETXEN_CRB_PEG_NET_I + 0x4c, 8);
866
867 /* peg_clr_all */
868
869 /* peg_clr 0 */
870 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0x8,
871 0);
872 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0xc,
873 0);
874 /* peg_clr 1 */
875 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0x8,
876 0);
877 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0xc,
878 0);
879 /* peg_clr 2 */
880 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0x8,
881 0);
882 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0xc,
883 0);
884 /* peg_clr 3 */
885 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0x8,
886 0);
887 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0xc,
888 0);
889 } 1018 }
1019
1020 /* p2dn replyCount */
1021 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_D + 0xec, 0x1e);
1022 /* disable_peg_cache 0 */
1023 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_D + 0x4c, 8);
1024 /* disable_peg_cache 1 */
1025 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_I + 0x4c, 8);
1026
1027 /* peg_clr_all */
1028
1029 /* peg_clr 0 */
1030 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0x8, 0);
1031 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0xc, 0);
1032 /* peg_clr 1 */
1033 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0x8, 0);
1034 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0xc, 0);
1035 /* peg_clr 2 */
1036 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0x8, 0);
1037 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0xc, 0);
1038 /* peg_clr 3 */
1039 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0x8, 0);
1040 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0xc, 0);
890 return 0; 1041 return 0;
891} 1042}
892 1043
@@ -897,12 +1048,12 @@ int netxen_initialize_adapter_offload(struct netxen_adapter *adapter)
897 uint32_t lo; 1048 uint32_t lo;
898 1049
899 adapter->dummy_dma.addr = 1050 adapter->dummy_dma.addr =
900 pci_alloc_consistent(adapter->ahw.pdev, 1051 pci_alloc_consistent(adapter->pdev,
901 NETXEN_HOST_DUMMY_DMA_SIZE, 1052 NETXEN_HOST_DUMMY_DMA_SIZE,
902 &adapter->dummy_dma.phys_addr); 1053 &adapter->dummy_dma.phys_addr);
903 if (adapter->dummy_dma.addr == NULL) { 1054 if (adapter->dummy_dma.addr == NULL) {
904 printk("%s: ERROR: Could not allocate dummy DMA memory\n", 1055 printk("%s: ERROR: Could not allocate dummy DMA memory\n",
905 __FUNCTION__); 1056 __func__);
906 return -ENOMEM; 1057 return -ENOMEM;
907 } 1058 }
908 1059
@@ -910,8 +1061,13 @@ int netxen_initialize_adapter_offload(struct netxen_adapter *adapter)
910 hi = (addr >> 32) & 0xffffffff; 1061 hi = (addr >> 32) & 0xffffffff;
911 lo = addr & 0xffffffff; 1062 lo = addr & 0xffffffff;
912 1063
913 writel(hi, NETXEN_CRB_NORMALIZE(adapter, CRB_HOST_DUMMY_BUF_ADDR_HI)); 1064 adapter->pci_write_normalize(adapter, CRB_HOST_DUMMY_BUF_ADDR_HI, hi);
914 writel(lo, NETXEN_CRB_NORMALIZE(adapter, CRB_HOST_DUMMY_BUF_ADDR_LO)); 1065 adapter->pci_write_normalize(adapter, CRB_HOST_DUMMY_BUF_ADDR_LO, lo);
1066
1067 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
1068 uint32_t temp = 0;
1069 adapter->hw_write_wx(adapter, CRB_HOST_DUMMY_BUF, &temp, 4);
1070 }
915 1071
916 return 0; 1072 return 0;
917} 1073}
@@ -931,7 +1087,7 @@ void netxen_free_adapter_offload(struct netxen_adapter *adapter)
931 } while (--i); 1087 } while (--i);
932 1088
933 if (i) { 1089 if (i) {
934 pci_free_consistent(adapter->ahw.pdev, 1090 pci_free_consistent(adapter->pdev,
935 NETXEN_HOST_DUMMY_DMA_SIZE, 1091 NETXEN_HOST_DUMMY_DMA_SIZE,
936 adapter->dummy_dma.addr, 1092 adapter->dummy_dma.addr,
937 adapter->dummy_dma.phys_addr); 1093 adapter->dummy_dma.phys_addr);
@@ -946,22 +1102,24 @@ void netxen_free_adapter_offload(struct netxen_adapter *adapter)
946int netxen_phantom_init(struct netxen_adapter *adapter, int pegtune_val) 1102int netxen_phantom_init(struct netxen_adapter *adapter, int pegtune_val)
947{ 1103{
948 u32 val = 0; 1104 u32 val = 0;
949 int retries = 30; 1105 int retries = 60;
950 1106
951 if (!pegtune_val) { 1107 if (!pegtune_val) {
952 do { 1108 do {
953 val = readl(NETXEN_CRB_NORMALIZE 1109 val = adapter->pci_read_normalize(adapter,
954 (adapter, CRB_CMDPEG_STATE)); 1110 CRB_CMDPEG_STATE);
955 pegtune_val = readl(NETXEN_CRB_NORMALIZE
956 (adapter, NETXEN_ROMUSB_GLB_PEGTUNE_DONE));
957 1111
958 if (val == PHAN_INITIALIZE_COMPLETE || 1112 if (val == PHAN_INITIALIZE_COMPLETE ||
959 val == PHAN_INITIALIZE_ACK) 1113 val == PHAN_INITIALIZE_ACK)
960 return 0; 1114 return 0;
961 1115
962 msleep(1000); 1116 msleep(500);
1117
963 } while (--retries); 1118 } while (--retries);
1119
964 if (!retries) { 1120 if (!retries) {
1121 pegtune_val = adapter->pci_read_normalize(adapter,
1122 NETXEN_ROMUSB_GLB_PEGTUNE_DONE);
965 printk(KERN_WARNING "netxen_phantom_init: init failed, " 1123 printk(KERN_WARNING "netxen_phantom_init: init failed, "
966 "pegtune_val=%x\n", pegtune_val); 1124 "pegtune_val=%x\n", pegtune_val);
967 return -1; 1125 return -1;
@@ -971,58 +1129,61 @@ int netxen_phantom_init(struct netxen_adapter *adapter, int pegtune_val)
971 return 0; 1129 return 0;
972} 1130}
973 1131
974static int netxen_nic_check_temp(struct netxen_adapter *adapter) 1132int netxen_receive_peg_ready(struct netxen_adapter *adapter)
975{ 1133{
976 struct net_device *netdev = adapter->netdev; 1134 u32 val = 0;
977 uint32_t temp, temp_state, temp_val; 1135 int retries = 2000;
978 int rv = 0; 1136
979 1137 do {
980 temp = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_TEMP_STATE)); 1138 val = adapter->pci_read_normalize(adapter, CRB_RCVPEG_STATE);
981 1139
982 temp_state = nx_get_temp_state(temp); 1140 if (val == PHAN_PEG_RCV_INITIALIZED)
983 temp_val = nx_get_temp_val(temp); 1141 return 0;
984 1142
985 if (temp_state == NX_TEMP_PANIC) { 1143 msleep(10);
986 printk(KERN_ALERT 1144
987 "%s: Device temperature %d degrees C exceeds" 1145 } while (--retries);
988 " maximum allowed. Hardware has been shut down.\n", 1146
989 netxen_nic_driver_name, temp_val); 1147 if (!retries) {
990 1148 printk(KERN_ERR "Receive Peg initialization not "
991 netif_carrier_off(netdev); 1149 "complete, state: 0x%x.\n", val);
992 netif_stop_queue(netdev); 1150 return -EIO;
993 rv = 1;
994 } else if (temp_state == NX_TEMP_WARN) {
995 if (adapter->temp == NX_TEMP_NORMAL) {
996 printk(KERN_ALERT
997 "%s: Device temperature %d degrees C "
998 "exceeds operating range."
999 " Immediate action needed.\n",
1000 netxen_nic_driver_name, temp_val);
1001 }
1002 } else {
1003 if (adapter->temp == NX_TEMP_WARN) {
1004 printk(KERN_INFO
1005 "%s: Device temperature is now %d degrees C"
1006 " in normal range.\n", netxen_nic_driver_name,
1007 temp_val);
1008 }
1009 } 1151 }
1010 adapter->temp = temp_state; 1152
1011 return rv; 1153 return 0;
1012} 1154}
1013 1155
1014void netxen_watchdog_task(struct work_struct *work) 1156static struct sk_buff *netxen_process_rxbuf(struct netxen_adapter *adapter,
1157 struct nx_host_rds_ring *rds_ring, u16 index, u16 cksum)
1015{ 1158{
1016 struct netxen_adapter *adapter = 1159 struct netxen_rx_buffer *buffer;
1017 container_of(work, struct netxen_adapter, watchdog_task); 1160 struct sk_buff *skb;
1018 1161
1019 if ((adapter->portnum == 0) && netxen_nic_check_temp(adapter)) 1162 buffer = &rds_ring->rx_buf_arr[index];
1020 return; 1163
1164 pci_unmap_single(adapter->pdev, buffer->dma, rds_ring->dma_size,
1165 PCI_DMA_FROMDEVICE);
1021 1166
1022 if (adapter->handle_phy_intr) 1167 skb = buffer->skb;
1023 adapter->handle_phy_intr(adapter); 1168 if (!skb)
1169 goto no_skb;
1024 1170
1025 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ); 1171 if (likely(adapter->rx_csum && cksum == STATUS_CKSUM_OK)) {
1172 adapter->stats.csummed++;
1173 skb->ip_summed = CHECKSUM_UNNECESSARY;
1174 } else
1175 skb->ip_summed = CHECKSUM_NONE;
1176
1177 skb->dev = adapter->netdev;
1178
1179 buffer->skb = NULL;
1180
1181no_skb:
1182 buffer->state = NETXEN_BUFFER_FREE;
1183 buffer->lro_current_frags = 0;
1184 buffer->lro_expected_frags = 0;
1185 list_add_tail(&buffer->list, &rds_ring->free_list);
1186 return skb;
1026} 1187}
1027 1188
1028/* 1189/*
@@ -1031,9 +1192,8 @@ void netxen_watchdog_task(struct work_struct *work)
1031 * invoke the routine to send more rx buffers to the Phantom... 1192 * invoke the routine to send more rx buffers to the Phantom...
1032 */ 1193 */
1033static void netxen_process_rcv(struct netxen_adapter *adapter, int ctxid, 1194static void netxen_process_rcv(struct netxen_adapter *adapter, int ctxid,
1034 struct status_desc *desc) 1195 struct status_desc *desc, struct status_desc *frag_desc)
1035{ 1196{
1036 struct pci_dev *pdev = adapter->pdev;
1037 struct net_device *netdev = adapter->netdev; 1197 struct net_device *netdev = adapter->netdev;
1038 u64 sts_data = le64_to_cpu(desc->status_desc_data); 1198 u64 sts_data = le64_to_cpu(desc->status_desc_data);
1039 int index = netxen_get_sts_refhandle(sts_data); 1199 int index = netxen_get_sts_refhandle(sts_data);
@@ -1042,8 +1202,8 @@ static void netxen_process_rcv(struct netxen_adapter *adapter, int ctxid,
1042 struct sk_buff *skb; 1202 struct sk_buff *skb;
1043 u32 length = netxen_get_sts_totallength(sts_data); 1203 u32 length = netxen_get_sts_totallength(sts_data);
1044 u32 desc_ctx; 1204 u32 desc_ctx;
1045 struct netxen_rcv_desc_ctx *rcv_desc; 1205 u16 pkt_offset = 0, cksum;
1046 int ret; 1206 struct nx_host_rds_ring *rds_ring;
1047 1207
1048 desc_ctx = netxen_get_sts_type(sts_data); 1208 desc_ctx = netxen_get_sts_type(sts_data);
1049 if (unlikely(desc_ctx >= NUM_RCV_DESC_RINGS)) { 1209 if (unlikely(desc_ctx >= NUM_RCV_DESC_RINGS)) {
@@ -1052,13 +1212,13 @@ static void netxen_process_rcv(struct netxen_adapter *adapter, int ctxid,
1052 return; 1212 return;
1053 } 1213 }
1054 1214
1055 rcv_desc = &recv_ctx->rcv_desc[desc_ctx]; 1215 rds_ring = &recv_ctx->rds_rings[desc_ctx];
1056 if (unlikely(index > rcv_desc->max_rx_desc_count)) { 1216 if (unlikely(index > rds_ring->max_rx_desc_count)) {
1057 DPRINTK(ERR, "Got a buffer index:%x Max is %x\n", 1217 DPRINTK(ERR, "Got a buffer index:%x Max is %x\n",
1058 index, rcv_desc->max_rx_desc_count); 1218 index, rds_ring->max_rx_desc_count);
1059 return; 1219 return;
1060 } 1220 }
1061 buffer = &rcv_desc->rx_buf_arr[index]; 1221 buffer = &rds_ring->rx_buf_arr[index];
1062 if (desc_ctx == RCV_DESC_LRO_CTXID) { 1222 if (desc_ctx == RCV_DESC_LRO_CTXID) {
1063 buffer->lro_current_frags++; 1223 buffer->lro_current_frags++;
1064 if (netxen_get_sts_desc_lro_last_frag(desc)) { 1224 if (netxen_get_sts_desc_lro_last_frag(desc)) {
@@ -1079,43 +1239,52 @@ static void netxen_process_rcv(struct netxen_adapter *adapter, int ctxid,
1079 } 1239 }
1080 } 1240 }
1081 1241
1082 pci_unmap_single(pdev, buffer->dma, rcv_desc->dma_size, 1242 cksum = netxen_get_sts_status(sts_data);
1083 PCI_DMA_FROMDEVICE);
1084 1243
1085 skb = (struct sk_buff *)buffer->skb; 1244 skb = netxen_process_rxbuf(adapter, rds_ring, index, cksum);
1086 1245 if (!skb)
1087 if (likely(adapter->rx_csum && 1246 return;
1088 netxen_get_sts_status(sts_data) == STATUS_CKSUM_OK)) {
1089 adapter->stats.csummed++;
1090 skb->ip_summed = CHECKSUM_UNNECESSARY;
1091 } else
1092 skb->ip_summed = CHECKSUM_NONE;
1093 1247
1094 skb->dev = netdev;
1095 if (desc_ctx == RCV_DESC_LRO_CTXID) { 1248 if (desc_ctx == RCV_DESC_LRO_CTXID) {
1096 /* True length was only available on the last pkt */ 1249 /* True length was only available on the last pkt */
1097 skb_put(skb, buffer->lro_length); 1250 skb_put(skb, buffer->lro_length);
1098 } else { 1251 } else {
1099 skb_put(skb, length); 1252 if (length > rds_ring->skb_size)
1253 skb_put(skb, rds_ring->skb_size);
1254 else
1255 skb_put(skb, length);
1256
1257 pkt_offset = netxen_get_sts_pkt_offset(sts_data);
1258 if (pkt_offset)
1259 skb_pull(skb, pkt_offset);
1100 } 1260 }
1101 1261
1102 skb->protocol = eth_type_trans(skb, netdev); 1262 skb->protocol = eth_type_trans(skb, netdev);
1103 1263
1104 ret = netif_receive_skb(skb);
1105 netdev->last_rx = jiffies;
1106
1107 rcv_desc->rcv_pending--;
1108
1109 /* 1264 /*
1110 * We just consumed one buffer so post a buffer. 1265 * rx buffer chaining is disabled, walk and free
1266 * any spurious rx buffer chain.
1111 */ 1267 */
1112 buffer->skb = NULL; 1268 if (frag_desc) {
1113 buffer->state = NETXEN_BUFFER_FREE; 1269 u16 i, nr_frags = desc->nr_frags;
1114 buffer->lro_current_frags = 0; 1270
1115 buffer->lro_expected_frags = 0; 1271 dev_kfree_skb_any(skb);
1272 for (i = 0; i < nr_frags; i++) {
1273 index = frag_desc->frag_handles[i];
1274 skb = netxen_process_rxbuf(adapter,
1275 rds_ring, index, cksum);
1276 if (skb)
1277 dev_kfree_skb_any(skb);
1278 }
1279 adapter->stats.rxdropped++;
1280 } else {
1116 1281
1117 adapter->stats.no_rcv++; 1282 netif_receive_skb(skb);
1118 adapter->stats.rxbytes += length; 1283 netdev->last_rx = jiffies;
1284
1285 adapter->stats.no_rcv++;
1286 adapter->stats.rxbytes += length;
1287 }
1119} 1288}
1120 1289
1121/* Process Receive status ring */ 1290/* Process Receive status ring */
@@ -1123,10 +1292,11 @@ u32 netxen_process_rcv_ring(struct netxen_adapter *adapter, int ctxid, int max)
1123{ 1292{
1124 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctxid]); 1293 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctxid]);
1125 struct status_desc *desc_head = recv_ctx->rcv_status_desc_head; 1294 struct status_desc *desc_head = recv_ctx->rcv_status_desc_head;
1126 struct status_desc *desc; /* used to read status desc here */ 1295 struct status_desc *desc, *frag_desc;
1127 u32 consumer = recv_ctx->status_rx_consumer; 1296 u32 consumer = recv_ctx->status_rx_consumer;
1128 u32 producer = 0;
1129 int count = 0, ring; 1297 int count = 0, ring;
1298 u64 sts_data;
1299 u16 opcode;
1130 1300
1131 while (count < max) { 1301 while (count < max) {
1132 desc = &desc_head[consumer]; 1302 desc = &desc_head[consumer];
@@ -1135,24 +1305,38 @@ u32 netxen_process_rcv_ring(struct netxen_adapter *adapter, int ctxid, int max)
1135 netxen_get_sts_owner(desc)); 1305 netxen_get_sts_owner(desc));
1136 break; 1306 break;
1137 } 1307 }
1138 netxen_process_rcv(adapter, ctxid, desc); 1308
1309 sts_data = le64_to_cpu(desc->status_desc_data);
1310 opcode = netxen_get_sts_opcode(sts_data);
1311 frag_desc = NULL;
1312 if (opcode == NETXEN_NIC_RXPKT_DESC) {
1313 if (desc->nr_frags) {
1314 consumer = get_next_index(consumer,
1315 adapter->max_rx_desc_count);
1316 frag_desc = &desc_head[consumer];
1317 netxen_set_sts_owner(frag_desc,
1318 STATUS_OWNER_PHANTOM);
1319 }
1320 }
1321
1322 netxen_process_rcv(adapter, ctxid, desc, frag_desc);
1323
1139 netxen_set_sts_owner(desc, STATUS_OWNER_PHANTOM); 1324 netxen_set_sts_owner(desc, STATUS_OWNER_PHANTOM);
1140 consumer = (consumer + 1) & (adapter->max_rx_desc_count - 1); 1325
1326 consumer = get_next_index(consumer,
1327 adapter->max_rx_desc_count);
1141 count++; 1328 count++;
1142 } 1329 }
1143 for (ring = 0; ring < NUM_RCV_DESC_RINGS; ring++) 1330 for (ring = 0; ring < adapter->max_rds_rings; ring++)
1144 netxen_post_rx_buffers_nodb(adapter, ctxid, ring); 1331 netxen_post_rx_buffers_nodb(adapter, ctxid, ring);
1145 1332
1146 /* update the consumer index in phantom */ 1333 /* update the consumer index in phantom */
1147 if (count) { 1334 if (count) {
1148 recv_ctx->status_rx_consumer = consumer; 1335 recv_ctx->status_rx_consumer = consumer;
1149 recv_ctx->status_rx_producer = producer;
1150 1336
1151 /* Window = 1 */ 1337 /* Window = 1 */
1152 writel(consumer, 1338 adapter->pci_write_normalize(adapter,
1153 NETXEN_CRB_NORMALIZE(adapter, 1339 recv_ctx->crb_sts_consumer, consumer);
1154 recv_crb_registers[adapter->portnum].
1155 crb_rcv_status_consumer));
1156 } 1340 }
1157 1341
1158 return count; 1342 return count;
@@ -1231,10 +1415,10 @@ int netxen_process_cmd_ring(struct netxen_adapter *adapter)
1231 */ 1415 */
1232void netxen_post_rx_buffers(struct netxen_adapter *adapter, u32 ctx, u32 ringid) 1416void netxen_post_rx_buffers(struct netxen_adapter *adapter, u32 ctx, u32 ringid)
1233{ 1417{
1234 struct pci_dev *pdev = adapter->ahw.pdev; 1418 struct pci_dev *pdev = adapter->pdev;
1235 struct sk_buff *skb; 1419 struct sk_buff *skb;
1236 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctx]); 1420 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctx]);
1237 struct netxen_rcv_desc_ctx *rcv_desc = NULL; 1421 struct nx_host_rds_ring *rds_ring = NULL;
1238 uint producer; 1422 uint producer;
1239 struct rcv_desc *pdesc; 1423 struct rcv_desc *pdesc;
1240 struct netxen_rx_buffer *buffer; 1424 struct netxen_rx_buffer *buffer;
@@ -1242,41 +1426,36 @@ void netxen_post_rx_buffers(struct netxen_adapter *adapter, u32 ctx, u32 ringid)
1242 int index = 0; 1426 int index = 0;
1243 netxen_ctx_msg msg = 0; 1427 netxen_ctx_msg msg = 0;
1244 dma_addr_t dma; 1428 dma_addr_t dma;
1429 struct list_head *head;
1245 1430
1246 rcv_desc = &recv_ctx->rcv_desc[ringid]; 1431 rds_ring = &recv_ctx->rds_rings[ringid];
1432
1433 producer = rds_ring->producer;
1434 index = rds_ring->begin_alloc;
1435 head = &rds_ring->free_list;
1247 1436
1248 producer = rcv_desc->producer;
1249 index = rcv_desc->begin_alloc;
1250 buffer = &rcv_desc->rx_buf_arr[index];
1251 /* We can start writing rx descriptors into the phantom memory. */ 1437 /* We can start writing rx descriptors into the phantom memory. */
1252 while (buffer->state == NETXEN_BUFFER_FREE) { 1438 while (!list_empty(head)) {
1253 skb = dev_alloc_skb(rcv_desc->skb_size); 1439
1440 skb = dev_alloc_skb(rds_ring->skb_size);
1254 if (unlikely(!skb)) { 1441 if (unlikely(!skb)) {
1255 /* 1442 rds_ring->begin_alloc = index;
1256 * TODO
1257 * We need to schedule the posting of buffers to the pegs.
1258 */
1259 rcv_desc->begin_alloc = index;
1260 DPRINTK(ERR, "netxen_post_rx_buffers: "
1261 " allocated only %d buffers\n", count);
1262 break; 1443 break;
1263 } 1444 }
1264 1445
1446 buffer = list_entry(head->next, struct netxen_rx_buffer, list);
1447 list_del(&buffer->list);
1448
1265 count++; /* now there should be no failure */ 1449 count++; /* now there should be no failure */
1266 pdesc = &rcv_desc->desc_head[producer]; 1450 pdesc = &rds_ring->desc_head[producer];
1267 1451
1268#if defined(XGB_DEBUG) 1452 if (!adapter->ahw.cut_through)
1269 *(unsigned long *)(skb->head) = 0xc0debabe; 1453 skb_reserve(skb, 2);
1270 if (skb_is_nonlinear(skb)) {
1271 printk("Allocated SKB @%p is nonlinear\n");
1272 }
1273#endif
1274 skb_reserve(skb, 2);
1275 /* This will be setup when we receive the 1454 /* This will be setup when we receive the
1276 * buffer after it has been filled FSL TBD TBD 1455 * buffer after it has been filled FSL TBD TBD
1277 * skb->dev = netdev; 1456 * skb->dev = netdev;
1278 */ 1457 */
1279 dma = pci_map_single(pdev, skb->data, rcv_desc->dma_size, 1458 dma = pci_map_single(pdev, skb->data, rds_ring->dma_size,
1280 PCI_DMA_FROMDEVICE); 1459 PCI_DMA_FROMDEVICE);
1281 pdesc->addr_buffer = cpu_to_le64(dma); 1460 pdesc->addr_buffer = cpu_to_le64(dma);
1282 buffer->skb = skb; 1461 buffer->skb = skb;
@@ -1284,112 +1463,101 @@ void netxen_post_rx_buffers(struct netxen_adapter *adapter, u32 ctx, u32 ringid)
1284 buffer->dma = dma; 1463 buffer->dma = dma;
1285 /* make a rcv descriptor */ 1464 /* make a rcv descriptor */
1286 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle); 1465 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
1287 pdesc->buffer_length = cpu_to_le32(rcv_desc->dma_size); 1466 pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size);
1288 DPRINTK(INFO, "done writing descripter\n"); 1467 DPRINTK(INFO, "done writing descripter\n");
1289 producer = 1468 producer =
1290 get_next_index(producer, rcv_desc->max_rx_desc_count); 1469 get_next_index(producer, rds_ring->max_rx_desc_count);
1291 index = get_next_index(index, rcv_desc->max_rx_desc_count); 1470 index = get_next_index(index, rds_ring->max_rx_desc_count);
1292 buffer = &rcv_desc->rx_buf_arr[index];
1293 } 1471 }
1294 /* if we did allocate buffers, then write the count to Phantom */ 1472 /* if we did allocate buffers, then write the count to Phantom */
1295 if (count) { 1473 if (count) {
1296 rcv_desc->begin_alloc = index; 1474 rds_ring->begin_alloc = index;
1297 rcv_desc->rcv_pending += count; 1475 rds_ring->producer = producer;
1298 rcv_desc->producer = producer;
1299 /* Window = 1 */ 1476 /* Window = 1 */
1300 writel((producer - 1) & 1477 adapter->pci_write_normalize(adapter,
1301 (rcv_desc->max_rx_desc_count - 1), 1478 rds_ring->crb_rcv_producer,
1302 NETXEN_CRB_NORMALIZE(adapter, 1479 (producer-1) & (rds_ring->max_rx_desc_count-1));
1303 recv_crb_registers[ 1480
1304 adapter->portnum]. 1481 if (adapter->fw_major < 4) {
1305 rcv_desc_crb[ringid].
1306 crb_rcv_producer_offset));
1307 /* 1482 /*
1308 * Write a doorbell msg to tell phanmon of change in 1483 * Write a doorbell msg to tell phanmon of change in
1309 * receive ring producer 1484 * receive ring producer
1485 * Only for firmware version < 4.0.0
1310 */ 1486 */
1311 netxen_set_msg_peg_id(msg, NETXEN_RCV_PEG_DB_ID); 1487 netxen_set_msg_peg_id(msg, NETXEN_RCV_PEG_DB_ID);
1312 netxen_set_msg_privid(msg); 1488 netxen_set_msg_privid(msg);
1313 netxen_set_msg_count(msg, 1489 netxen_set_msg_count(msg,
1314 ((producer - 1490 ((producer -
1315 1) & (rcv_desc-> 1491 1) & (rds_ring->
1316 max_rx_desc_count - 1))); 1492 max_rx_desc_count - 1)));
1317 netxen_set_msg_ctxid(msg, adapter->portnum); 1493 netxen_set_msg_ctxid(msg, adapter->portnum);
1318 netxen_set_msg_opcode(msg, NETXEN_RCV_PRODUCER(ringid)); 1494 netxen_set_msg_opcode(msg, NETXEN_RCV_PRODUCER(ringid));
1319 writel(msg, 1495 writel(msg,
1320 DB_NORMALIZE(adapter, 1496 DB_NORMALIZE(adapter,
1321 NETXEN_RCV_PRODUCER_OFFSET)); 1497 NETXEN_RCV_PRODUCER_OFFSET));
1498 }
1322 } 1499 }
1323} 1500}
1324 1501
1325static void netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter, 1502static void netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter,
1326 uint32_t ctx, uint32_t ringid) 1503 uint32_t ctx, uint32_t ringid)
1327{ 1504{
1328 struct pci_dev *pdev = adapter->ahw.pdev; 1505 struct pci_dev *pdev = adapter->pdev;
1329 struct sk_buff *skb; 1506 struct sk_buff *skb;
1330 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctx]); 1507 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctx]);
1331 struct netxen_rcv_desc_ctx *rcv_desc = NULL; 1508 struct nx_host_rds_ring *rds_ring = NULL;
1332 u32 producer; 1509 u32 producer;
1333 struct rcv_desc *pdesc; 1510 struct rcv_desc *pdesc;
1334 struct netxen_rx_buffer *buffer; 1511 struct netxen_rx_buffer *buffer;
1335 int count = 0; 1512 int count = 0;
1336 int index = 0; 1513 int index = 0;
1514 struct list_head *head;
1337 1515
1338 rcv_desc = &recv_ctx->rcv_desc[ringid]; 1516 rds_ring = &recv_ctx->rds_rings[ringid];
1339 1517
1340 producer = rcv_desc->producer; 1518 producer = rds_ring->producer;
1341 index = rcv_desc->begin_alloc; 1519 index = rds_ring->begin_alloc;
1342 buffer = &rcv_desc->rx_buf_arr[index]; 1520 head = &rds_ring->free_list;
1343 /* We can start writing rx descriptors into the phantom memory. */ 1521 /* We can start writing rx descriptors into the phantom memory. */
1344 while (buffer->state == NETXEN_BUFFER_FREE) { 1522 while (!list_empty(head)) {
1345 skb = dev_alloc_skb(rcv_desc->skb_size); 1523
1524 skb = dev_alloc_skb(rds_ring->skb_size);
1346 if (unlikely(!skb)) { 1525 if (unlikely(!skb)) {
1347 /* 1526 rds_ring->begin_alloc = index;
1348 * We need to schedule the posting of buffers to the pegs.
1349 */
1350 rcv_desc->begin_alloc = index;
1351 DPRINTK(ERR, "netxen_post_rx_buffers_nodb: "
1352 " allocated only %d buffers\n", count);
1353 break; 1527 break;
1354 } 1528 }
1529
1530 buffer = list_entry(head->next, struct netxen_rx_buffer, list);
1531 list_del(&buffer->list);
1532
1355 count++; /* now there should be no failure */ 1533 count++; /* now there should be no failure */
1356 pdesc = &rcv_desc->desc_head[producer]; 1534 pdesc = &rds_ring->desc_head[producer];
1357 skb_reserve(skb, 2); 1535 if (!adapter->ahw.cut_through)
1358 /* 1536 skb_reserve(skb, 2);
1359 * This will be setup when we receive the
1360 * buffer after it has been filled
1361 * skb->dev = netdev;
1362 */
1363 buffer->skb = skb; 1537 buffer->skb = skb;
1364 buffer->state = NETXEN_BUFFER_BUSY; 1538 buffer->state = NETXEN_BUFFER_BUSY;
1365 buffer->dma = pci_map_single(pdev, skb->data, 1539 buffer->dma = pci_map_single(pdev, skb->data,
1366 rcv_desc->dma_size, 1540 rds_ring->dma_size,
1367 PCI_DMA_FROMDEVICE); 1541 PCI_DMA_FROMDEVICE);
1368 1542
1369 /* make a rcv descriptor */ 1543 /* make a rcv descriptor */
1370 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle); 1544 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
1371 pdesc->buffer_length = cpu_to_le32(rcv_desc->dma_size); 1545 pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size);
1372 pdesc->addr_buffer = cpu_to_le64(buffer->dma); 1546 pdesc->addr_buffer = cpu_to_le64(buffer->dma);
1373 DPRINTK(INFO, "done writing descripter\n");
1374 producer = 1547 producer =
1375 get_next_index(producer, rcv_desc->max_rx_desc_count); 1548 get_next_index(producer, rds_ring->max_rx_desc_count);
1376 index = get_next_index(index, rcv_desc->max_rx_desc_count); 1549 index = get_next_index(index, rds_ring->max_rx_desc_count);
1377 buffer = &rcv_desc->rx_buf_arr[index]; 1550 buffer = &rds_ring->rx_buf_arr[index];
1378 } 1551 }
1379 1552
1380 /* if we did allocate buffers, then write the count to Phantom */ 1553 /* if we did allocate buffers, then write the count to Phantom */
1381 if (count) { 1554 if (count) {
1382 rcv_desc->begin_alloc = index; 1555 rds_ring->begin_alloc = index;
1383 rcv_desc->rcv_pending += count; 1556 rds_ring->producer = producer;
1384 rcv_desc->producer = producer;
1385 /* Window = 1 */ 1557 /* Window = 1 */
1386 writel((producer - 1) & 1558 adapter->pci_write_normalize(adapter,
1387 (rcv_desc->max_rx_desc_count - 1), 1559 rds_ring->crb_rcv_producer,
1388 NETXEN_CRB_NORMALIZE(adapter, 1560 (producer-1) & (rds_ring->max_rx_desc_count-1));
1389 recv_crb_registers[
1390 adapter->portnum].
1391 rcv_desc_crb[ringid].
1392 crb_rcv_producer_offset));
1393 wmb(); 1561 wmb();
1394 } 1562 }
1395} 1563}
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-27 13:15:55 -0500