diff options
Diffstat (limited to 'drivers/net/netxen/netxen_nic_hw.c')
-rw-r--r-- | drivers/net/netxen/netxen_nic_hw.c | 229 |
1 files changed, 101 insertions, 128 deletions
diff --git a/drivers/net/netxen/netxen_nic_hw.c b/drivers/net/netxen/netxen_nic_hw.c index 33444a20e4f7..87cda65ef66b 100644 --- a/drivers/net/netxen/netxen_nic_hw.c +++ b/drivers/net/netxen/netxen_nic_hw.c | |||
@@ -63,6 +63,31 @@ static inline void writeq(u64 val, void __iomem *addr) | |||
63 | } | 63 | } |
64 | #endif | 64 | #endif |
65 | 65 | ||
66 | #define ADDR_IN_RANGE(addr, low, high) \ | ||
67 | (((addr) < (high)) && ((addr) >= (low))) | ||
68 | |||
69 | #define PCI_OFFSET_FIRST_RANGE(adapter, off) \ | ||
70 | ((adapter)->ahw.pci_base0 + (off)) | ||
71 | #define PCI_OFFSET_SECOND_RANGE(adapter, off) \ | ||
72 | ((adapter)->ahw.pci_base1 + (off) - SECOND_PAGE_GROUP_START) | ||
73 | #define PCI_OFFSET_THIRD_RANGE(adapter, off) \ | ||
74 | ((adapter)->ahw.pci_base2 + (off) - THIRD_PAGE_GROUP_START) | ||
75 | |||
76 | static void __iomem *pci_base_offset(struct netxen_adapter *adapter, | ||
77 | unsigned long off) | ||
78 | { | ||
79 | if (ADDR_IN_RANGE(off, FIRST_PAGE_GROUP_START, FIRST_PAGE_GROUP_END)) | ||
80 | return PCI_OFFSET_FIRST_RANGE(adapter, off); | ||
81 | |||
82 | if (ADDR_IN_RANGE(off, SECOND_PAGE_GROUP_START, SECOND_PAGE_GROUP_END)) | ||
83 | return PCI_OFFSET_SECOND_RANGE(adapter, off); | ||
84 | |||
85 | if (ADDR_IN_RANGE(off, THIRD_PAGE_GROUP_START, THIRD_PAGE_GROUP_END)) | ||
86 | return PCI_OFFSET_THIRD_RANGE(adapter, off); | ||
87 | |||
88 | return NULL; | ||
89 | } | ||
90 | |||
66 | #define CRB_WIN_LOCK_TIMEOUT 100000000 | 91 | #define CRB_WIN_LOCK_TIMEOUT 100000000 |
67 | static crb_128M_2M_block_map_t crb_128M_2M_map[64] = { | 92 | static crb_128M_2M_block_map_t crb_128M_2M_map[64] = { |
68 | {{{0, 0, 0, 0} } }, /* 0: PCI */ | 93 | {{{0, 0, 0, 0} } }, /* 0: PCI */ |
@@ -294,18 +319,8 @@ static unsigned crb_hub_agt[64] = | |||
294 | 319 | ||
295 | /* PCI Windowing for DDR regions. */ | 320 | /* PCI Windowing for DDR regions. */ |
296 | 321 | ||
297 | #define ADDR_IN_RANGE(addr, low, high) \ | ||
298 | (((addr) <= (high)) && ((addr) >= (low))) | ||
299 | |||
300 | #define NETXEN_WINDOW_ONE 0x2000000 /*CRB Window: bit 25 of CRB address */ | 322 | #define NETXEN_WINDOW_ONE 0x2000000 /*CRB Window: bit 25 of CRB address */ |
301 | 323 | ||
302 | #define NETXEN_NIC_ZERO_PAUSE_ADDR 0ULL | ||
303 | #define NETXEN_NIC_UNIT_PAUSE_ADDR 0x200ULL | ||
304 | #define NETXEN_NIC_EPG_PAUSE_ADDR1 0x2200010000c28001ULL | ||
305 | #define NETXEN_NIC_EPG_PAUSE_ADDR2 0x0100088866554433ULL | ||
306 | |||
307 | #define NETXEN_NIC_WINDOW_MARGIN 0x100000 | ||
308 | |||
309 | int netxen_nic_set_mac(struct net_device *netdev, void *p) | 324 | int netxen_nic_set_mac(struct net_device *netdev, void *p) |
310 | { | 325 | { |
311 | struct netxen_adapter *adapter = netdev_priv(netdev); | 326 | struct netxen_adapter *adapter = netdev_priv(netdev); |
@@ -346,9 +361,9 @@ netxen_nic_enable_mcast_filter(struct netxen_adapter *adapter) | |||
346 | if (adapter->mc_enabled) | 361 | if (adapter->mc_enabled) |
347 | return 0; | 362 | return 0; |
348 | 363 | ||
349 | adapter->hw_read_wx(adapter, NETXEN_MAC_ADDR_CNTL_REG, &val, 4); | 364 | val = adapter->hw_read_wx(adapter, NETXEN_MAC_ADDR_CNTL_REG); |
350 | val |= (1UL << (28+port)); | 365 | val |= (1UL << (28+port)); |
351 | adapter->hw_write_wx(adapter, NETXEN_MAC_ADDR_CNTL_REG, &val, 4); | 366 | adapter->hw_write_wx(adapter, NETXEN_MAC_ADDR_CNTL_REG, val); |
352 | 367 | ||
353 | /* add broadcast addr to filter */ | 368 | /* add broadcast addr to filter */ |
354 | val = 0xffffff; | 369 | val = 0xffffff; |
@@ -377,9 +392,9 @@ netxen_nic_disable_mcast_filter(struct netxen_adapter *adapter) | |||
377 | if (!adapter->mc_enabled) | 392 | if (!adapter->mc_enabled) |
378 | return 0; | 393 | return 0; |
379 | 394 | ||
380 | adapter->hw_read_wx(adapter, NETXEN_MAC_ADDR_CNTL_REG, &val, 4); | 395 | val = adapter->hw_read_wx(adapter, NETXEN_MAC_ADDR_CNTL_REG); |
381 | val &= ~(1UL << (28+port)); | 396 | val &= ~(1UL << (28+port)); |
382 | adapter->hw_write_wx(adapter, NETXEN_MAC_ADDR_CNTL_REG, &val, 4); | 397 | adapter->hw_write_wx(adapter, NETXEN_MAC_ADDR_CNTL_REG, val); |
383 | 398 | ||
384 | val = MAC_HI(addr); | 399 | val = MAC_HI(addr); |
385 | netxen_crb_writelit_adapter(adapter, NETXEN_UNICAST_ADDR(port, 0), val); | 400 | netxen_crb_writelit_adapter(adapter, NETXEN_UNICAST_ADDR(port, 0), val); |
@@ -848,8 +863,8 @@ int netxen_p3_get_mac_addr(struct netxen_adapter *adapter, __le64 *mac) | |||
848 | crbaddr = CRB_MAC_BLOCK_START + | 863 | crbaddr = CRB_MAC_BLOCK_START + |
849 | (4 * ((pci_func/2) * 3)) + (4 * (pci_func & 1)); | 864 | (4 * ((pci_func/2) * 3)) + (4 * (pci_func & 1)); |
850 | 865 | ||
851 | adapter->hw_read_wx(adapter, crbaddr, &mac_lo, 4); | 866 | mac_lo = adapter->hw_read_wx(adapter, crbaddr); |
852 | adapter->hw_read_wx(adapter, crbaddr+4, &mac_hi, 4); | 867 | mac_hi = adapter->hw_read_wx(adapter, crbaddr+4); |
853 | 868 | ||
854 | if (pci_func & 1) | 869 | if (pci_func & 1) |
855 | *mac = le64_to_cpu((mac_lo >> 16) | ((u64)mac_hi << 16)); | 870 | *mac = le64_to_cpu((mac_lo >> 16) | ((u64)mac_hi << 16)); |
@@ -867,8 +882,8 @@ static int crb_win_lock(struct netxen_adapter *adapter) | |||
867 | 882 | ||
868 | while (!done) { | 883 | while (!done) { |
869 | /* acquire semaphore3 from PCI HW block */ | 884 | /* acquire semaphore3 from PCI HW block */ |
870 | adapter->hw_read_wx(adapter, | 885 | done = adapter->hw_read_wx(adapter, |
871 | NETXEN_PCIE_REG(PCIE_SEM7_LOCK), &done, 4); | 886 | NETXEN_PCIE_REG(PCIE_SEM7_LOCK)); |
872 | if (done == 1) | 887 | if (done == 1) |
873 | break; | 888 | break; |
874 | if (timeout >= CRB_WIN_LOCK_TIMEOUT) | 889 | if (timeout >= CRB_WIN_LOCK_TIMEOUT) |
@@ -885,8 +900,8 @@ static void crb_win_unlock(struct netxen_adapter *adapter) | |||
885 | { | 900 | { |
886 | int val; | 901 | int val; |
887 | 902 | ||
888 | adapter->hw_read_wx(adapter, | 903 | val = adapter->hw_read_wx(adapter, |
889 | NETXEN_PCIE_REG(PCIE_SEM7_UNLOCK), &val, 4); | 904 | NETXEN_PCIE_REG(PCIE_SEM7_UNLOCK)); |
890 | } | 905 | } |
891 | 906 | ||
892 | /* | 907 | /* |
@@ -1022,7 +1037,7 @@ netxen_do_load_firmware(struct netxen_adapter *adapter, const char *fwname, | |||
1022 | dev_info(&pdev->dev, "loading firmware from flash\n"); | 1037 | dev_info(&pdev->dev, "loading firmware from flash\n"); |
1023 | 1038 | ||
1024 | if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) | 1039 | if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) |
1025 | adapter->pci_write_normalize(adapter, | 1040 | adapter->hw_write_wx(adapter, |
1026 | NETXEN_ROMUSB_GLB_CAS_RST, 1); | 1041 | NETXEN_ROMUSB_GLB_CAS_RST, 1); |
1027 | 1042 | ||
1028 | if (fw) { | 1043 | if (fw) { |
@@ -1075,12 +1090,12 @@ netxen_do_load_firmware(struct netxen_adapter *adapter, const char *fwname, | |||
1075 | msleep(1); | 1090 | msleep(1); |
1076 | 1091 | ||
1077 | if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) | 1092 | if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) |
1078 | adapter->pci_write_normalize(adapter, | 1093 | adapter->hw_write_wx(adapter, |
1079 | NETXEN_ROMUSB_GLB_SW_RESET, 0x80001d); | 1094 | NETXEN_ROMUSB_GLB_SW_RESET, 0x80001d); |
1080 | else { | 1095 | else { |
1081 | adapter->pci_write_normalize(adapter, | 1096 | adapter->hw_write_wx(adapter, |
1082 | NETXEN_ROMUSB_GLB_CHIP_CLK_CTRL, 0x3fff); | 1097 | NETXEN_ROMUSB_GLB_CHIP_CLK_CTRL, 0x3fff); |
1083 | adapter->pci_write_normalize(adapter, | 1098 | adapter->hw_write_wx(adapter, |
1084 | NETXEN_ROMUSB_GLB_CAS_RST, 0); | 1099 | NETXEN_ROMUSB_GLB_CAS_RST, 0); |
1085 | } | 1100 | } |
1086 | 1101 | ||
@@ -1168,8 +1183,8 @@ request_mn: | |||
1168 | netxen_rom_fast_read(adapter, | 1183 | netxen_rom_fast_read(adapter, |
1169 | NX_FW_VERSION_OFFSET, (int *)&flashed_ver); | 1184 | NX_FW_VERSION_OFFSET, (int *)&flashed_ver); |
1170 | if (flashed_ver >= NETXEN_VERSION_CODE(4, 0, 220)) { | 1185 | if (flashed_ver >= NETXEN_VERSION_CODE(4, 0, 220)) { |
1171 | adapter->hw_read_wx(adapter, | 1186 | capability = adapter->hw_read_wx(adapter, |
1172 | NX_PEG_TUNE_CAPABILITY, &capability, 4); | 1187 | NX_PEG_TUNE_CAPABILITY); |
1173 | if (capability & NX_PEG_TUNE_MN_PRESENT) { | 1188 | if (capability & NX_PEG_TUNE_MN_PRESENT) { |
1174 | fw_type = NX_P3_MN_ROMIMAGE; | 1189 | fw_type = NX_P3_MN_ROMIMAGE; |
1175 | goto request_fw; | 1190 | goto request_fw; |
@@ -1209,13 +1224,10 @@ load_fw: | |||
1209 | } | 1224 | } |
1210 | 1225 | ||
1211 | int | 1226 | int |
1212 | netxen_nic_hw_write_wx_128M(struct netxen_adapter *adapter, | 1227 | netxen_nic_hw_write_wx_128M(struct netxen_adapter *adapter, ulong off, u32 data) |
1213 | ulong off, void *data, int len) | ||
1214 | { | 1228 | { |
1215 | void __iomem *addr; | 1229 | void __iomem *addr; |
1216 | 1230 | ||
1217 | BUG_ON(len != 4); | ||
1218 | |||
1219 | if (ADDR_IN_WINDOW1(off)) { | 1231 | if (ADDR_IN_WINDOW1(off)) { |
1220 | addr = NETXEN_CRB_NORMALIZE(adapter, off); | 1232 | addr = NETXEN_CRB_NORMALIZE(adapter, off); |
1221 | } else { /* Window 0 */ | 1233 | } else { /* Window 0 */ |
@@ -1228,7 +1240,7 @@ netxen_nic_hw_write_wx_128M(struct netxen_adapter *adapter, | |||
1228 | return 1; | 1240 | return 1; |
1229 | } | 1241 | } |
1230 | 1242 | ||
1231 | writel(*(u32 *) data, addr); | 1243 | writel(data, addr); |
1232 | 1244 | ||
1233 | if (!ADDR_IN_WINDOW1(off)) | 1245 | if (!ADDR_IN_WINDOW1(off)) |
1234 | netxen_nic_pci_change_crbwindow_128M(adapter, 1); | 1246 | netxen_nic_pci_change_crbwindow_128M(adapter, 1); |
@@ -1236,13 +1248,11 @@ netxen_nic_hw_write_wx_128M(struct netxen_adapter *adapter, | |||
1236 | return 0; | 1248 | return 0; |
1237 | } | 1249 | } |
1238 | 1250 | ||
1239 | int | 1251 | u32 |
1240 | netxen_nic_hw_read_wx_128M(struct netxen_adapter *adapter, | 1252 | netxen_nic_hw_read_wx_128M(struct netxen_adapter *adapter, ulong off) |
1241 | ulong off, void *data, int len) | ||
1242 | { | 1253 | { |
1243 | void __iomem *addr; | 1254 | void __iomem *addr; |
1244 | 1255 | u32 data; | |
1245 | BUG_ON(len != 4); | ||
1246 | 1256 | ||
1247 | if (ADDR_IN_WINDOW1(off)) { /* Window 1 */ | 1257 | if (ADDR_IN_WINDOW1(off)) { /* Window 1 */ |
1248 | addr = NETXEN_CRB_NORMALIZE(adapter, off); | 1258 | addr = NETXEN_CRB_NORMALIZE(adapter, off); |
@@ -1256,24 +1266,21 @@ netxen_nic_hw_read_wx_128M(struct netxen_adapter *adapter, | |||
1256 | return 1; | 1266 | return 1; |
1257 | } | 1267 | } |
1258 | 1268 | ||
1259 | *(u32 *)data = readl(addr); | 1269 | data = readl(addr); |
1260 | 1270 | ||
1261 | if (!ADDR_IN_WINDOW1(off)) | 1271 | if (!ADDR_IN_WINDOW1(off)) |
1262 | netxen_nic_pci_change_crbwindow_128M(adapter, 1); | 1272 | netxen_nic_pci_change_crbwindow_128M(adapter, 1); |
1263 | 1273 | ||
1264 | return 0; | 1274 | return data; |
1265 | } | 1275 | } |
1266 | 1276 | ||
1267 | int | 1277 | int |
1268 | netxen_nic_hw_write_wx_2M(struct netxen_adapter *adapter, | 1278 | netxen_nic_hw_write_wx_2M(struct netxen_adapter *adapter, ulong off, u32 data) |
1269 | ulong off, void *data, int len) | ||
1270 | { | 1279 | { |
1271 | unsigned long flags = 0; | 1280 | unsigned long flags = 0; |
1272 | int rv; | 1281 | int rv; |
1273 | 1282 | ||
1274 | BUG_ON(len != 4); | 1283 | rv = netxen_nic_pci_get_crb_addr_2M(adapter, &off, 4); |
1275 | |||
1276 | rv = netxen_nic_pci_get_crb_addr_2M(adapter, &off, len); | ||
1277 | 1284 | ||
1278 | if (rv == -1) { | 1285 | if (rv == -1) { |
1279 | printk(KERN_ERR "%s: invalid offset: 0x%016lx\n", | 1286 | printk(KERN_ERR "%s: invalid offset: 0x%016lx\n", |
@@ -1286,26 +1293,24 @@ netxen_nic_hw_write_wx_2M(struct netxen_adapter *adapter, | |||
1286 | write_lock_irqsave(&adapter->adapter_lock, flags); | 1293 | write_lock_irqsave(&adapter->adapter_lock, flags); |
1287 | crb_win_lock(adapter); | 1294 | crb_win_lock(adapter); |
1288 | netxen_nic_pci_set_crbwindow_2M(adapter, &off); | 1295 | netxen_nic_pci_set_crbwindow_2M(adapter, &off); |
1289 | writel(*(uint32_t *)data, (void __iomem *)off); | 1296 | writel(data, (void __iomem *)off); |
1290 | crb_win_unlock(adapter); | 1297 | crb_win_unlock(adapter); |
1291 | write_unlock_irqrestore(&adapter->adapter_lock, flags); | 1298 | write_unlock_irqrestore(&adapter->adapter_lock, flags); |
1292 | } else | 1299 | } else |
1293 | writel(*(uint32_t *)data, (void __iomem *)off); | 1300 | writel(data, (void __iomem *)off); |
1294 | 1301 | ||
1295 | 1302 | ||
1296 | return 0; | 1303 | return 0; |
1297 | } | 1304 | } |
1298 | 1305 | ||
1299 | int | 1306 | u32 |
1300 | netxen_nic_hw_read_wx_2M(struct netxen_adapter *adapter, | 1307 | netxen_nic_hw_read_wx_2M(struct netxen_adapter *adapter, ulong off) |
1301 | ulong off, void *data, int len) | ||
1302 | { | 1308 | { |
1303 | unsigned long flags = 0; | 1309 | unsigned long flags = 0; |
1304 | int rv; | 1310 | int rv; |
1311 | u32 data; | ||
1305 | 1312 | ||
1306 | BUG_ON(len != 4); | 1313 | rv = netxen_nic_pci_get_crb_addr_2M(adapter, &off, 4); |
1307 | |||
1308 | rv = netxen_nic_pci_get_crb_addr_2M(adapter, &off, len); | ||
1309 | 1314 | ||
1310 | if (rv == -1) { | 1315 | if (rv == -1) { |
1311 | printk(KERN_ERR "%s: invalid offset: 0x%016lx\n", | 1316 | printk(KERN_ERR "%s: invalid offset: 0x%016lx\n", |
@@ -1318,47 +1323,45 @@ netxen_nic_hw_read_wx_2M(struct netxen_adapter *adapter, | |||
1318 | write_lock_irqsave(&adapter->adapter_lock, flags); | 1323 | write_lock_irqsave(&adapter->adapter_lock, flags); |
1319 | crb_win_lock(adapter); | 1324 | crb_win_lock(adapter); |
1320 | netxen_nic_pci_set_crbwindow_2M(adapter, &off); | 1325 | netxen_nic_pci_set_crbwindow_2M(adapter, &off); |
1321 | *(uint32_t *)data = readl((void __iomem *)off); | 1326 | data = readl((void __iomem *)off); |
1322 | crb_win_unlock(adapter); | 1327 | crb_win_unlock(adapter); |
1323 | write_unlock_irqrestore(&adapter->adapter_lock, flags); | 1328 | write_unlock_irqrestore(&adapter->adapter_lock, flags); |
1324 | } else | 1329 | } else |
1325 | *(uint32_t *)data = readl((void __iomem *)off); | 1330 | data = readl((void __iomem *)off); |
1326 | 1331 | ||
1327 | return 0; | 1332 | return data; |
1328 | } | 1333 | } |
1329 | 1334 | ||
1330 | void netxen_nic_reg_write(struct netxen_adapter *adapter, u64 off, u32 val) | 1335 | void netxen_nic_reg_write(struct netxen_adapter *adapter, u64 off, u32 val) |
1331 | { | 1336 | { |
1332 | adapter->hw_write_wx(adapter, off, &val, 4); | 1337 | adapter->hw_write_wx(adapter, off, val); |
1333 | } | 1338 | } |
1334 | 1339 | ||
1335 | int netxen_nic_reg_read(struct netxen_adapter *adapter, u64 off) | 1340 | int netxen_nic_reg_read(struct netxen_adapter *adapter, u64 off) |
1336 | { | 1341 | { |
1337 | int val; | 1342 | return adapter->hw_read_wx(adapter, off); |
1338 | adapter->hw_read_wx(adapter, off, &val, 4); | ||
1339 | return val; | ||
1340 | } | 1343 | } |
1341 | 1344 | ||
1342 | /* Change the window to 0, write and change back to window 1. */ | 1345 | /* Change the window to 0, write and change back to window 1. */ |
1343 | void netxen_nic_write_w0(struct netxen_adapter *adapter, u32 index, u32 value) | 1346 | void netxen_nic_write_w0(struct netxen_adapter *adapter, u32 index, u32 value) |
1344 | { | 1347 | { |
1345 | adapter->hw_write_wx(adapter, index, &value, 4); | 1348 | adapter->hw_write_wx(adapter, index, value); |
1346 | } | 1349 | } |
1347 | 1350 | ||
1348 | /* Change the window to 0, read and change back to window 1. */ | 1351 | /* Change the window to 0, read and change back to window 1. */ |
1349 | void netxen_nic_read_w0(struct netxen_adapter *adapter, u32 index, u32 *value) | 1352 | u32 netxen_nic_read_w0(struct netxen_adapter *adapter, u32 index) |
1350 | { | 1353 | { |
1351 | adapter->hw_read_wx(adapter, index, value, 4); | 1354 | return adapter->hw_read_wx(adapter, index); |
1352 | } | 1355 | } |
1353 | 1356 | ||
1354 | void netxen_nic_write_w1(struct netxen_adapter *adapter, u32 index, u32 value) | 1357 | void netxen_nic_write_w1(struct netxen_adapter *adapter, u32 index, u32 value) |
1355 | { | 1358 | { |
1356 | adapter->hw_write_wx(adapter, index, &value, 4); | 1359 | adapter->hw_write_wx(adapter, index, value); |
1357 | } | 1360 | } |
1358 | 1361 | ||
1359 | void netxen_nic_read_w1(struct netxen_adapter *adapter, u32 index, u32 *value) | 1362 | u32 netxen_nic_read_w1(struct netxen_adapter *adapter, u32 index) |
1360 | { | 1363 | { |
1361 | adapter->hw_read_wx(adapter, index, value, 4); | 1364 | return adapter->hw_read_wx(adapter, index); |
1362 | } | 1365 | } |
1363 | 1366 | ||
1364 | /* | 1367 | /* |
@@ -1461,17 +1464,6 @@ u32 netxen_nic_pci_read_immediate_128M(struct netxen_adapter *adapter, u64 off) | |||
1461 | return readl((void __iomem *)(pci_base_offset(adapter, off))); | 1464 | return readl((void __iomem *)(pci_base_offset(adapter, off))); |
1462 | } | 1465 | } |
1463 | 1466 | ||
1464 | void netxen_nic_pci_write_normalize_128M(struct netxen_adapter *adapter, | ||
1465 | u64 off, u32 data) | ||
1466 | { | ||
1467 | writel(data, NETXEN_CRB_NORMALIZE(adapter, off)); | ||
1468 | } | ||
1469 | |||
1470 | u32 netxen_nic_pci_read_normalize_128M(struct netxen_adapter *adapter, u64 off) | ||
1471 | { | ||
1472 | return readl(NETXEN_CRB_NORMALIZE(adapter, off)); | ||
1473 | } | ||
1474 | |||
1475 | unsigned long | 1467 | unsigned long |
1476 | netxen_nic_pci_set_window_2M(struct netxen_adapter *adapter, | 1468 | netxen_nic_pci_set_window_2M(struct netxen_adapter *adapter, |
1477 | unsigned long long addr) | 1469 | unsigned long long addr) |
@@ -1485,10 +1477,9 @@ netxen_nic_pci_set_window_2M(struct netxen_adapter *adapter, | |||
1485 | adapter->ahw.ddr_mn_window = window; | 1477 | adapter->ahw.ddr_mn_window = window; |
1486 | adapter->hw_write_wx(adapter, | 1478 | adapter->hw_write_wx(adapter, |
1487 | adapter->ahw.mn_win_crb | NETXEN_PCI_CRBSPACE, | 1479 | adapter->ahw.mn_win_crb | NETXEN_PCI_CRBSPACE, |
1488 | &window, 4); | 1480 | window); |
1489 | adapter->hw_read_wx(adapter, | 1481 | win_read = adapter->hw_read_wx(adapter, |
1490 | adapter->ahw.mn_win_crb | NETXEN_PCI_CRBSPACE, | 1482 | adapter->ahw.mn_win_crb | NETXEN_PCI_CRBSPACE); |
1491 | &win_read, 4); | ||
1492 | if ((win_read << 17) != window) { | 1483 | if ((win_read << 17) != window) { |
1493 | printk(KERN_INFO "Written MNwin (0x%x) != " | 1484 | printk(KERN_INFO "Written MNwin (0x%x) != " |
1494 | "Read MNwin (0x%x)\n", window, win_read); | 1485 | "Read MNwin (0x%x)\n", window, win_read); |
@@ -1505,10 +1496,9 @@ netxen_nic_pci_set_window_2M(struct netxen_adapter *adapter, | |||
1505 | adapter->ahw.ddr_mn_window = window; | 1496 | adapter->ahw.ddr_mn_window = window; |
1506 | adapter->hw_write_wx(adapter, | 1497 | adapter->hw_write_wx(adapter, |
1507 | adapter->ahw.mn_win_crb | NETXEN_PCI_CRBSPACE, | 1498 | adapter->ahw.mn_win_crb | NETXEN_PCI_CRBSPACE, |
1508 | &window, 4); | 1499 | window); |
1509 | adapter->hw_read_wx(adapter, | 1500 | win_read = adapter->hw_read_wx(adapter, |
1510 | adapter->ahw.mn_win_crb | NETXEN_PCI_CRBSPACE, | 1501 | adapter->ahw.mn_win_crb | NETXEN_PCI_CRBSPACE); |
1511 | &win_read, 4); | ||
1512 | if ((win_read >> 7) != window) { | 1502 | if ((win_read >> 7) != window) { |
1513 | printk(KERN_INFO "%s: Written OCMwin (0x%x) != " | 1503 | printk(KERN_INFO "%s: Written OCMwin (0x%x) != " |
1514 | "Read OCMwin (0x%x)\n", | 1504 | "Read OCMwin (0x%x)\n", |
@@ -1523,10 +1513,9 @@ netxen_nic_pci_set_window_2M(struct netxen_adapter *adapter, | |||
1523 | adapter->ahw.qdr_sn_window = window; | 1513 | adapter->ahw.qdr_sn_window = window; |
1524 | adapter->hw_write_wx(adapter, | 1514 | adapter->hw_write_wx(adapter, |
1525 | adapter->ahw.ms_win_crb | NETXEN_PCI_CRBSPACE, | 1515 | adapter->ahw.ms_win_crb | NETXEN_PCI_CRBSPACE, |
1526 | &window, 4); | 1516 | window); |
1527 | adapter->hw_read_wx(adapter, | 1517 | win_read = adapter->hw_read_wx(adapter, |
1528 | adapter->ahw.ms_win_crb | NETXEN_PCI_CRBSPACE, | 1518 | adapter->ahw.ms_win_crb | NETXEN_PCI_CRBSPACE); |
1529 | &win_read, 4); | ||
1530 | if (win_read != window) { | 1519 | if (win_read != window) { |
1531 | printk(KERN_INFO "%s: Written MSwin (0x%x) != " | 1520 | printk(KERN_INFO "%s: Written MSwin (0x%x) != " |
1532 | "Read MSwin (0x%x)\n", | 1521 | "Read MSwin (0x%x)\n", |
@@ -1973,26 +1962,26 @@ netxen_nic_pci_mem_write_2M(struct netxen_adapter *adapter, | |||
1973 | for (i = 0; i < loop; i++) { | 1962 | for (i = 0; i < loop; i++) { |
1974 | temp = off8 + (i << 3); | 1963 | temp = off8 + (i << 3); |
1975 | adapter->hw_write_wx(adapter, | 1964 | adapter->hw_write_wx(adapter, |
1976 | mem_crb+MIU_TEST_AGT_ADDR_LO, &temp, 4); | 1965 | mem_crb+MIU_TEST_AGT_ADDR_LO, temp); |
1977 | temp = 0; | 1966 | temp = 0; |
1978 | adapter->hw_write_wx(adapter, | 1967 | adapter->hw_write_wx(adapter, |
1979 | mem_crb+MIU_TEST_AGT_ADDR_HI, &temp, 4); | 1968 | mem_crb+MIU_TEST_AGT_ADDR_HI, temp); |
1980 | temp = word[i] & 0xffffffff; | 1969 | temp = word[i] & 0xffffffff; |
1981 | adapter->hw_write_wx(adapter, | 1970 | adapter->hw_write_wx(adapter, |
1982 | mem_crb+MIU_TEST_AGT_WRDATA_LO, &temp, 4); | 1971 | mem_crb+MIU_TEST_AGT_WRDATA_LO, temp); |
1983 | temp = (word[i] >> 32) & 0xffffffff; | 1972 | temp = (word[i] >> 32) & 0xffffffff; |
1984 | adapter->hw_write_wx(adapter, | 1973 | adapter->hw_write_wx(adapter, |
1985 | mem_crb+MIU_TEST_AGT_WRDATA_HI, &temp, 4); | 1974 | mem_crb+MIU_TEST_AGT_WRDATA_HI, temp); |
1986 | temp = MIU_TA_CTL_ENABLE | MIU_TA_CTL_WRITE; | 1975 | temp = MIU_TA_CTL_ENABLE | MIU_TA_CTL_WRITE; |
1987 | adapter->hw_write_wx(adapter, | 1976 | adapter->hw_write_wx(adapter, |
1988 | mem_crb+MIU_TEST_AGT_CTRL, &temp, 4); | 1977 | mem_crb+MIU_TEST_AGT_CTRL, temp); |
1989 | temp = MIU_TA_CTL_START | MIU_TA_CTL_ENABLE | MIU_TA_CTL_WRITE; | 1978 | temp = MIU_TA_CTL_START | MIU_TA_CTL_ENABLE | MIU_TA_CTL_WRITE; |
1990 | adapter->hw_write_wx(adapter, | 1979 | adapter->hw_write_wx(adapter, |
1991 | mem_crb+MIU_TEST_AGT_CTRL, &temp, 4); | 1980 | mem_crb+MIU_TEST_AGT_CTRL, temp); |
1992 | 1981 | ||
1993 | for (j = 0; j < MAX_CTL_CHECK; j++) { | 1982 | for (j = 0; j < MAX_CTL_CHECK; j++) { |
1994 | adapter->hw_read_wx(adapter, | 1983 | temp = adapter->hw_read_wx(adapter, |
1995 | mem_crb + MIU_TEST_AGT_CTRL, &temp, 4); | 1984 | mem_crb + MIU_TEST_AGT_CTRL); |
1996 | if ((temp & MIU_TA_CTL_BUSY) == 0) | 1985 | if ((temp & MIU_TA_CTL_BUSY) == 0) |
1997 | break; | 1986 | break; |
1998 | } | 1987 | } |
@@ -2050,20 +2039,20 @@ netxen_nic_pci_mem_read_2M(struct netxen_adapter *adapter, | |||
2050 | for (i = 0; i < loop; i++) { | 2039 | for (i = 0; i < loop; i++) { |
2051 | temp = off8 + (i << 3); | 2040 | temp = off8 + (i << 3); |
2052 | adapter->hw_write_wx(adapter, | 2041 | adapter->hw_write_wx(adapter, |
2053 | mem_crb + MIU_TEST_AGT_ADDR_LO, &temp, 4); | 2042 | mem_crb + MIU_TEST_AGT_ADDR_LO, temp); |
2054 | temp = 0; | 2043 | temp = 0; |
2055 | adapter->hw_write_wx(adapter, | 2044 | adapter->hw_write_wx(adapter, |
2056 | mem_crb + MIU_TEST_AGT_ADDR_HI, &temp, 4); | 2045 | mem_crb + MIU_TEST_AGT_ADDR_HI, temp); |
2057 | temp = MIU_TA_CTL_ENABLE; | 2046 | temp = MIU_TA_CTL_ENABLE; |
2058 | adapter->hw_write_wx(adapter, | 2047 | adapter->hw_write_wx(adapter, |
2059 | mem_crb + MIU_TEST_AGT_CTRL, &temp, 4); | 2048 | mem_crb + MIU_TEST_AGT_CTRL, temp); |
2060 | temp = MIU_TA_CTL_START | MIU_TA_CTL_ENABLE; | 2049 | temp = MIU_TA_CTL_START | MIU_TA_CTL_ENABLE; |
2061 | adapter->hw_write_wx(adapter, | 2050 | adapter->hw_write_wx(adapter, |
2062 | mem_crb + MIU_TEST_AGT_CTRL, &temp, 4); | 2051 | mem_crb + MIU_TEST_AGT_CTRL, temp); |
2063 | 2052 | ||
2064 | for (j = 0; j < MAX_CTL_CHECK; j++) { | 2053 | for (j = 0; j < MAX_CTL_CHECK; j++) { |
2065 | adapter->hw_read_wx(adapter, | 2054 | temp = adapter->hw_read_wx(adapter, |
2066 | mem_crb + MIU_TEST_AGT_CTRL, &temp, 4); | 2055 | mem_crb + MIU_TEST_AGT_CTRL); |
2067 | if ((temp & MIU_TA_CTL_BUSY) == 0) | 2056 | if ((temp & MIU_TA_CTL_BUSY) == 0) |
2068 | break; | 2057 | break; |
2069 | } | 2058 | } |
@@ -2078,8 +2067,8 @@ netxen_nic_pci_mem_read_2M(struct netxen_adapter *adapter, | |||
2078 | start = off0[i] >> 2; | 2067 | start = off0[i] >> 2; |
2079 | end = (off0[i] + sz[i] - 1) >> 2; | 2068 | end = (off0[i] + sz[i] - 1) >> 2; |
2080 | for (k = start; k <= end; k++) { | 2069 | for (k = start; k <= end; k++) { |
2081 | adapter->hw_read_wx(adapter, | 2070 | temp = adapter->hw_read_wx(adapter, |
2082 | mem_crb + MIU_TEST_AGT_RDDATA(k), &temp, 4); | 2071 | mem_crb + MIU_TEST_AGT_RDDATA(k)); |
2083 | word[i] |= ((uint64_t)temp << (32 * k)); | 2072 | word[i] |= ((uint64_t)temp << (32 * k)); |
2084 | } | 2073 | } |
2085 | } | 2074 | } |
@@ -2122,29 +2111,14 @@ netxen_nic_pci_mem_read_2M(struct netxen_adapter *adapter, | |||
2122 | int netxen_nic_pci_write_immediate_2M(struct netxen_adapter *adapter, | 2111 | int netxen_nic_pci_write_immediate_2M(struct netxen_adapter *adapter, |
2123 | u64 off, u32 data) | 2112 | u64 off, u32 data) |
2124 | { | 2113 | { |
2125 | adapter->hw_write_wx(adapter, off, &data, 4); | 2114 | adapter->hw_write_wx(adapter, off, data); |
2126 | 2115 | ||
2127 | return 0; | 2116 | return 0; |
2128 | } | 2117 | } |
2129 | 2118 | ||
2130 | u32 netxen_nic_pci_read_immediate_2M(struct netxen_adapter *adapter, u64 off) | 2119 | u32 netxen_nic_pci_read_immediate_2M(struct netxen_adapter *adapter, u64 off) |
2131 | { | 2120 | { |
2132 | u32 temp; | 2121 | return adapter->hw_read_wx(adapter, off); |
2133 | adapter->hw_read_wx(adapter, off, &temp, 4); | ||
2134 | return temp; | ||
2135 | } | ||
2136 | |||
2137 | void netxen_nic_pci_write_normalize_2M(struct netxen_adapter *adapter, | ||
2138 | u64 off, u32 data) | ||
2139 | { | ||
2140 | adapter->hw_write_wx(adapter, off, &data, 4); | ||
2141 | } | ||
2142 | |||
2143 | u32 netxen_nic_pci_read_normalize_2M(struct netxen_adapter *adapter, u64 off) | ||
2144 | { | ||
2145 | u32 temp; | ||
2146 | adapter->hw_read_wx(adapter, off, &temp, 4); | ||
2147 | return temp; | ||
2148 | } | 2122 | } |
2149 | 2123 | ||
2150 | int netxen_nic_get_board_info(struct netxen_adapter *adapter) | 2124 | int netxen_nic_get_board_info(struct netxen_adapter *adapter) |
@@ -2253,7 +2227,7 @@ void | |||
2253 | netxen_crb_writelit_adapter(struct netxen_adapter *adapter, | 2227 | netxen_crb_writelit_adapter(struct netxen_adapter *adapter, |
2254 | unsigned long off, int data) | 2228 | unsigned long off, int data) |
2255 | { | 2229 | { |
2256 | adapter->hw_write_wx(adapter, off, &data, 4); | 2230 | adapter->hw_write_wx(adapter, off, data); |
2257 | } | 2231 | } |
2258 | 2232 | ||
2259 | void netxen_nic_set_link_parameters(struct netxen_adapter *adapter) | 2233 | void netxen_nic_set_link_parameters(struct netxen_adapter *adapter) |
@@ -2270,8 +2244,8 @@ void netxen_nic_set_link_parameters(struct netxen_adapter *adapter) | |||
2270 | } | 2244 | } |
2271 | 2245 | ||
2272 | if (adapter->ahw.port_type == NETXEN_NIC_GBE) { | 2246 | if (adapter->ahw.port_type == NETXEN_NIC_GBE) { |
2273 | adapter->hw_read_wx(adapter, | 2247 | port_mode = adapter->hw_read_wx(adapter, |
2274 | NETXEN_PORT_MODE_ADDR, &port_mode, 4); | 2248 | NETXEN_PORT_MODE_ADDR); |
2275 | if (port_mode == NETXEN_PORT_MODE_802_3_AP) { | 2249 | if (port_mode == NETXEN_PORT_MODE_802_3_AP) { |
2276 | adapter->link_speed = SPEED_1000; | 2250 | adapter->link_speed = SPEED_1000; |
2277 | adapter->link_duplex = DUPLEX_FULL; | 2251 | adapter->link_duplex = DUPLEX_FULL; |
@@ -2348,9 +2322,9 @@ void netxen_nic_get_firmware_info(struct netxen_adapter *adapter) | |||
2348 | addr += sizeof(u32); | 2322 | addr += sizeof(u32); |
2349 | } | 2323 | } |
2350 | 2324 | ||
2351 | adapter->hw_read_wx(adapter, NETXEN_FW_VERSION_MAJOR, &fw_major, 4); | 2325 | fw_major = adapter->hw_read_wx(adapter, NETXEN_FW_VERSION_MAJOR); |
2352 | adapter->hw_read_wx(adapter, NETXEN_FW_VERSION_MINOR, &fw_minor, 4); | 2326 | fw_minor = adapter->hw_read_wx(adapter, NETXEN_FW_VERSION_MINOR); |
2353 | adapter->hw_read_wx(adapter, NETXEN_FW_VERSION_SUB, &fw_build, 4); | 2327 | fw_build = adapter->hw_read_wx(adapter, NETXEN_FW_VERSION_SUB); |
2354 | 2328 | ||
2355 | adapter->fw_major = fw_major; | 2329 | adapter->fw_major = fw_major; |
2356 | adapter->fw_version = NETXEN_VERSION_CODE(fw_major, fw_minor, fw_build); | 2330 | adapter->fw_version = NETXEN_VERSION_CODE(fw_major, fw_minor, fw_build); |
@@ -2373,8 +2347,7 @@ void netxen_nic_get_firmware_info(struct netxen_adapter *adapter) | |||
2373 | fw_major, fw_minor, fw_build); | 2347 | fw_major, fw_minor, fw_build); |
2374 | 2348 | ||
2375 | if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) { | 2349 | if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) { |
2376 | adapter->hw_read_wx(adapter, | 2350 | i = adapter->hw_read_wx(adapter, NETXEN_MIU_MN_CONTROL); |
2377 | NETXEN_MIU_MN_CONTROL, &i, 4); | ||
2378 | adapter->ahw.cut_through = (i & 0x4) ? 1 : 0; | 2351 | adapter->ahw.cut_through = (i & 0x4) ? 1 : 0; |
2379 | dev_info(&pdev->dev, "firmware running in %s mode\n", | 2352 | dev_info(&pdev->dev, "firmware running in %s mode\n", |
2380 | adapter->ahw.cut_through ? "cut-through" : "legacy"); | 2353 | adapter->ahw.cut_through ? "cut-through" : "legacy"); |