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path: root/drivers/net/myri10ge/myri10ge.c
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Diffstat (limited to 'drivers/net/myri10ge/myri10ge.c')
-rw-r--r--drivers/net/myri10ge/myri10ge.c88
1 files changed, 70 insertions, 18 deletions
diff --git a/drivers/net/myri10ge/myri10ge.c b/drivers/net/myri10ge/myri10ge.c
index b05dc6ed7fb7..f8efe0e70a6b 100644
--- a/drivers/net/myri10ge/myri10ge.c
+++ b/drivers/net/myri10ge/myri10ge.c
@@ -71,7 +71,7 @@
71#include "myri10ge_mcp.h" 71#include "myri10ge_mcp.h"
72#include "myri10ge_mcp_gen_header.h" 72#include "myri10ge_mcp_gen_header.h"
73 73
74#define MYRI10GE_VERSION_STR "1.2.0" 74#define MYRI10GE_VERSION_STR "1.3.0-1.233"
75 75
76MODULE_DESCRIPTION("Myricom 10G driver (10GbE)"); 76MODULE_DESCRIPTION("Myricom 10G driver (10GbE)");
77MODULE_AUTHOR("Maintainer: help@myri.com"); 77MODULE_AUTHOR("Maintainer: help@myri.com");
@@ -181,6 +181,7 @@ struct myri10ge_priv {
181 int intr_coal_delay; 181 int intr_coal_delay;
182 __be32 __iomem *intr_coal_delay_ptr; 182 __be32 __iomem *intr_coal_delay_ptr;
183 int mtrr; 183 int mtrr;
184 int wc_enabled;
184 int wake_queue; 185 int wake_queue;
185 int stop_queue; 186 int stop_queue;
186 int down_cnt; 187 int down_cnt;
@@ -233,7 +234,7 @@ static int myri10ge_msi = 1; /* enable msi by default */
233module_param(myri10ge_msi, int, S_IRUGO | S_IWUSR); 234module_param(myri10ge_msi, int, S_IRUGO | S_IWUSR);
234MODULE_PARM_DESC(myri10ge_msi, "Enable Message Signalled Interrupts\n"); 235MODULE_PARM_DESC(myri10ge_msi, "Enable Message Signalled Interrupts\n");
235 236
236static int myri10ge_intr_coal_delay = 25; 237static int myri10ge_intr_coal_delay = 75;
237module_param(myri10ge_intr_coal_delay, int, S_IRUGO); 238module_param(myri10ge_intr_coal_delay, int, S_IRUGO);
238MODULE_PARM_DESC(myri10ge_intr_coal_delay, "Interrupt coalescing delay\n"); 239MODULE_PARM_DESC(myri10ge_intr_coal_delay, "Interrupt coalescing delay\n");
239 240
@@ -278,7 +279,7 @@ static int myri10ge_fill_thresh = 256;
278module_param(myri10ge_fill_thresh, int, S_IRUGO | S_IWUSR); 279module_param(myri10ge_fill_thresh, int, S_IRUGO | S_IWUSR);
279MODULE_PARM_DESC(myri10ge_fill_thresh, "Number of empty rx slots allowed\n"); 280MODULE_PARM_DESC(myri10ge_fill_thresh, "Number of empty rx slots allowed\n");
280 281
281static int myri10ge_wcfifo = 1; 282static int myri10ge_wcfifo = 0;
282module_param(myri10ge_wcfifo, int, S_IRUGO); 283module_param(myri10ge_wcfifo, int, S_IRUGO);
283MODULE_PARM_DESC(myri10ge_wcfifo, "Enable WC Fifo when WC is enabled\n"); 284MODULE_PARM_DESC(myri10ge_wcfifo, "Enable WC Fifo when WC is enabled\n");
284 285
@@ -717,6 +718,8 @@ static int myri10ge_reset(struct myri10ge_priv *mgp)
717 int status; 718 int status;
718 size_t bytes; 719 size_t bytes;
719 u32 len; 720 u32 len;
721 struct page *dmatest_page;
722 dma_addr_t dmatest_bus;
720 723
721 /* try to send a reset command to the card to see if it 724 /* try to send a reset command to the card to see if it
722 * is alive */ 725 * is alive */
@@ -726,6 +729,11 @@ static int myri10ge_reset(struct myri10ge_priv *mgp)
726 dev_err(&mgp->pdev->dev, "failed reset\n"); 729 dev_err(&mgp->pdev->dev, "failed reset\n");
727 return -ENXIO; 730 return -ENXIO;
728 } 731 }
732 dmatest_page = alloc_page(GFP_KERNEL);
733 if (!dmatest_page)
734 return -ENOMEM;
735 dmatest_bus = pci_map_page(mgp->pdev, dmatest_page, 0, PAGE_SIZE,
736 DMA_BIDIRECTIONAL);
729 737
730 /* Now exchange information about interrupts */ 738 /* Now exchange information about interrupts */
731 739
@@ -764,8 +772,8 @@ static int myri10ge_reset(struct myri10ge_priv *mgp)
764 772
765 len = mgp->tx.boundary; 773 len = mgp->tx.boundary;
766 774
767 cmd.data0 = MYRI10GE_LOWPART_TO_U32(mgp->rx_done.bus); 775 cmd.data0 = MYRI10GE_LOWPART_TO_U32(dmatest_bus);
768 cmd.data1 = MYRI10GE_HIGHPART_TO_U32(mgp->rx_done.bus); 776 cmd.data1 = MYRI10GE_HIGHPART_TO_U32(dmatest_bus);
769 cmd.data2 = len * 0x10000; 777 cmd.data2 = len * 0x10000;
770 status = myri10ge_send_cmd(mgp, MXGEFW_DMA_TEST, &cmd, 0); 778 status = myri10ge_send_cmd(mgp, MXGEFW_DMA_TEST, &cmd, 0);
771 if (status == 0) 779 if (status == 0)
@@ -774,8 +782,8 @@ static int myri10ge_reset(struct myri10ge_priv *mgp)
774 else 782 else
775 dev_warn(&mgp->pdev->dev, "DMA read benchmark failed: %d\n", 783 dev_warn(&mgp->pdev->dev, "DMA read benchmark failed: %d\n",
776 status); 784 status);
777 cmd.data0 = MYRI10GE_LOWPART_TO_U32(mgp->rx_done.bus); 785 cmd.data0 = MYRI10GE_LOWPART_TO_U32(dmatest_bus);
778 cmd.data1 = MYRI10GE_HIGHPART_TO_U32(mgp->rx_done.bus); 786 cmd.data1 = MYRI10GE_HIGHPART_TO_U32(dmatest_bus);
779 cmd.data2 = len * 0x1; 787 cmd.data2 = len * 0x1;
780 status = myri10ge_send_cmd(mgp, MXGEFW_DMA_TEST, &cmd, 0); 788 status = myri10ge_send_cmd(mgp, MXGEFW_DMA_TEST, &cmd, 0);
781 if (status == 0) 789 if (status == 0)
@@ -785,8 +793,8 @@ static int myri10ge_reset(struct myri10ge_priv *mgp)
785 dev_warn(&mgp->pdev->dev, "DMA write benchmark failed: %d\n", 793 dev_warn(&mgp->pdev->dev, "DMA write benchmark failed: %d\n",
786 status); 794 status);
787 795
788 cmd.data0 = MYRI10GE_LOWPART_TO_U32(mgp->rx_done.bus); 796 cmd.data0 = MYRI10GE_LOWPART_TO_U32(dmatest_bus);
789 cmd.data1 = MYRI10GE_HIGHPART_TO_U32(mgp->rx_done.bus); 797 cmd.data1 = MYRI10GE_HIGHPART_TO_U32(dmatest_bus);
790 cmd.data2 = len * 0x10001; 798 cmd.data2 = len * 0x10001;
791 status = myri10ge_send_cmd(mgp, MXGEFW_DMA_TEST, &cmd, 0); 799 status = myri10ge_send_cmd(mgp, MXGEFW_DMA_TEST, &cmd, 0);
792 if (status == 0) 800 if (status == 0)
@@ -796,6 +804,9 @@ static int myri10ge_reset(struct myri10ge_priv *mgp)
796 dev_warn(&mgp->pdev->dev, 804 dev_warn(&mgp->pdev->dev,
797 "DMA read/write benchmark failed: %d\n", status); 805 "DMA read/write benchmark failed: %d\n", status);
798 806
807 pci_unmap_page(mgp->pdev, dmatest_bus, PAGE_SIZE, DMA_BIDIRECTIONAL);
808 put_page(dmatest_page);
809
799 memset(mgp->rx_done.entry, 0, bytes); 810 memset(mgp->rx_done.entry, 0, bytes);
800 811
801 /* reset mcp/driver shared state back to 0 */ 812 /* reset mcp/driver shared state back to 0 */
@@ -889,9 +900,7 @@ myri10ge_alloc_rx_pages(struct myri10ge_priv *mgp, struct myri10ge_rx_buf *rx,
889 /* try to refill entire ring */ 900 /* try to refill entire ring */
890 while (rx->fill_cnt != (rx->cnt + rx->mask + 1)) { 901 while (rx->fill_cnt != (rx->cnt + rx->mask + 1)) {
891 idx = rx->fill_cnt & rx->mask; 902 idx = rx->fill_cnt & rx->mask;
892 903 if (rx->page_offset + bytes <= MYRI10GE_ALLOC_SIZE) {
893 if ((bytes < MYRI10GE_ALLOC_SIZE / 2) &&
894 (rx->page_offset + bytes <= MYRI10GE_ALLOC_SIZE)) {
895 /* we can use part of previous page */ 904 /* we can use part of previous page */
896 get_page(rx->page); 905 get_page(rx->page);
897 } else { 906 } else {
@@ -922,6 +931,13 @@ myri10ge_alloc_rx_pages(struct myri10ge_priv *mgp, struct myri10ge_rx_buf *rx,
922 931
923 /* start next packet on a cacheline boundary */ 932 /* start next packet on a cacheline boundary */
924 rx->page_offset += SKB_DATA_ALIGN(bytes); 933 rx->page_offset += SKB_DATA_ALIGN(bytes);
934
935#if MYRI10GE_ALLOC_SIZE > 4096
936 /* don't cross a 4KB boundary */
937 if ((rx->page_offset >> 12) !=
938 ((rx->page_offset + bytes - 1) >> 12))
939 rx->page_offset = (rx->page_offset + 4096) & ~4095;
940#endif
925 rx->fill_cnt++; 941 rx->fill_cnt++;
926 942
927 /* copy 8 descriptors to the firmware at a time */ 943 /* copy 8 descriptors to the firmware at a time */
@@ -1375,7 +1391,7 @@ myri10ge_get_ethtool_stats(struct net_device *netdev,
1375 data[i] = ((unsigned long *)&mgp->stats)[i]; 1391 data[i] = ((unsigned long *)&mgp->stats)[i];
1376 1392
1377 data[i++] = (unsigned int)mgp->tx.boundary; 1393 data[i++] = (unsigned int)mgp->tx.boundary;
1378 data[i++] = (unsigned int)(mgp->mtrr >= 0); 1394 data[i++] = (unsigned int)mgp->wc_enabled;
1379 data[i++] = (unsigned int)mgp->pdev->irq; 1395 data[i++] = (unsigned int)mgp->pdev->irq;
1380 data[i++] = (unsigned int)mgp->msi_enabled; 1396 data[i++] = (unsigned int)mgp->msi_enabled;
1381 data[i++] = (unsigned int)mgp->read_dma; 1397 data[i++] = (unsigned int)mgp->read_dma;
@@ -1456,6 +1472,8 @@ static int myri10ge_allocate_rings(struct net_device *dev)
1456 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_SEND_RING_SIZE, &cmd, 0); 1472 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_SEND_RING_SIZE, &cmd, 0);
1457 tx_ring_size = cmd.data0; 1473 tx_ring_size = cmd.data0;
1458 status |= myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_RX_RING_SIZE, &cmd, 0); 1474 status |= myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_RX_RING_SIZE, &cmd, 0);
1475 if (status != 0)
1476 return status;
1459 rx_ring_size = cmd.data0; 1477 rx_ring_size = cmd.data0;
1460 1478
1461 tx_ring_entries = tx_ring_size / sizeof(struct mcp_kreq_ether_send); 1479 tx_ring_entries = tx_ring_size / sizeof(struct mcp_kreq_ether_send);
@@ -1463,6 +1481,8 @@ static int myri10ge_allocate_rings(struct net_device *dev)
1463 mgp->tx.mask = tx_ring_entries - 1; 1481 mgp->tx.mask = tx_ring_entries - 1;
1464 mgp->rx_small.mask = mgp->rx_big.mask = rx_ring_entries - 1; 1482 mgp->rx_small.mask = mgp->rx_big.mask = rx_ring_entries - 1;
1465 1483
1484 status = -ENOMEM;
1485
1466 /* allocate the host shadow rings */ 1486 /* allocate the host shadow rings */
1467 1487
1468 bytes = 8 + (MYRI10GE_MAX_SEND_DESC_TSO + 4) 1488 bytes = 8 + (MYRI10GE_MAX_SEND_DESC_TSO + 4)
@@ -1735,7 +1755,7 @@ static int myri10ge_open(struct net_device *dev)
1735 goto abort_with_irq; 1755 goto abort_with_irq;
1736 } 1756 }
1737 1757
1738 if (myri10ge_wcfifo && mgp->mtrr >= 0) { 1758 if (myri10ge_wcfifo && mgp->wc_enabled) {
1739 mgp->tx.wc_fifo = (u8 __iomem *) mgp->sram + MXGEFW_ETH_SEND_4; 1759 mgp->tx.wc_fifo = (u8 __iomem *) mgp->sram + MXGEFW_ETH_SEND_4;
1740 mgp->rx_small.wc_fifo = 1760 mgp->rx_small.wc_fifo =
1741 (u8 __iomem *) mgp->sram + MXGEFW_ETH_RECV_SMALL; 1761 (u8 __iomem *) mgp->sram + MXGEFW_ETH_RECV_SMALL;
@@ -1992,10 +2012,9 @@ again:
1992 mss = 0; 2012 mss = 0;
1993 max_segments = MXGEFW_MAX_SEND_DESC; 2013 max_segments = MXGEFW_MAX_SEND_DESC;
1994 2014
1995 if (skb->len > (dev->mtu + ETH_HLEN)) { 2015 if (skb_is_gso(skb)) {
1996 mss = skb_shinfo(skb)->gso_size; 2016 mss = skb_shinfo(skb)->gso_size;
1997 if (mss != 0) 2017 max_segments = MYRI10GE_MAX_SEND_DESC_TSO;
1998 max_segments = MYRI10GE_MAX_SEND_DESC_TSO;
1999 } 2018 }
2000 2019
2001 if ((unlikely(avail < max_segments))) { 2020 if ((unlikely(avail < max_segments))) {
@@ -2468,6 +2487,12 @@ static void myri10ge_enable_ecrc(struct myri10ge_priv *mgp)
2468 2487
2469#define PCI_DEVICE_ID_INTEL_E5000_PCIE23 0x25f7 2488#define PCI_DEVICE_ID_INTEL_E5000_PCIE23 0x25f7
2470#define PCI_DEVICE_ID_INTEL_E5000_PCIE47 0x25fa 2489#define PCI_DEVICE_ID_INTEL_E5000_PCIE47 0x25fa
2490#define PCI_DEVICE_ID_INTEL_6300ESB_PCIEE1 0x3510
2491#define PCI_DEVICE_ID_INTEL_6300ESB_PCIEE4 0x351b
2492#define PCI_DEVICE_ID_INTEL_E3000_PCIE 0x2779
2493#define PCI_DEVICE_ID_INTEL_E3010_PCIE 0x277a
2494#define PCI_DEVICE_ID_SERVERWORKS_HT2100_PCIE_FIRST 0x140
2495#define PCI_DEVICE_ID_SERVERWORKS_HT2100_PCIE_LAST 0x142
2471 2496
2472static void myri10ge_select_firmware(struct myri10ge_priv *mgp) 2497static void myri10ge_select_firmware(struct myri10ge_priv *mgp)
2473{ 2498{
@@ -2499,6 +2524,24 @@ static void myri10ge_select_firmware(struct myri10ge_priv *mgp)
2499 ((bridge->vendor == PCI_VENDOR_ID_SERVERWORKS 2524 ((bridge->vendor == PCI_VENDOR_ID_SERVERWORKS
2500 && bridge->device == 2525 && bridge->device ==
2501 PCI_DEVICE_ID_SERVERWORKS_HT2000_PCIE) 2526 PCI_DEVICE_ID_SERVERWORKS_HT2000_PCIE)
2527 /* ServerWorks HT2100 */
2528 || (bridge->vendor == PCI_VENDOR_ID_SERVERWORKS
2529 && bridge->device >=
2530 PCI_DEVICE_ID_SERVERWORKS_HT2100_PCIE_FIRST
2531 && bridge->device <=
2532 PCI_DEVICE_ID_SERVERWORKS_HT2100_PCIE_LAST)
2533 /* All Intel E3000/E3010 PCIE ports */
2534 || (bridge->vendor == PCI_VENDOR_ID_INTEL
2535 && (bridge->device ==
2536 PCI_DEVICE_ID_INTEL_E3000_PCIE
2537 || bridge->device ==
2538 PCI_DEVICE_ID_INTEL_E3010_PCIE))
2539 /* All Intel 6310/6311/6321ESB PCIE ports */
2540 || (bridge->vendor == PCI_VENDOR_ID_INTEL
2541 && bridge->device >=
2542 PCI_DEVICE_ID_INTEL_6300ESB_PCIEE1
2543 && bridge->device <=
2544 PCI_DEVICE_ID_INTEL_6300ESB_PCIEE4)
2502 /* All Intel E5000 PCIE ports */ 2545 /* All Intel E5000 PCIE ports */
2503 || (bridge->vendor == PCI_VENDOR_ID_INTEL 2546 || (bridge->vendor == PCI_VENDOR_ID_INTEL
2504 && bridge->device >= 2547 && bridge->device >=
@@ -2510,6 +2553,12 @@ static void myri10ge_select_firmware(struct myri10ge_priv *mgp)
2510 bridge->vendor, bridge->device); 2553 bridge->vendor, bridge->device);
2511 mgp->tx.boundary = 4096; 2554 mgp->tx.boundary = 4096;
2512 mgp->fw_name = myri10ge_fw_aligned; 2555 mgp->fw_name = myri10ge_fw_aligned;
2556 } else if (bridge &&
2557 bridge->vendor == PCI_VENDOR_ID_SGI &&
2558 bridge->device == 0x4002 /* TIOCE pcie-port */ ) {
2559 /* this pcie bridge does not support 4K rdma request */
2560 mgp->tx.boundary = 2048;
2561 mgp->fw_name = myri10ge_fw_aligned;
2513 } 2562 }
2514 } else { 2563 } else {
2515 if (myri10ge_force_firmware == 1) { 2564 if (myri10ge_force_firmware == 1) {
@@ -2830,9 +2879,12 @@ static int myri10ge_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2830 mgp->board_span = pci_resource_len(pdev, 0); 2879 mgp->board_span = pci_resource_len(pdev, 0);
2831 mgp->iomem_base = pci_resource_start(pdev, 0); 2880 mgp->iomem_base = pci_resource_start(pdev, 0);
2832 mgp->mtrr = -1; 2881 mgp->mtrr = -1;
2882 mgp->wc_enabled = 0;
2833#ifdef CONFIG_MTRR 2883#ifdef CONFIG_MTRR
2834 mgp->mtrr = mtrr_add(mgp->iomem_base, mgp->board_span, 2884 mgp->mtrr = mtrr_add(mgp->iomem_base, mgp->board_span,
2835 MTRR_TYPE_WRCOMB, 1); 2885 MTRR_TYPE_WRCOMB, 1);
2886 if (mgp->mtrr >= 0)
2887 mgp->wc_enabled = 1;
2836#endif 2888#endif
2837 /* Hack. need to get rid of these magic numbers */ 2889 /* Hack. need to get rid of these magic numbers */
2838 mgp->sram_size = 2890 mgp->sram_size =
@@ -2927,7 +2979,7 @@ static int myri10ge_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2927 dev_info(dev, "%s IRQ %d, tx bndry %d, fw %s, WC %s\n", 2979 dev_info(dev, "%s IRQ %d, tx bndry %d, fw %s, WC %s\n",
2928 (mgp->msi_enabled ? "MSI" : "xPIC"), 2980 (mgp->msi_enabled ? "MSI" : "xPIC"),
2929 netdev->irq, mgp->tx.boundary, mgp->fw_name, 2981 netdev->irq, mgp->tx.boundary, mgp->fw_name,
2930 (mgp->mtrr >= 0 ? "Enabled" : "Disabled")); 2982 (mgp->wc_enabled ? "Enabled" : "Disabled"));
2931 2983
2932 return 0; 2984 return 0;
2933 2985