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path: root/drivers/net/mlx4/en_main.c
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Diffstat (limited to 'drivers/net/mlx4/en_main.c')
-rw-r--r--drivers/net/mlx4/en_main.c54
1 files changed, 54 insertions, 0 deletions
diff --git a/drivers/net/mlx4/en_main.c b/drivers/net/mlx4/en_main.c
index 510633fd57f6..23955d8891b7 100644
--- a/drivers/net/mlx4/en_main.c
+++ b/drivers/net/mlx4/en_main.c
@@ -51,6 +51,60 @@ static const char mlx4_en_version[] =
51 DRV_NAME ": Mellanox ConnectX HCA Ethernet driver v" 51 DRV_NAME ": Mellanox ConnectX HCA Ethernet driver v"
52 DRV_VERSION " (" DRV_RELDATE ")\n"; 52 DRV_VERSION " (" DRV_RELDATE ")\n";
53 53
54#define MLX4_EN_PARM_INT(X, def_val, desc) \
55 static unsigned int X = def_val;\
56 module_param(X , uint, 0444); \
57 MODULE_PARM_DESC(X, desc);
58
59
60/*
61 * Device scope module parameters
62 */
63
64
65/* Use a XOR rathern than Toeplitz hash function for RSS */
66MLX4_EN_PARM_INT(rss_xor, 0, "Use XOR hash function for RSS");
67
68/* RSS hash type mask - default to <saddr, daddr, sport, dport> */
69MLX4_EN_PARM_INT(rss_mask, 0xf, "RSS hash type bitmask");
70
71/* Number of LRO sessions per Rx ring (rounded up to a power of two) */
72MLX4_EN_PARM_INT(num_lro, MLX4_EN_MAX_LRO_DESCRIPTORS,
73 "Number of LRO sessions per ring or disabled (0)");
74
75/* Priority pausing */
76MLX4_EN_PARM_INT(pfctx, 0, "Priority based Flow Control policy on TX[7:0]."
77 " Per priority bit mask");
78MLX4_EN_PARM_INT(pfcrx, 0, "Priority based Flow Control policy on RX[7:0]."
79 " Per priority bit mask");
80
81static int mlx4_en_get_profile(struct mlx4_en_dev *mdev)
82{
83 struct mlx4_en_profile *params = &mdev->profile;
84 int i;
85
86 params->rss_xor = (rss_xor != 0);
87 params->rss_mask = rss_mask & 0x1f;
88 params->num_lro = min_t(int, num_lro , MLX4_EN_MAX_LRO_DESCRIPTORS);
89 for (i = 1; i <= MLX4_MAX_PORTS; i++) {
90 params->prof[i].rx_pause = 1;
91 params->prof[i].rx_ppp = pfcrx;
92 params->prof[i].tx_pause = 1;
93 params->prof[i].tx_ppp = pfctx;
94 params->prof[i].tx_ring_size = MLX4_EN_DEF_TX_RING_SIZE;
95 params->prof[i].rx_ring_size = MLX4_EN_DEF_RX_RING_SIZE;
96 }
97 if (pfcrx || pfctx) {
98 params->prof[1].tx_ring_num = MLX4_EN_TX_RING_NUM;
99 params->prof[2].tx_ring_num = MLX4_EN_TX_RING_NUM;
100 } else {
101 params->prof[1].tx_ring_num = 1;
102 params->prof[2].tx_ring_num = 1;
103 }
104
105 return 0;
106}
107
54static void mlx4_en_event(struct mlx4_dev *dev, void *endev_ptr, 108static void mlx4_en_event(struct mlx4_dev *dev, void *endev_ptr,
55 enum mlx4_dev_event event, int port) 109 enum mlx4_dev_event event, int port)
56{ 110{