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path: root/drivers/net/ixgbe/ixgbe_main.c
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Diffstat (limited to 'drivers/net/ixgbe/ixgbe_main.c')
-rw-r--r--drivers/net/ixgbe/ixgbe_main.c86
1 files changed, 31 insertions, 55 deletions
diff --git a/drivers/net/ixgbe/ixgbe_main.c b/drivers/net/ixgbe/ixgbe_main.c
index 52d7f19de435..71df9ed9b534 100644
--- a/drivers/net/ixgbe/ixgbe_main.c
+++ b/drivers/net/ixgbe/ixgbe_main.c
@@ -587,7 +587,7 @@ static void ixgbe_alloc_rx_buffers(struct ixgbe_adapter *adapter,
587 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i); 587 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
588 588
589 if (!bi->page_dma && 589 if (!bi->page_dma &&
590 (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED)) { 590 (rx_ring->flags & IXGBE_RING_RX_PS_ENABLED)) {
591 if (!bi->page) { 591 if (!bi->page) {
592 bi->page = alloc_page(GFP_ATOMIC); 592 bi->page = alloc_page(GFP_ATOMIC);
593 if (!bi->page) { 593 if (!bi->page) {
@@ -631,7 +631,7 @@ static void ixgbe_alloc_rx_buffers(struct ixgbe_adapter *adapter,
631 } 631 }
632 /* Refresh the desc even if buffer_addrs didn't change because 632 /* Refresh the desc even if buffer_addrs didn't change because
633 * each write-back erases this info. */ 633 * each write-back erases this info. */
634 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) { 634 if (rx_ring->flags & IXGBE_RING_RX_PS_ENABLED) {
635 rx_desc->read.pkt_addr = cpu_to_le64(bi->page_dma); 635 rx_desc->read.pkt_addr = cpu_to_le64(bi->page_dma);
636 rx_desc->read.hdr_addr = cpu_to_le64(bi->dma); 636 rx_desc->read.hdr_addr = cpu_to_le64(bi->dma);
637 } else { 637 } else {
@@ -728,7 +728,7 @@ static bool ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
728 break; 728 break;
729 (*work_done)++; 729 (*work_done)++;
730 730
731 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) { 731 if (rx_ring->flags & IXGBE_RING_RX_PS_ENABLED) {
732 hdr_info = le16_to_cpu(ixgbe_get_hdr_info(rx_desc)); 732 hdr_info = le16_to_cpu(ixgbe_get_hdr_info(rx_desc));
733 len = (hdr_info & IXGBE_RXDADV_HDRBUFLEN_MASK) >> 733 len = (hdr_info & IXGBE_RXDADV_HDRBUFLEN_MASK) >>
734 IXGBE_RXDADV_HDRBUFLEN_SHIFT; 734 IXGBE_RXDADV_HDRBUFLEN_SHIFT;
@@ -800,7 +800,7 @@ static bool ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
800 rx_ring->stats.packets++; 800 rx_ring->stats.packets++;
801 rx_ring->stats.bytes += skb->len; 801 rx_ring->stats.bytes += skb->len;
802 } else { 802 } else {
803 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) { 803 if (rx_ring->flags & IXGBE_RING_RX_PS_ENABLED) {
804 rx_buffer_info->skb = next_buffer->skb; 804 rx_buffer_info->skb = next_buffer->skb;
805 rx_buffer_info->dma = next_buffer->dma; 805 rx_buffer_info->dma = next_buffer->dma;
806 next_buffer->skb = skb; 806 next_buffer->skb = skb;
@@ -1900,46 +1900,19 @@ static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
1900 1900
1901#define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2 1901#define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
1902 1902
1903static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter, int index) 1903static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter,
1904 struct ixgbe_ring *rx_ring)
1904{ 1905{
1905 struct ixgbe_ring *rx_ring;
1906 u32 srrctl; 1906 u32 srrctl;
1907 int queue0 = 0; 1907 int index;
1908 unsigned long mask;
1909 struct ixgbe_ring_feature *feature = adapter->ring_feature; 1908 struct ixgbe_ring_feature *feature = adapter->ring_feature;
1910 1909
1911 if (adapter->hw.mac.type == ixgbe_mac_82599EB) { 1910 index = rx_ring->reg_idx;
1912 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) { 1911 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
1913 int dcb_i = feature[RING_F_DCB].indices; 1912 unsigned long mask;
1914 if (dcb_i == 8)
1915 queue0 = index >> 4;
1916 else if (dcb_i == 4)
1917 queue0 = index >> 5;
1918 else
1919 dev_err(&adapter->pdev->dev, "Invalid DCB "
1920 "configuration\n");
1921#ifdef IXGBE_FCOE
1922 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED) {
1923 struct ixgbe_ring_feature *f;
1924
1925 rx_ring = &adapter->rx_ring[queue0];
1926 f = &adapter->ring_feature[RING_F_FCOE];
1927 if ((queue0 == 0) && (index > rx_ring->reg_idx))
1928 queue0 = f->mask + index -
1929 rx_ring->reg_idx - 1;
1930 }
1931#endif /* IXGBE_FCOE */
1932 } else {
1933 queue0 = index;
1934 }
1935 } else {
1936 mask = (unsigned long) feature[RING_F_RSS].mask; 1913 mask = (unsigned long) feature[RING_F_RSS].mask;
1937 queue0 = index & mask;
1938 index = index & mask; 1914 index = index & mask;
1939 } 1915 }
1940
1941 rx_ring = &adapter->rx_ring[queue0];
1942
1943 srrctl = IXGBE_READ_REG(&adapter->hw, IXGBE_SRRCTL(index)); 1916 srrctl = IXGBE_READ_REG(&adapter->hw, IXGBE_SRRCTL(index));
1944 1917
1945 srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK; 1918 srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK;
@@ -1948,7 +1921,7 @@ static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter, int index)
1948 srrctl |= (IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT) & 1921 srrctl |= (IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT) &
1949 IXGBE_SRRCTL_BSIZEHDR_MASK; 1922 IXGBE_SRRCTL_BSIZEHDR_MASK;
1950 1923
1951 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) { 1924 if (rx_ring->flags & IXGBE_RING_RX_PS_ENABLED) {
1952#if (PAGE_SIZE / 2) > IXGBE_MAX_RXBUFFER 1925#if (PAGE_SIZE / 2) > IXGBE_MAX_RXBUFFER
1953 srrctl |= IXGBE_MAX_RXBUFFER >> IXGBE_SRRCTL_BSIZEPKT_SHIFT; 1926 srrctl |= IXGBE_MAX_RXBUFFER >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1954#else 1927#else
@@ -2004,6 +1977,7 @@ static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
2004{ 1977{
2005 u64 rdba; 1978 u64 rdba;
2006 struct ixgbe_hw *hw = &adapter->hw; 1979 struct ixgbe_hw *hw = &adapter->hw;
1980 struct ixgbe_ring *rx_ring;
2007 struct net_device *netdev = adapter->netdev; 1981 struct net_device *netdev = adapter->netdev;
2008 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN; 1982 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
2009 int i, j; 1983 int i, j;
@@ -2020,11 +1994,6 @@ static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
2020 /* Decide whether to use packet split mode or not */ 1994 /* Decide whether to use packet split mode or not */
2021 adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED; 1995 adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
2022 1996
2023#ifdef IXGBE_FCOE
2024 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
2025 adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED;
2026#endif /* IXGBE_FCOE */
2027
2028 /* Set the RX buffer length according to the mode */ 1997 /* Set the RX buffer length according to the mode */
2029 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) { 1998 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
2030 rx_buf_len = IXGBE_RX_HDR_SIZE; 1999 rx_buf_len = IXGBE_RX_HDR_SIZE;
@@ -2072,29 +2041,35 @@ static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
2072 * the Base and Length of the Rx Descriptor Ring 2041 * the Base and Length of the Rx Descriptor Ring
2073 */ 2042 */
2074 for (i = 0; i < adapter->num_rx_queues; i++) { 2043 for (i = 0; i < adapter->num_rx_queues; i++) {
2075 rdba = adapter->rx_ring[i].dma; 2044 rx_ring = &adapter->rx_ring[i];
2076 j = adapter->rx_ring[i].reg_idx; 2045 rdba = rx_ring->dma;
2046 j = rx_ring->reg_idx;
2077 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(j), (rdba & DMA_BIT_MASK(32))); 2047 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(j), (rdba & DMA_BIT_MASK(32)));
2078 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(j), (rdba >> 32)); 2048 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(j), (rdba >> 32));
2079 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(j), rdlen); 2049 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(j), rdlen);
2080 IXGBE_WRITE_REG(hw, IXGBE_RDH(j), 0); 2050 IXGBE_WRITE_REG(hw, IXGBE_RDH(j), 0);
2081 IXGBE_WRITE_REG(hw, IXGBE_RDT(j), 0); 2051 IXGBE_WRITE_REG(hw, IXGBE_RDT(j), 0);
2082 adapter->rx_ring[i].head = IXGBE_RDH(j); 2052 rx_ring->head = IXGBE_RDH(j);
2083 adapter->rx_ring[i].tail = IXGBE_RDT(j); 2053 rx_ring->tail = IXGBE_RDT(j);
2084 adapter->rx_ring[i].rx_buf_len = rx_buf_len; 2054 rx_ring->rx_buf_len = rx_buf_len;
2055
2056 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED)
2057 rx_ring->flags |= IXGBE_RING_RX_PS_ENABLED;
2085 2058
2086#ifdef IXGBE_FCOE 2059#ifdef IXGBE_FCOE
2087 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED) { 2060 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED) {
2088 struct ixgbe_ring_feature *f; 2061 struct ixgbe_ring_feature *f;
2089 f = &adapter->ring_feature[RING_F_FCOE]; 2062 f = &adapter->ring_feature[RING_F_FCOE];
2090 if ((rx_buf_len < IXGBE_FCOE_JUMBO_FRAME_SIZE) && 2063 if ((i >= f->mask) && (i < f->mask + f->indices)) {
2091 (i >= f->mask) && (i < f->mask + f->indices)) 2064 rx_ring->flags &= ~IXGBE_RING_RX_PS_ENABLED;
2092 adapter->rx_ring[i].rx_buf_len = 2065 if (rx_buf_len < IXGBE_FCOE_JUMBO_FRAME_SIZE)
2093 IXGBE_FCOE_JUMBO_FRAME_SIZE; 2066 rx_ring->rx_buf_len =
2067 IXGBE_FCOE_JUMBO_FRAME_SIZE;
2068 }
2094 } 2069 }
2095 2070
2096#endif /* IXGBE_FCOE */ 2071#endif /* IXGBE_FCOE */
2097 ixgbe_configure_srrctl(adapter, j); 2072 ixgbe_configure_srrctl(adapter, rx_ring);
2098 } 2073 }
2099 2074
2100 if (hw->mac.type == ixgbe_mac_82598EB) { 2075 if (hw->mac.type == ixgbe_mac_82598EB) {
@@ -2170,7 +2145,8 @@ static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
2170 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) { 2145 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
2171 /* Enable 82599 HW-RSC */ 2146 /* Enable 82599 HW-RSC */
2172 for (i = 0; i < adapter->num_rx_queues; i++) { 2147 for (i = 0; i < adapter->num_rx_queues; i++) {
2173 j = adapter->rx_ring[i].reg_idx; 2148 rx_ring = &adapter->rx_ring[i];
2149 j = rx_ring->reg_idx;
2174 rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(j)); 2150 rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(j));
2175 rscctrl |= IXGBE_RSCCTL_RSCEN; 2151 rscctrl |= IXGBE_RSCCTL_RSCEN;
2176 /* 2152 /*
@@ -2178,7 +2154,7 @@ static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
2178 * total size of max desc * buf_len is not greater 2154 * total size of max desc * buf_len is not greater
2179 * than 65535 2155 * than 65535
2180 */ 2156 */
2181 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) { 2157 if (rx_ring->flags & IXGBE_RING_RX_PS_ENABLED) {
2182#if (MAX_SKB_FRAGS > 16) 2158#if (MAX_SKB_FRAGS > 16)
2183 rscctrl |= IXGBE_RSCCTL_MAXDESC_16; 2159 rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
2184#elif (MAX_SKB_FRAGS > 8) 2160#elif (MAX_SKB_FRAGS > 8)