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-rw-r--r--drivers/net/ixgbe/ixgbe.h103
1 files changed, 53 insertions, 50 deletions
diff --git a/drivers/net/ixgbe/ixgbe.h b/drivers/net/ixgbe/ixgbe.h
index 956914a5028d..2198b77c53ed 100644
--- a/drivers/net/ixgbe/ixgbe.h
+++ b/drivers/net/ixgbe/ixgbe.h
@@ -1,7 +1,7 @@
1/******************************************************************************* 1/*******************************************************************************
2 2
3 Intel 10 Gigabit PCI Express Linux driver 3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2007 Intel Corporation. 4 Copyright(c) 1999 - 2008 Intel Corporation.
5 5
6 This program is free software; you can redistribute it and/or modify it 6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License, 7 under the terms and conditions of the GNU General Public License,
@@ -20,7 +20,6 @@
20 the file called "COPYING". 20 the file called "COPYING".
21 21
22 Contact Information: 22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> 23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 25
@@ -37,17 +36,15 @@
37#include "ixgbe_type.h" 36#include "ixgbe_type.h"
38#include "ixgbe_common.h" 37#include "ixgbe_common.h"
39 38
40#ifdef CONFIG_DCA 39#if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
41#include <linux/dca.h> 40#include <linux/dca.h>
42#endif 41#endif
43 42
44#define IXGBE_ERR(args...) printk(KERN_ERR "ixgbe: " args)
45
46#define PFX "ixgbe: " 43#define PFX "ixgbe: "
47#define DPRINTK(nlevel, klevel, fmt, args...) \ 44#define DPRINTK(nlevel, klevel, fmt, args...) \
48 ((void)((NETIF_MSG_##nlevel & adapter->msg_enable) && \ 45 ((void)((NETIF_MSG_##nlevel & adapter->msg_enable) && \
49 printk(KERN_##klevel PFX "%s: %s: " fmt, adapter->netdev->name, \ 46 printk(KERN_##klevel PFX "%s: %s: " fmt, adapter->netdev->name, \
50 __FUNCTION__ , ## args))) 47 __func__ , ## args)))
51 48
52/* TX/RX descriptor defines */ 49/* TX/RX descriptor defines */
53#define IXGBE_DEFAULT_TXD 1024 50#define IXGBE_DEFAULT_TXD 1024
@@ -58,23 +55,14 @@
58#define IXGBE_MAX_RXD 4096 55#define IXGBE_MAX_RXD 4096
59#define IXGBE_MIN_RXD 64 56#define IXGBE_MIN_RXD 64
60 57
61#define IXGBE_DEFAULT_RXQ 1
62#define IXGBE_MAX_RXQ 1
63#define IXGBE_MIN_RXQ 1
64
65#define IXGBE_DEFAULT_ITR_RX_USECS 125 /* 8k irqs/sec */
66#define IXGBE_DEFAULT_ITR_TX_USECS 250 /* 4k irqs/sec */
67#define IXGBE_MIN_ITR_USECS 100 /* 500k irqs/sec */
68#define IXGBE_MAX_ITR_USECS 10000 /* 100 irqs/sec */
69
70/* flow control */ 58/* flow control */
71#define IXGBE_DEFAULT_FCRTL 0x10000 59#define IXGBE_DEFAULT_FCRTL 0x10000
72#define IXGBE_MIN_FCRTL 0 60#define IXGBE_MIN_FCRTL 0x40
73#define IXGBE_MAX_FCRTL 0x7FF80 61#define IXGBE_MAX_FCRTL 0x7FF80
74#define IXGBE_DEFAULT_FCRTH 0x20000 62#define IXGBE_DEFAULT_FCRTH 0x20000
75#define IXGBE_MIN_FCRTH 0 63#define IXGBE_MIN_FCRTH 0x600
76#define IXGBE_MAX_FCRTH 0x7FFF0 64#define IXGBE_MAX_FCRTH 0x7FFF0
77#define IXGBE_DEFAULT_FCPAUSE 0x6800 /* may be too long */ 65#define IXGBE_DEFAULT_FCPAUSE 0xFFFF
78#define IXGBE_MIN_FCPAUSE 0 66#define IXGBE_MIN_FCPAUSE 0
79#define IXGBE_MAX_FCPAUSE 0xFFFF 67#define IXGBE_MAX_FCPAUSE 0xFFFF
80 68
@@ -88,9 +76,6 @@
88 76
89#define MAXIMUM_ETHERNET_VLAN_SIZE (ETH_FRAME_LEN + ETH_FCS_LEN + VLAN_HLEN) 77#define MAXIMUM_ETHERNET_VLAN_SIZE (ETH_FRAME_LEN + ETH_FCS_LEN + VLAN_HLEN)
90 78
91/* How many Tx Descriptors do we need to call netif_wake_queue? */
92#define IXGBE_TX_QUEUE_WAKE 16
93
94/* How many Rx Buffers do we bundle into one write to the hardware ? */ 79/* How many Rx Buffers do we bundle into one write to the hardware ? */
95#define IXGBE_RX_BUFFER_WRITE 16 /* Must be power of 2 */ 80#define IXGBE_RX_BUFFER_WRITE 16 /* Must be power of 2 */
96 81
@@ -119,6 +104,7 @@ struct ixgbe_rx_buffer {
119 dma_addr_t dma; 104 dma_addr_t dma;
120 struct page *page; 105 struct page *page;
121 dma_addr_t page_dma; 106 dma_addr_t page_dma;
107 unsigned int page_offset;
122}; 108};
123 109
124struct ixgbe_queue_stats { 110struct ixgbe_queue_stats {
@@ -150,22 +136,20 @@ struct ixgbe_ring {
150 * offset associated with this ring, which is different 136 * offset associated with this ring, which is different
151 * for DCE and RSS modes */ 137 * for DCE and RSS modes */
152 138
153#ifdef CONFIG_DCA 139#if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
154 /* cpu for tx queue */ 140 /* cpu for tx queue */
155 int cpu; 141 int cpu;
156#endif 142#endif
157 struct net_lro_mgr lro_mgr; 143 struct net_lro_mgr lro_mgr;
158 bool lro_used; 144 bool lro_used;
159 struct ixgbe_queue_stats stats; 145 struct ixgbe_queue_stats stats;
160 u8 v_idx; /* maps directly to the index for this ring in the hardware 146 u16 v_idx; /* maps directly to the index for this ring in the hardware
161 * vector array, can also be used for finding the bit in EICR 147 * vector array, can also be used for finding the bit in EICR
162 * and friends that represents the vector for this ring */ 148 * and friends that represents the vector for this ring */
163 149
164 u32 eims_value;
165 u16 itr_register;
166 150
167 char name[IFNAMSIZ + 5];
168 u16 work_limit; /* max work per interrupt */ 151 u16 work_limit; /* max work per interrupt */
152 u16 rx_buf_len;
169}; 153};
170 154
171#define RING_F_VMDQ 1 155#define RING_F_VMDQ 1
@@ -190,8 +174,8 @@ struct ixgbe_q_vector {
190 DECLARE_BITMAP(txr_idx, MAX_TX_QUEUES); /* Tx ring indices */ 174 DECLARE_BITMAP(txr_idx, MAX_TX_QUEUES); /* Tx ring indices */
191 u8 rxr_count; /* Rx ring count assigned to this vector */ 175 u8 rxr_count; /* Rx ring count assigned to this vector */
192 u8 txr_count; /* Tx ring count assigned to this vector */ 176 u8 txr_count; /* Tx ring count assigned to this vector */
193 u8 tx_eitr; 177 u8 tx_itr;
194 u8 rx_eitr; 178 u8 rx_itr;
195 u32 eitr; 179 u32 eitr;
196}; 180};
197 181
@@ -228,7 +212,6 @@ struct ixgbe_adapter {
228 struct timer_list watchdog_timer; 212 struct timer_list watchdog_timer;
229 struct vlan_group *vlgrp; 213 struct vlan_group *vlgrp;
230 u16 bd_number; 214 u16 bd_number;
231 u16 rx_buf_len;
232 struct work_struct reset_task; 215 struct work_struct reset_task;
233 struct ixgbe_q_vector q_vector[MAX_MSIX_Q_VECTORS]; 216 struct ixgbe_q_vector q_vector[MAX_MSIX_Q_VECTORS];
234 char name[MAX_MSIX_COUNT][IFNAMSIZ + 5]; 217 char name[MAX_MSIX_COUNT][IFNAMSIZ + 5];
@@ -240,7 +223,9 @@ struct ixgbe_adapter {
240 223
241 /* TX */ 224 /* TX */
242 struct ixgbe_ring *tx_ring; /* One per active queue */ 225 struct ixgbe_ring *tx_ring; /* One per active queue */
226 int num_tx_queues;
243 u64 restart_queue; 227 u64 restart_queue;
228 u64 hw_csum_tx_good;
244 u64 lsc_int; 229 u64 lsc_int;
245 u64 hw_tso_ctxt; 230 u64 hw_tso_ctxt;
246 u64 hw_tso6_ctxt; 231 u64 hw_tso6_ctxt;
@@ -249,12 +234,10 @@ struct ixgbe_adapter {
249 234
250 /* RX */ 235 /* RX */
251 struct ixgbe_ring *rx_ring; /* One per active queue */ 236 struct ixgbe_ring *rx_ring; /* One per active queue */
252 u64 hw_csum_tx_good; 237 int num_rx_queues;
253 u64 hw_csum_rx_error; 238 u64 hw_csum_rx_error;
254 u64 hw_csum_rx_good; 239 u64 hw_csum_rx_good;
255 u64 non_eop_descs; 240 u64 non_eop_descs;
256 int num_tx_queues;
257 int num_rx_queues;
258 int num_msix_vectors; 241 int num_msix_vectors;
259 struct ixgbe_ring_feature ring_feature[3]; 242 struct ixgbe_ring_feature ring_feature[3];
260 struct msix_entry *msix_entries; 243 struct msix_entry *msix_entries;
@@ -267,15 +250,28 @@ struct ixgbe_adapter {
267 * thus the additional *_CAPABLE flags. 250 * thus the additional *_CAPABLE flags.
268 */ 251 */
269 u32 flags; 252 u32 flags;
270#define IXGBE_FLAG_RX_CSUM_ENABLED (u32)(1 << 0) 253#define IXGBE_FLAG_RX_CSUM_ENABLED (u32)(1)
271#define IXGBE_FLAG_MSI_ENABLED (u32)(1 << 1) 254#define IXGBE_FLAG_MSI_CAPABLE (u32)(1 << 1)
272#define IXGBE_FLAG_MSIX_ENABLED (u32)(1 << 2) 255#define IXGBE_FLAG_MSI_ENABLED (u32)(1 << 2)
273#define IXGBE_FLAG_RX_PS_ENABLED (u32)(1 << 3) 256#define IXGBE_FLAG_MSIX_CAPABLE (u32)(1 << 3)
274#define IXGBE_FLAG_IN_NETPOLL (u32)(1 << 4) 257#define IXGBE_FLAG_MSIX_ENABLED (u32)(1 << 4)
275#define IXGBE_FLAG_IMIR_ENABLED (u32)(1 << 5) 258#define IXGBE_FLAG_RX_1BUF_CAPABLE (u32)(1 << 6)
276#define IXGBE_FLAG_RSS_ENABLED (u32)(1 << 6) 259#define IXGBE_FLAG_RX_PS_CAPABLE (u32)(1 << 7)
277#define IXGBE_FLAG_VMDQ_ENABLED (u32)(1 << 7) 260#define IXGBE_FLAG_RX_PS_ENABLED (u32)(1 << 8)
278#define IXGBE_FLAG_DCA_ENABLED (u32)(1 << 8) 261#define IXGBE_FLAG_IN_NETPOLL (u32)(1 << 9)
262#define IXGBE_FLAG_DCA_ENABLED (u32)(1 << 10)
263#define IXGBE_FLAG_DCA_CAPABLE (u32)(1 << 11)
264#define IXGBE_FLAG_IMIR_ENABLED (u32)(1 << 12)
265#define IXGBE_FLAG_MQ_CAPABLE (u32)(1 << 13)
266#define IXGBE_FLAG_RSS_ENABLED (u32)(1 << 16)
267#define IXGBE_FLAG_RSS_CAPABLE (u32)(1 << 17)
268#define IXGBE_FLAG_VMDQ_CAPABLE (u32)(1 << 18)
269#define IXGBE_FLAG_VMDQ_ENABLED (u32)(1 << 19)
270#define IXGBE_FLAG_NEED_LINK_UPDATE (u32)(1 << 22)
271#define IXGBE_FLAG_IN_WATCHDOG_TASK (u32)(1 << 23)
272
273/* default to trying for four seconds */
274#define IXGBE_TRY_LINK_TIMEOUT (4 * HZ)
279 275
280 /* OS defined structs */ 276 /* OS defined structs */
281 struct net_device *netdev; 277 struct net_device *netdev;
@@ -288,14 +284,21 @@ struct ixgbe_adapter {
288 struct ixgbe_hw_stats stats; 284 struct ixgbe_hw_stats stats;
289 285
290 /* Interrupt Throttle Rate */ 286 /* Interrupt Throttle Rate */
291 u32 rx_eitr; 287 u32 eitr_param;
292 u32 tx_eitr;
293 288
294 unsigned long state; 289 unsigned long state;
295 u64 tx_busy; 290 u64 tx_busy;
296 u64 lro_aggregated; 291 u64 lro_aggregated;
297 u64 lro_flushed; 292 u64 lro_flushed;
298 u64 lro_no_desc; 293 u64 lro_no_desc;
294 unsigned int tx_ring_count;
295 unsigned int rx_ring_count;
296
297 u32 link_speed;
298 bool link_up;
299 unsigned long link_check_timeout;
300
301 struct work_struct watchdog_task;
299}; 302};
300 303
301enum ixbge_state_t { 304enum ixbge_state_t {
@@ -317,11 +320,11 @@ extern int ixgbe_up(struct ixgbe_adapter *adapter);
317extern void ixgbe_down(struct ixgbe_adapter *adapter); 320extern void ixgbe_down(struct ixgbe_adapter *adapter);
318extern void ixgbe_reinit_locked(struct ixgbe_adapter *adapter); 321extern void ixgbe_reinit_locked(struct ixgbe_adapter *adapter);
319extern void ixgbe_reset(struct ixgbe_adapter *adapter); 322extern void ixgbe_reset(struct ixgbe_adapter *adapter);
320extern void ixgbe_update_stats(struct ixgbe_adapter *adapter);
321extern void ixgbe_set_ethtool_ops(struct net_device *netdev); 323extern void ixgbe_set_ethtool_ops(struct net_device *netdev);
322extern int ixgbe_setup_rx_resources(struct ixgbe_adapter *adapter, 324extern int ixgbe_setup_rx_resources(struct ixgbe_adapter *, struct ixgbe_ring *);
323 struct ixgbe_ring *rxdr); 325extern int ixgbe_setup_tx_resources(struct ixgbe_adapter *, struct ixgbe_ring *);
324extern int ixgbe_setup_tx_resources(struct ixgbe_adapter *adapter, 326extern void ixgbe_free_rx_resources(struct ixgbe_adapter *, struct ixgbe_ring *);
325 struct ixgbe_ring *txdr); 327extern void ixgbe_free_tx_resources(struct ixgbe_adapter *, struct ixgbe_ring *);
328extern void ixgbe_update_stats(struct ixgbe_adapter *adapter);
326 329
327#endif /* _IXGBE_H_ */ 330#endif /* _IXGBE_H_ */