diff options
Diffstat (limited to 'drivers/net/ixgb/ixgb_ee.c')
-rw-r--r-- | drivers/net/ixgb/ixgb_ee.c | 10 |
1 files changed, 0 insertions, 10 deletions
diff --git a/drivers/net/ixgb/ixgb_ee.c b/drivers/net/ixgb/ixgb_ee.c index 06303a36aaf7..813993f9c65c 100644 --- a/drivers/net/ixgb/ixgb_ee.c +++ b/drivers/net/ixgb/ixgb_ee.c | |||
@@ -58,7 +58,6 @@ ixgb_raise_clock(struct ixgb_hw *hw, | |||
58 | *eecd_reg = *eecd_reg | IXGB_EECD_SK; | 58 | *eecd_reg = *eecd_reg | IXGB_EECD_SK; |
59 | IXGB_WRITE_REG(hw, EECD, *eecd_reg); | 59 | IXGB_WRITE_REG(hw, EECD, *eecd_reg); |
60 | udelay(50); | 60 | udelay(50); |
61 | return; | ||
62 | } | 61 | } |
63 | 62 | ||
64 | /****************************************************************************** | 63 | /****************************************************************************** |
@@ -77,7 +76,6 @@ ixgb_lower_clock(struct ixgb_hw *hw, | |||
77 | *eecd_reg = *eecd_reg & ~IXGB_EECD_SK; | 76 | *eecd_reg = *eecd_reg & ~IXGB_EECD_SK; |
78 | IXGB_WRITE_REG(hw, EECD, *eecd_reg); | 77 | IXGB_WRITE_REG(hw, EECD, *eecd_reg); |
79 | udelay(50); | 78 | udelay(50); |
80 | return; | ||
81 | } | 79 | } |
82 | 80 | ||
83 | /****************************************************************************** | 81 | /****************************************************************************** |
@@ -127,7 +125,6 @@ ixgb_shift_out_bits(struct ixgb_hw *hw, | |||
127 | /* We leave the "DI" bit set to "0" when we leave this routine. */ | 125 | /* We leave the "DI" bit set to "0" when we leave this routine. */ |
128 | eecd_reg &= ~IXGB_EECD_DI; | 126 | eecd_reg &= ~IXGB_EECD_DI; |
129 | IXGB_WRITE_REG(hw, EECD, eecd_reg); | 127 | IXGB_WRITE_REG(hw, EECD, eecd_reg); |
130 | return; | ||
131 | } | 128 | } |
132 | 129 | ||
133 | /****************************************************************************** | 130 | /****************************************************************************** |
@@ -192,7 +189,6 @@ ixgb_setup_eeprom(struct ixgb_hw *hw) | |||
192 | /* Set CS */ | 189 | /* Set CS */ |
193 | eecd_reg |= IXGB_EECD_CS; | 190 | eecd_reg |= IXGB_EECD_CS; |
194 | IXGB_WRITE_REG(hw, EECD, eecd_reg); | 191 | IXGB_WRITE_REG(hw, EECD, eecd_reg); |
195 | return; | ||
196 | } | 192 | } |
197 | 193 | ||
198 | /****************************************************************************** | 194 | /****************************************************************************** |
@@ -226,7 +222,6 @@ ixgb_standby_eeprom(struct ixgb_hw *hw) | |||
226 | eecd_reg &= ~IXGB_EECD_SK; | 222 | eecd_reg &= ~IXGB_EECD_SK; |
227 | IXGB_WRITE_REG(hw, EECD, eecd_reg); | 223 | IXGB_WRITE_REG(hw, EECD, eecd_reg); |
228 | udelay(50); | 224 | udelay(50); |
229 | return; | ||
230 | } | 225 | } |
231 | 226 | ||
232 | /****************************************************************************** | 227 | /****************************************************************************** |
@@ -250,7 +245,6 @@ ixgb_clock_eeprom(struct ixgb_hw *hw) | |||
250 | eecd_reg &= ~IXGB_EECD_SK; | 245 | eecd_reg &= ~IXGB_EECD_SK; |
251 | IXGB_WRITE_REG(hw, EECD, eecd_reg); | 246 | IXGB_WRITE_REG(hw, EECD, eecd_reg); |
252 | udelay(50); | 247 | udelay(50); |
253 | return; | ||
254 | } | 248 | } |
255 | 249 | ||
256 | /****************************************************************************** | 250 | /****************************************************************************** |
@@ -270,7 +264,6 @@ ixgb_cleanup_eeprom(struct ixgb_hw *hw) | |||
270 | IXGB_WRITE_REG(hw, EECD, eecd_reg); | 264 | IXGB_WRITE_REG(hw, EECD, eecd_reg); |
271 | 265 | ||
272 | ixgb_clock_eeprom(hw); | 266 | ixgb_clock_eeprom(hw); |
273 | return; | ||
274 | } | 267 | } |
275 | 268 | ||
276 | /****************************************************************************** | 269 | /****************************************************************************** |
@@ -359,7 +352,6 @@ ixgb_update_eeprom_checksum(struct ixgb_hw *hw) | |||
359 | checksum = (u16) EEPROM_SUM - checksum; | 352 | checksum = (u16) EEPROM_SUM - checksum; |
360 | 353 | ||
361 | ixgb_write_eeprom(hw, EEPROM_CHECKSUM_REG, checksum); | 354 | ixgb_write_eeprom(hw, EEPROM_CHECKSUM_REG, checksum); |
362 | return; | ||
363 | } | 355 | } |
364 | 356 | ||
365 | /****************************************************************************** | 357 | /****************************************************************************** |
@@ -414,8 +406,6 @@ ixgb_write_eeprom(struct ixgb_hw *hw, u16 offset, u16 data) | |||
414 | 406 | ||
415 | /* clear the init_ctrl_reg_1 to signify that the cache is invalidated */ | 407 | /* clear the init_ctrl_reg_1 to signify that the cache is invalidated */ |
416 | ee_map->init_ctrl_reg_1 = cpu_to_le16(EEPROM_ICW1_SIGNATURE_CLEAR); | 408 | ee_map->init_ctrl_reg_1 = cpu_to_le16(EEPROM_ICW1_SIGNATURE_CLEAR); |
417 | |||
418 | return; | ||
419 | } | 409 | } |
420 | 410 | ||
421 | /****************************************************************************** | 411 | /****************************************************************************** |